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![[Search a list of Patent Appplications for class 438]](../as.gif) CLASS 438, | SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS |
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SECTION I - CLASS DEFINITION
A. This class provides for manufacturing a semiconductor containing a solid-state device by a combination of operations wherein:
(1) no other class provides for the overall combination, and
(2) the intent is to use the electrical properties of the semiconductor in the device for at least one of the following purposes: (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy.
B. This class provides for a species of Class 427 operations involving:
(1) coating a substrate with a semiconductive material, or
(2) coating a semiconductive substrate or substrate containing a semiconductive region;
wherein the intent is to use the electrical properties of the semiconductor in a solid-state device for at least one of the following purposes: (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy.
C. This class provides for a species of Class 216 operations involving etching a semiconductive substrate or etching a substrate containing a semiconductive region, wherein the intent is to use the electrical properties of the semiconductor in a solid-state device for at least one of the following purposes:
(1) conducting or modifying an electrical current,
(2) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or
(3) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy.
D. This class provides for packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor, when not elsewhere provided, wherein there are:
(1) multiple operations having a step of permanently attaching or securing a semiconductive substrate to a terminal, elongated conductor, or support (e.g., mounting, housing, lead frame, discrete heat sink, etc.),
(2) multiple operations having a step of shaping flowable plastic or flowable insulative material about a semiconductive substrate, or
(3) a step of treating an already packaged semiconductor substrate (e.g., coating, etching, etc.); if the following conditions are also met: (a) there is significant semiconductor chip structure (e.g., such as recited semiconductor junction, etc.) or named semiconductor device (e.g., DRAM, CMOS, EPROM, etc.), or (b) there is no significant semiconductor structure if also combined with a coating operation of this class (see B above) or etching operation of this class (see C above), and (c) the intent is to use the electrical properties of the semiconductor in a solid-state device for at least one of the following purposes: (i) conducting or modifying an electrical current, (ii) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (iii) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy;
| (1) Note. When Class 438 coating (see B above) or etching operations (see C above) are not included, Class 29, following historical precedence, provides for processes of mounting, packaging, molding, or encapsulating of semiconductors having no significant semiconductor chip structure (e.g., merely recited as semiconductor chip, per se, etc.) when not elsewhere provided. E. This is the generic class for operations not elsewhere provided for treating a semiconductive substrate or substrate containing a semiconductive region; wherein the intent is to use the semiconductor in a solid-state device for at least one of the following purposes: (1) conducting or modifying an electrical current, (2) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (3) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy. |
| (1) Note. Lacking an indication that the semiconducting material is to be used for a purpose other than (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy; it will be assumed that the process meets the Class 438 definition. |
| (2) Note. For this class certain materials will be considered to be semiconductors even if there is no other indication that semiconducting properties are present. Thus, if the criteria set forth under the (1) Note is met that there is no indication that the material is to be used for a purpose other than (a), (b), or (c), the following materials are to be considered semiconductive: silicon, germanium, selenium, tellurium, gallium nitride, gallium phosphide, gallium arsenide, aluminum phosphide, aluminum arsenide, and mercury cadmium telluride. |
SECTION II - LINES WITH OTHER CLASSES AND WITHIN THIS CLASS
Several classes provide for plural step operations for manufacturing semiconductor solid-state devices or components therefor. Combined operations for manufacturing semiconductor electrical devices or semiconductor-based components therefor having plural steps not encompassed by another class are proper for Class 438.
For example, while plural steps acceptable to Class 264 (e.g., injection molding and subsequent removal of flash, etc.) remain in Class 264, combinations of molding and adhesive bonding are provided for in Class 156, even though this involves multiple steps, one of which (i.e., molding) would be considered a Class 264 unit operation even if semiconductor material is involved. However, combinations of molding, adhesive bonding, and a Class 438 unit operation acting on a semiconductor substrate which is used for at least one of the following purposes: (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy, are considered proper for Class 438.
A. UNIT COATING OPERATIONS, COMBINED OPERATIONS INVOLVING COATING, AND PARTICLE BOMBARDMENT
The following search notes are intended to clarify the lines and distinctions for determining when coating operations are provided for in Class 438. Throughout this class, the term "coating" is used in the generic sense to include both surface coating and impregnation.
The unit coating operations in Class 438 may be viewed as a specie of a Class 427 process which was removed intact from Class 427 and transferred to Class 438 for the convenience of the searcher. Thus, plural step operations that were acceptable in Class 427 are now acceptable in Class 438 if the criteria for the semiconductor material as set forth hereinabove is met. Coating operations which do not meet the Class 438 definition may be classified in the classes identified in References to Other Classes, below.
B. UNIT ETCHING OPERATIONS AND COMBINED ETCHING OPERATIONS IN CLASS 438
In References to Other Classes, below, are search notes are intended to clarify the lines and distinctions for determining when an etching unit operation is provided for in Class 438. Throughout this class, the term "etching" is used in the generic sense to include the removal of a surface by chemical reaction or solvent action regardless of the composition thereof.
The unit etching operations in Class 438 may be viewed as a specie of a Class 216 process which was removed intact from Class 216 and transferred to Class 438 for the convenience of the searcher. Thus, plural step operations that were acceptable in Class 216 are now acceptable in Class 438 if the criteria for the semiconductor material as set forth hereinabove is met. Etching operations which do not meet the Class 438 definition may be found in References with Other Classes, below.
C. PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR
Packaging is a semiconductor art manufacturing term for integration, assembly, or surrounding of a semiconductive substrate (e.g., chip, die, etc.) with a permanent encasement, housing, capsule, or support. This is distinguished from package making found in Class 53 which is directed to preparing a manufactured product for passage through the channels of trade in a safe, convenient, and attractive condition, usually wrapped in a cover or in a container which is intended to be removed when the manufactured product is used.
Class 438 takes the following packaging or packaging related operations, if not elsewhere provided: (a) multiple operations having a step of permanently attaching or securing a semiconductive substrate to a terminal, elongated conductor, or support (e.g., mounting, housing, lead frame, discrete heat sink, etc.), (b) multiple operations having a step of shaping flowable plastic or flowable insulative material about a semiconductive substrate, or (c) a step of treating an already packaged semiconductor substrate (e.g., coating, etching, etc.).
However, other manufacturing classes have established historic lines with Class 438 that must be considered when determining proper placement. These lines with external classes revolve around such concepts as: whether there is significant semiconductor device structure, whether there is a unit operation or a so-called "multi-step" operation, etc. The search notes in References to Other Classes, below, are intended to clarify these established lines and to alert the searcher to other classes for related searches.
D. LINE NOTES TO OTHER MANUFACTURING OPERATIONS
See References to Other Classes, below for lines clarifying the relationship of other chemical classes to Class 438. For many of the chemical classes, inclusion of metal casting, working or deforming, or fusion bonding step is not acceptable if combined with an operation of the chemical class.
E. LOCATION OF SEMICONDUCTOR COMPOUND, COMPOSITION, OR STOCK
Class 438 does not provide for compound, composition, or stock material produced or utilized by a Class 438 process. A process of manufacture or use of a compound or composition is usually classified with the compound or composition. The process of manufacturing a semiconductor compound or composition and the formation of a semiconductor device or semiconductor junction takes combined operations to Class 438.
Also see References to Other Classes, below, identifying this section.
F. LINE TO HEATING CLASSES
This class (438), will take the process of (a) heating of semiconductor material to modify the microstructure or electrical properties thereof, (b) combined operations involving heating of semiconductor material to modify the semiconductor structure or electrical properties when not provided in another class, or (c) heating of semiconductor substrates that affects only the nonsemiconductor region of the substrate when combined with other operations acceptable to Class 438 or combined with the establishment of device structure (e.g., connects, insulating regions, electrodes, etc.).
See References to Other Classes, below, identified as heating classes.
G. LINE NOTES TO ELECTRICAL CLASSES
See References to Other Classes, below.
SECTION III - REFERENCES TO OTHER CLASSES
SEE OR SEARCH CLASS:
| 29, | Metal Working, especially
subclasses 729+ for electrical device manufacturing apparatus,
subclasses 829+ for the assembly of electrical components
to an insulative base having a conductive path applied thereto,
or formed thereon or therein (e.g., a printed circuit board). [See "Packaging
(e.g., With Mounting, Encapsulating, etc.)" above]
| ||||||
| 53, | Package Making, for passage through the channels of trade in a
safe, convenient, and attractive condition, usually wrapped in a
cover or in a container. In this context of trade, Class 53 provides
for methods of: (a) encompassing, encasing, or completely surrounding
goods or materials with a cover made from sheet stock, (b) partially
encasing or surrounding goods and materials by a partial cover made
from sheet stock, (c) assembling or securing a separate closure
to an aperture of a preformed receptacle to complete encasement
of contents, (d) depositing articles and arranging fluent materials
in preformed receptacles, (e) partial or complete shaping of a cover
about an article, and other related package making processes. (See "Packaging
(E.g., With Mounting, Encapsulating, Etc.)" above)
| ||||||
| 65, | Glass Manufacturing, for processes of melting, shaping or forming, joining,
or heat treating of glass. Glass is defined in the Class 65 definitions
(Glossary) as an inorganic material generally including a glass
former and having specific characteristics provided in the definition.
Included in Class 65 is joining, per se, of glass to metal or glass.
(See "Packaging (e.g., With Mounting, Encapsulating,
etc.)" above)
| ||||||
| 65, | Glass Manufacturing, for processes of melting, shaping or forming, joining,
or heat treating of glass. Glass is defined in the Class 65 definitions
(Glossary) as an inorganic material generally including a glass
former and having specific characteristics provided in the definition.
It is noted that both silica and elemental silicon are also included
for Class 65. Thus, melting, shaping, or fusion bonding of silicon dioxide,
per se, or silicon, per se, is also considered proper for Class
65. Class 65 also takes combined operations whether preparatory
or subsequent to the melting, shaping or forming, joining or heat
treating of glass. Included in Class 65 is joining, per se, of
glass to metal, spinning, per se, of glass fibers or joining through
glass melting, per se, of glass fibers to substrates such as semiconductor
substrates. (see "Line Notes To Other Manufacturing Operations," above)
| ||||||
| 106, | Compositions: Coating or Plastic, subclasses 1.05+ for metal-deposition or substrate-sensitizing compositions; subclasses 286.1+ for inorganic materials only containing at least one metal atom; subclass 286.8 for inorganic materials only; subclasses 287.1+ for silicon containing other than solely as silicon dioxide as a part of an aluminum-containing compound, and subclasses 400+ for materials or ingredients. (see "Location Of Semiconductor Compound, Composition, Or Stock" above.) | ||||||
| 117, | Single-Crystal, Oriented-Crystal, and Epitaxy Growth
Processes; Non-Coating Apparatus Therefore, for processes of single crystal growth of semiconductor
material upon a seed or substrate and perfecting operations combined
therewith. See Class 117 definitions for examples of perfecting
operations generally acceptable to Class 117. See particularly
Class 117, Class Definition, (2) Note, Keywords and (3) Note, Indicative
Terminology, for terms indicative of single crystal formation.
Inclusion of a nonperfecting single crystal forming operation on
a semiconductor substrate or producing a semiconductor product meeting
the hereinabove requirements of a semiconductor material or the
definition of a semiconductor substrate takes the original to Class
438, even if there is present a single crystal forming step. (Coating
operation not meeting Class 438 definition)
| ||||||
| 134, | Cleaning and Liquid Contact With Solids, especially
subclass 1.2 and 1.3 for processes for cleaning a semiconductor
substrate including the application of electrical or wave energy to
the substrate. (Etching operation not meeting the Class 438 definition)
| ||||||
| 148, | Metal Treatment, for unit coating operations on metal, particularly
subclasses 206+ wherein there is carburization or nitriding of
a metal surface by chemical reaction or diffusion of an externally
supplied source of carbon or nitrogen that reacts with the metal
surface wherein the metal substrate remains as part of the coating
and subclasses 240+wherein there
is reactive coating of a metal substrate with an external reactant
(e.g., oxygen, etc.) wherein the metal substrate remains as part
of the coating. Class 148 also takes heat treatment of metallic
compositions if during the heat treatment there is either a change
in the internal physical structure (i.e., microstructure) or chemical
properties. (Coating operation not meeting Class 438 definition)
| ||||||
| 148, | Metal Treatment, subclasses 33.1+ for semiconductor stock which must be essentially homogeneous and have at least two contiguous layers differing in the number of unbound electrons and/or differing in energy gap levels, which exhibit a junction between the layers. (see "Location of Semiconductor Compound, Composition, or Stock" above.) | ||||||
| 148, | Metal Treatment, for processes of heat treating metals. Class 148 takes heat treatment of metallic compositions if during the heat treatment there is either a change in the internal physical structure (i.e., microstructure) or chemical properties. Since in certain instances metallic compositions could be semiconductor material meeting the Class 438 criteria, placement will go to Class 438 over Class 148 if the material is identified or perceived as semiconductor material. If perceived, a mandatory cross is made in Class 148. (heating class) | ||||||
| 156, | Adhesive Bonding and Miscellaneous Chemical Manufacture, subclasses 60+ for a process of adhesively bonding. Multistep processes for packaging semiconductors having no significant semiconductor chip structure are proper for Class 156 when they claim (a) adhesive bonding combined with shaping of nonmetals, (b) adhesive bonding combined with broad or nominally claimed metal-shaping steps, or (c) adhesive bonding including steps for assembling the parts to be bonded are proper in Class 156. An adhesive bonding unit operation for packaging or mounting operations on semiconductor devices goes as original to Class 156. Adhesive bonding combined with Class 438 coating of a semiconductor substrate or Class 438 etching of a semiconductor substrate places the original in Class 438. (See "Packaging (e.g., With Mounting, Encapsulating, etc.)" above) | ||||||
| 174, | Electricity: Conductors and Insulators, subclasses 15.1 through 16.3for fluid cooling of electrical conductors or insulator, subclasses 50-64 for housings with electric devices or mounting means, and subclasses 250-268 for printed circuit devices. | ||||||
| 204, | Chemistry: Electrical and Wave Energy, particularly
subclasses 192.1 through 192.37for sputter coating operations involving semiconductor
material or substrates including a semiconductor region, even if
the intent is to use the semiconductor material for (a) conducting
or modifying an electrical current, (b) storing electrical energy
for subsequent discharge within a microelectronic integrated circuit,
or (c) converting electromagnetic wave energy to electrical energy
or electrical energy to electromagnetic energy - Class 204 will
take combinations of sputter coating with other chemical treating
operations that involve (a) preparatory treatment of the substrate
(e.g., etching, cleaning, etc.) or (b) subsequent perfecting treatment of
the applied coating with the following exception noted (coating
operation not meeting Class 438 definition); and subclasses 192.32-192.37,
for sputter etching operations on semiconductor material and semiconductor
containing substrates, even if the semiconductor is intended for
electrical purposes - simultaneous sputter etching and chemical
etching (e.g., as when utilizing a mixture of argon and halide gas,
etc.) go as original in Class 204 (etching operation not meeting
the Class 438 definition).
| ||||||
| 205, | Electrolysis: Processes, Compositions Used Therein, and Methods of Preparing the Compositions, particularly subclass 123 , 124, and 157 for electrolytic coating operations on semiconductor or semiconductor devices (coating operation not meeting Class 438 definition), subclasses 334-639 for electrolytic synthesis of material, such as silicon, by passing an electrical current through a fused material, and subclass 656 for electrolytic erosion of a workpiece of non-uniform internal electrical characteristics (etching operation not meeting the Class 438 definition). Class 205 will take combinations of electrolytic coating with other chemical treating operations that involve (a) preparatory treatment of the substrate (e.g., etching, cleaning, etc.) or (b) subsequent perfecting treatment of the applied coating with the following exception noted (coating operation not meeting Class 438 definition). | ||||||
| 216, | Etching a Substrate: Processes, for chemical etching processes and perfecting operations therefor,
including lithos:graphic steps, of semiconductor material that is
to be utilized for nonelectrical properties. (Etching operation
not meeting the Class 438 definition)
| ||||||
| 219, | Electric Heating, subclasses 78.01+ for a process and apparatus for bonding by electrical current and pressure, and appropriate subclasses for electric heating of material, per se. However, inclusion of the criteria for Class 438 as set forth hereinabove takes the original to Class 438 even when electric heating is involved. (heating class) | ||||||
| 228, | Metal Fusion Bonding, appropriate subclasses for a process of fusion bonding and additional operations which are considered to be ancillary to the bonding (preheating, positioning, pretinning, etc.) of a semiconductive substrate; especially note subclass 123.1 and 179.1+. [See "Packaging (e.g., With Mounting, Encapsulating, etc.)" above] | ||||||
| 250, | Radiant energy, for methods not elsewhere provided of (a) using, generating, controlling, or detecting radiant energy, (b) combinations including such methods, and (c) subcombinations thereof. Particularly, see subclasses 492.2+ for processes of irradiation of semiconductor devices with no indication as to what occurs to the substrate. Class 250, subclasses 492.2+, generally relates to processes of exposing substrates to ion bombardment utilizing apparatus of Class 250 when limited to operating the apparatus in apparatus terms. Class 250 is also the generic home for processes of exposing substrates to ion bombardment. However, Class 438 provides for ion implantation of semiconductive substrate or substrate containing a semiconductive region and also ion implantation throughout the material mass to produce semiconductive material or to modify the semiconductive material. (Coating operation not meeting Class 438 definition) | ||||||
| 250, | Radiant Energy, for methods not elsewhere provided, of (a) using, generating, controlling, or detecting radiant energy, (b) combinations including such methods, and (c) subcombinations thereof. Particularly, see subclasses 492.2+ for processes of irradiation of semiconductor devices with no indication as to what occurs to the substrate. Class 250 subclasses 492.2+, generally relates to processes of exposing substrates to ion bombardment utilizing apparatus of Class 250 when limited to operating the apparatus in apparatus terms. Class 250 is also the generic home for processes of exposing substrates to ion bombardment. However, Class 438 takes chemically reactive ion etching of semiconductive substrate or substrate containing semiconductive region. (Etching operation not meeting the Class 438 definition) | ||||||
| 250, | Radiant Energy, for heating invisible radiant energy; subject matter of Class 438, per se, when no function other than heating is attributed to the process and for methods not elsewhere provided, of (a) using, generating, controlling, or detecting radiant energy, (b) combinations including such methods, and (c) subcombinations thereof. Particularly, see subclasses 492.2+ for processes of ion bombardment or irradiation of semiconductor devices, with no indication as to what occurs to the substrate. (heating class) | ||||||
| 252, | Compositions, for (a) subclasses 62.3+ for semiconductor compositions which have been uniformly doped or otherwise specialized for use as one layer which when combined with another such layer would provide an interface exhibiting barrier layer properties (e.g., as exists in Class 148, subclasses 33 through 33.6, stock wherein there is a semiconductor junction, etc.) and (b) subclasses 500+ for electrical conductive compositions. Also see the cross-reference art collection in Class 252, subclasses 950+, for doping agent source materials. (see "Location Of Semiconductor Compound, Composition, Or Stock" above.) | ||||||
| 257, | Active Solid-State Devices (e.g., Transistors, Solid-State Diodes), for active solid-state electronic device structure, per se. Subject matter may include one or more such devices combined with contacts or leads, or structures configured to be tested on a semiconductor chip, or merely semiconductor material without contacts or leads where the sole disclosed use is an active solid-state device. This subject matter does not include active solid-state devices combined with significant circuits. (electrical class) | ||||||
| 264, | Plastic and Nonmetallic Article Shaping or Treating: Processes, for a process (and steps perfecting same) of forming a composite by shaping a plastic or nonmetallic wherein a semiconducting containing preform is within a mold during the shaping operation (e.g., encapsulating, etc.). (See "Packaging (e.g., With Mounting, Encapsulating, etc.)" above) | ||||||
| 361, | Electricity: Electrical Systems and Devices, subclasses 679+ for housings and mounting assemblies for electronic devices and components, and subclasses 736+ and 752+ for modules for printed circuits or housing or chassis for printed circuit boards. (electrical class) | ||||||
| 376, | Induced Nuclear Reactions: Processes, Systems, and Elements, particularly subclass 183 for a process of neutron bombardment, per se, of semiconductive material containing an element which is converted to a desired dopant by nuclear transmutation. Any combination of operations that goes beyond formation of the transmutated doped semiconductor material, per se, goes as original to Class 438 if it meets the criteria of the intent to use the electrical properties of the semiconductor in a solid-state device as set forth by the Class 438 definition. (Coating operation not meeting Class 438 definition) | ||||||
| 376, | Induced Nuclear Reactions: Processes, Systems, and Elements, subclasses 320+ for the direct conversion of the energy produced in a nuclear reaction into an electrical output by a one-step process or apparatus for accomplishing such a one-step process. (electrical class) | ||||||
| 378, | X-ray or Gamma Ray Systems or Devices, especially subclasses 34+ for X-ray or gamma-ray lithography. (electrical class) | ||||||
| 382, | Image Analysis, especially subclass 145 for a process limited to image analysis per se in manufacturing of an integrated circuit. However, inclusion of subject matter for Class 438 remains with Class 438 even if there is a step of image analysis. | ||||||
| 385, | Optical Waveguides, particularly, subclass 14 for a laser in integrated optical circuit, subclasses 129+ for a planar optical waveguide, and subclasses 141+ for a waveguide having a particular optical characteristic modifying chemical composition. The (13) Note of Class 385 indicates that miscellaneous manufacturing of optical wave guide devices not elsewhere provided are in Class 385. Thus, if the manufactured article is a semiconductor device, a Class 438 process controls over the Class 385 process even if an optical fiber is part of the device. (electrical class) | ||||||
| 420, | Alloys or Metallic Composition, for alloys or metallic compositions that may also exhibit semiconductor properties (e.g., gallium arsenide, etc.). (see "Location Of Semiconductor Compound, Composition, Or Stock" above.) | ||||||
| 423, | Chemistry of Inorganic Compounds, appropriate subclasses for inorganic compounds or elements used in the manufacture of semiconductor devices. (see "Location of Semiconductor Compound, Composition, or Stock" above.) | ||||||
| 427, | Coating Processes, for coating operations provided for in that class, particularly
subclasses 457+ for a process of treating a coating with radiant
energy; subclasses 487+ for polymerization of applied coating
utilizing direct application of electrical, magnetic, wave, or particulate
energy; subclasses 523+ for ion plating or ion implanting;
subclasses 532+ for pretreatment of a substrate or posttreatment
of a coated substrate utilizing electrical, magnetic, wave, or particulate
energy; subclasses 569+ for deposition coating processes
utilizing plasma; subclasses 580+ for deposition coating processes
utilizing electrical discharge; subclass 581 for coating processes
utilizing chemical liquid deposition; subclass 582 for coating processes
utilizing photo-initiated chemical vapor deposition; subclasses
585+ for coating processes utilizing chemical vapor deposition; subclass
591 for deposition coating utilizing induction or dielectric heating;
subclasses 592+ for deposition coating utilizing resistance
heating; subclasses 595+ for deposition coating utilizing
electromagnetic or particulate radiation; subclasses 598+ for
deposition coating utilizing magnetic field or force; subclass 600
for deposition coating utilizing sonic or ultrasonic energy. (Coating
operation not meeting Class 438 definition)
| ||||||
| 428, | Stock Material or Miscellaneous Articles, appropriate subclasses for semiconductor stock material defined in terms of composition and structure, especially subclass 620 . (see "Location of Semiconductor Compound, Composition, or Stock" above.) | ||||||
| 429, | Chemistry: Electrical Current Producing Apparatus, Product, and Process, especially subclass 7 for a combination including a nonbattery electrical component electrically connected within a cell casing other than testing or indicating components. (electrical class) | ||||||
| 430, | Radiation Imagery Chemistry: Process, Composition,
or Product Thereof, particularly for initial lithos:graphic processes
in semiconductor manufacture limited to (a) exposure imaging and
developing and including preparatory operations to the exposure
(e.g., as coating to form the resist, etc.) or (b) developing, per
se, of subject matter of Class 430 substrates. When Class 430 exposure,
imaging or developing are combined with etching or coating of a
semiconductor substrate for purposes other than masking and commensurate
with the Class 438 definition for manufacture of a semiconductor device
as set forth hereinabove, the combination goes as original to Class
438 with the following exception noted. (Coating operation not
meeting Class 438 definition)
| ||||||
| 430, | Radiation Imagery Chemistry: Process, Composition,
or Product Thereof, particularly for initial lithos:graphic processes
in semiconductor manufacture limited to (a) exposure imaging and
developing and including preparatory operations to the exposure
(e.g., as coating to form the resist, etc.) or (b) developing, per
se, of subject matter of Class 430 substrates. When Class 430 exposure
imaging or developing are combined with etching or coating of a
semiconductor substrate commensurate with the Class 438 definition
for manufacture of a semiconductor device as set forth hereinabove,
the combination goes as original to Class 438 with the following
exception noted. (Etching operation not meeting the Class 438 definition)
| ||||||
| 432, | Heating, for generic heating processes. However, inclusion of the criteria for Class 438 as set forth hereinabove takes the original to Class 438 even when generic heating is involved. (heating class) | ||||||
| 439, | Electrical Connectors, appropriate subclasses for features related or analogous to electrical contact or housing features of active solid-state devices (e.g., subclasses 271+ for sealing elements or subclasses 449+ for stress relief means for conductor to terminal joint. (electrical class) | ||||||
| 501, | Compositions: Ceramic, appropriate subclasses for ceramic compositions used in semiconductor devices. (see "Location of Semiconductor Compound, Composition, or Stock" above.) | ||||||
| 505, | Superconductor Technology: Apparatus, Material, Process, particularly subclass 330 for processes of manufacturing from high temperature (i.e., above 30 degrees Kelvin) superconductive material (a) superconductor devices or (b) semiconductor devices having superconductive components or connect lines. (see "Line Notes To Other Manufacturing Operations," above) |
SECTION IV - GLOSSARY
Listed below are: (1) a compilation of acronyms, abbreviations, and technological terms pertaining to solid-state electrical devices, manufacturing processes, and related apparatus and compositions useful therefor and (2) the meaning to be given to the various "art" terms appearing in this class. These latter terms, some of which have been included in the glossary below, are the same as that generally accepted or in common usage. However, certain terms employed in this class and also included below have been assigned definitions which may be more restrictive or different from those in common usage since these terms are being utilized for distinguishing this class over other classes of related art.
a-Si
Amorphous silicon
ACT
Acoustic charge transport
ADC
Analog-to-digital converter
AES
Auger electron spectroscopy
ALE
Atomic layer epitaxy
ALEP
Angle-lapping edge profilometry
AMD
Active matrix display
AMG
Alternative-metal, virtual-ground (metallization)
APCVD
Atmospheric-pressure CVD
APD
Avalanche photodiode
ARC
antireflective coating
ASG
Arsenosilicate glass
BBCO
Barium bismuth copper oxide (a HTSC)
BBD
Bucket brigade device
BBL
Buried bit-line
BED
Band edge discontinuity
BH
Buried heterostructure
BHF
Buffered hydrofluoric acid
BIC
Breakdown of insulator for conduction
BICFET
Bipolar inversion channel FET
BiCMOS
Integrated bipolar and CMOS
BiMOS
Integrated bipolar and MOSFET
BJT
Bipolar junction transistor
BKBO
Barium potassium bismuth oxide (a HTSC)
BLM
Ball limiting metallization
BMD
Bulk micro defect
BOE
Buffered oxide etch
BOX
Buried oxide
BOXES
Buried oxide with etch stop
BPSG
Borophosphosilica glass
BPTEOS
borophosphoTEOS
BSD
Back side damage
BSE
buried storage electrode
BSG
Borosilica glass
BSQ
Bias sputter quartz
BST
Barium strontium titanate
CAIBE
Chemically assisted ion beam etching
CBIC
Complementary bipolar IC
CBKR
Cross bridge Kelvin resistor (test structure)
CCB
Controlled collapse bonding
CCC
Corrugated capacitor cell
CCD
Charge coupled device
CDE
Chemical dry etching
CDI
Collector diffusion isolation
CEL
Contrast enhancement layer
CER
Contact end resistor (test structure)
CERDIP
ceramic DIP
chanstop
channel stop isolation structure
CHEMFET
Chemically sensitive FET
CHL
Current hugging logic
CID
Charge injection device
CLSEG
Confined lateral SEG
CML
Current mode logic (i.e., ECL)
CMOS
Complementary (NMOS and PMOS) FETs
CMP
chemical-mechanical polishing/planarization
COB
(a) chip-on-board or (b) capacitor over bit-line
COD
Catastrophic optical damage
COG
Chip-on-glass
COMFET
Conductivity modulation FET (i.e., IGBT)
CSBH
Channeled substrate buried heterostructure
CSL
Coherent superlattice
CTD
Charge transfer device
CTSL
Coherent tilted superlattice
CVD
Chemical vapor deposition
Cz
Czoshralski (melt pulling)
DADBS
diacetoxyditertiarybutoxysilane
DADIS
diacetoxydiisopropoxysilane
DBR
distributed Bragg reflector
DCG
dichromated gelatin
DCFL
direct-coupled FET logic
DCS
dichlorosilane
DDE
double diffused epitaxy
DDI
deep dielectric isolation
DEIS
dual electron injection structure
DEZ
diethylzinc
DFB
distributed feedback (laser)
DH
double-hetero
DHBT
double-hetero bipolar transistor
DHF
dilute hydrofluoric acid
DI
dielectric isolation
DIBL
drain induced barrier lowering
DIET
dielectrically encapsulated trench capacitor
DIP
dual-in-line package
DLP
double layer polysilicon
DLTS
deep level transient spectroscopy
DMAH
dimethylaluminumhydride
DMD
(a) depletion mode device (also D-mode or D-type) or (b) deformable mirror device
DMOS
double diffused MOS
DMS
dilute magnetic semiconductor
DOES
doublehetero optoelectronic switch
DRAM
dynamic random-access memory
DSP
double stacked capacitor
DTL
diode-transistor logic
DUF
diffusion under film
DUT
device under test
DUV
deep ultraviolet
DZ
denuded zone
-E-
EAROM
electrically alterable read-only memory
EB
(a) extrinsic base or (b) electron beam
EBES
electron beam exposure system
EBIC
electron beam induced current
EBL
electron beam lithography
ECL
emitter coupled logic
ECR
electron cyclotron resonance
EDP
ethylene-diamine-pyrocatechol etchant
EDTA
ethylenediaminotetraacetic acid
EELS
electron energy loss spectroscopy
EEPROM
electrically erasable programmable read-only memory
EFG
edge-defined film-fed growth (also EDFFG or EDFG)
EG
extrinsic gettering
EGSi
electronic-grade silicon
EL
electroluminescent
ELO
epitaxial lateral overgrowth
EMD
enhancement mode device (also E-mode or E-type)
EMI
electromagnetic interference
EMP
electron microprobe
EPB
epoxidated polybutadiene (an EB resist)
EPD
etch pit density
EPI
epitaxial (single crystalline) layer
EPP
ethylene-piperidine-pyrocatechol etchant
EPR
electron paramagnetic resonance
EPROM
erasable programmable read-only memory
EPS
effective punchthrough stopper
EPW
etchant mix of ethylenediamine, pyrocatechol, and water
ESCA
electron spectroscopy for chemical analysis
ESD
electrostatic discharge
ESR
(a) equivalent series resistance or (b) electron spin resonance
FAMOS
floating-gate avalanche-injection MOS
FASIC
folded bit-line adaptive sidewall isol. capacitor cell
FCT
field controlled thyristor
FEC
floating electrode capacitor
FED
field emission device
FET
field effect transistor
FIB
focused ion beam
FIPOS
full isolation by porous oxidized silicon
FLOTOX
floating gate tunnel oxide
FOX
field oxide
FPD
field programmable device
FPGA
field programmable gate array
FTIR
Fourier transform infrared spectroscopy
FUROX
fully recessed oxide isolation
GDMS
glow discharge mass spectroscopy
GILD
gas immersion laser doping
GRIN-SCH
graded index separate confinement heterostructure
GTO
gate turn-off
HBT
heterojunction bipolar transistor
HDC
high dielectric constant
HDI
high density interconnects
HDMI
high density multilayer interconnects
HEMT
high electron mobility transistor (Hetero MESFET)
HET
hot electron transistor (bipolar)
Hi-C
high capacitance
HIC
hybrid integrated circuit
HIMOS
(see COMFET)
HIPOX
high pressure oxidation
HMDS
hexamethyldisilizane
HNA
hetchant mix of hydrofluoric, nitric, and acetic acids
HPSC
half-Vccsheath plate capacitor
HTO
high temperature oxide
HTSC
high temperature superconductor
IB
(a) intrinsic base or (b) ion beam
IBD
ion beam deposition
IC
integrated circuit
ICP
inductively coupled plasma
IG
intrinsic gettering
IGBT
insulated gate bipolar transistor (e.g., COMFET, HIMOS)
IGFET
insulated gate field effect transistor
IID
impurity induced disordering
I2L
integrated injection logic
IJP
ink jet printhead
ILB
inner lead bonding
ILD
interlayer dielectric
IMMA
ion microprobe mass analysis
IMPATT
impact ionization avalanche transist time (diode)
INS
intrinsic nondoped semiconductor
IR
infrared
ISFET
ion sensitive FET (i.e., CHEMFET)
ITO
indium tin oxide (a TCO)
IVEC
isolation vertical capacitor cell
JFET
junction field effect transistor (junction gate)
JOFET
Josephson junction field effect transistor
JTE
junction termination extension
KMER
Kodak metal etch resist
KPR
Kodak photo resist
KTFR
Kodak thin film resist
LAGB
low-angle grain boundary
LATID
large angle tilt implant drain
LB
(a) Langmuir-Blodgett or (b) laser beam
LCCD
leadless ceramic chip carrier
LCD
liquid crystal display
LDCC
leaded ceramic chip carrier
LDD
lightly doped drain
LEC
liquid encapsulated Czoshralski
LED
light emitting diode
LEED
low-energy electron diffraction
LEK
liquid encapsulated Kyropoulus
LOCOS
local oxidation of silicon
LOPED
lift-off using edge detection
LPCVD
low-pressure chemical vapor deposition
LPE
liquid phase epitaxy
LRP
limited reaction processing
LSI
large scale integration
LSSL
lateral surface superlattice
LST
logic service terminal
LTCC
low temperature co-fired ceramic
LTG
low temperature growth
LTO
low temperature oxidation
MBE
molecular beam epitaxy
MCz
magnetic Czoshralski
MCM
multichip module
MCT
(a) MOS controlled thyristor or (b) HgCdTe
MEM
micro-electromechanical
MESFET
metal semiconductor FET (Schottky gate)
MF3R
modified fully-framed fully-recessed isolation
MGSi
metallurgical-grade silicon
MIM
metal-insulator-metal
MISFET
metal insulator semiconductor IGFET
MLEC
magnetic LEC
MLC
multilayer ceramic
MLO
multilayer oxide
MLR
multilayer resist
MMA
methyl methacrylate
MMIC
monolithic microwave integrated circuit
MNOS
metal nitride/oxide IGFET
MOCVD
metal organic chemical vapor deposition
MODFET
modulation doped MESFET (i.e., HEMT)
MOMOM
metal-oxide-metal (tunnelling device)
MOSFET
metal oxide semiconductor IGFET
MQW
multiquantum well
MTF
mean time to failure
MTL
merged transistor logic (i.e., I2L)
NDC
negative differential conductivity
NEA
negative electron affinity (e-emitter)
NMA
N-methyl-acetamide
NMOS
n-channel MOSFET
NMP
n-methyl-pyrrolidone
novolak
Thermoplastic phenol-formaldehyde used as photoresist
NPN
(bipolar transistor)
NRD
nitridation retarded diffusion
NSAG
nonself-aligned gate
NTD
neutron transmutation doping
NVRAM
nonvolatile RAM
OBG
optical band gap
ODE
orientation dependent etching
OED
oxidation enhanced diffusion
OEIC
optoelectronic integrated circuit
OF
orientation flat
OISF
oxidation induced stacking fault
OMCVD
organometallic CVD
OMCT
octamethylcyclotetrasiloxane
OMVPE
organometallic VPE
ORD
oxidation retarded diffusion
ORL
optical return loss
OSA
optical subassembly
OSF
(see OISF)
OTCR
over-the-cell routing
OTP
one-time programmable
OXSEF
oxygen-doped silicon epitaxial film
PAC
photoactive compound
PAP
peel apart
PBG
photonic band gap
PBL
polybuffered LOCOS
PBM
planarization blocking mask
PBN
pyrolytic boron nitride