CPC Definition - Subclass G06F
This place covers:
Electrical arrangements or processing means for the performance of any automated operation using empirical data in electronic form for classifying, analyzing, monitoring, or carrying out calculations on the data to produce a result or event.
This place does not cover:
Computer systems based on specific computational models |
Attention is drawn to the following places, which may be of interest for search:
Programme-control systems | |
Digital computers in which all the computation is effected mechanically | |
Computers in which a part of the computation is effected hydraulically or pneumatically | |
Computers in which a part of the computation is effected optically | |
Self-contained input or output peripheral equipment | |
Computer displays | |
Impedance networks using digital techniques |
In this place, the following terms or expressions are used with the meaning indicated:
Handling | includes processing or transporting of data. |
Data processing equipment | An association of an electric digital data processor classifiable under group G06F 7/00, with one or more arrangements classifiable under groups G06F 1/00- G06F 5/00 and G06F 9/00- G06F 13/00. |
This place covers:
Details not covered by groups G06F 3/00-G06F 13/00 and G06F 21/00.
This place does not cover:
Architectures of general purpose stored program computers |
Attention is drawn to the following places, which may be of interest for search:
Evaluating functions by calculating only | |
Generating sawtooth or staircase waveforms |
Attention is drawn to the following places, which may be of interest for search:
Generation of pulse trains in general |
This place covers:
Generation and/or distribution of clock signal(s) within a computer system.
This place covers:
Distribution of clock signal(s) within a computer system, in a typical case the goal to be achieved is to minimize the skew.
This place covers:
Clock distribution wherein the clock signal(s) are distributed entirely optically or partially optically and partially electrically.
Used also for hoods protecting displays of portable computers.
Used also for accessories attached on displays of portable computers.
This place covers:
Portable computers in the sense of computers able to be used as stand alone computers with their own integrated user interface and designed to be carried by hand (e.g. hand held computers or laptop computers) or worn on the user's body (wearable computers).
Docking stations and extensions associated with the portable computers which may be mechanically attached to them.
Telephone sets including user guidance or feature selection means facilitating their use: H04M 1/247
Cordless telephones: H04M 1/725
Pagers: G08B 5/222
This place does not cover:
Cooling arrangements for portable computers | |
Constructional details or arrangements for pocket calculators, electronic agendas or books | |
Anti-theft locking devices | |
Constructional details of cameras | |
Hand held scanners | |
Casing of remote controls | |
Constructional details of portable telephone sets: with several bodies |
In this field, main mechanical aspects of the housing (single housing, foldable or sliding housings) are classified in G06F 1/1615 - G06F 1/1626, while all the other constructional details (enclosure details, display, keyboard, integrated peripherals, etc) are classified in G06F 1/1633 in complement to this main aspect.
In patent documents, the following words/expressions are often used as synonyms:
- " Laptop"," Palmtop"," PDA"
- " cell phone"," mobile phone","smart phone"
This place covers:
Portable computers having a plurality of enclosures which can't be classified in anyone of the subgroups, e.g. multiple enclosure with loose mechanical link (single wire, expandable or/and flexible link, rollable part), computer split in several housings with no mechanical connection and wirelessly connected, complex mechanical link with multiple degrees of freedom.
Illustrative examples:
This place does not cover:
Constructional details of portable telephones comprising a plurality of mechanically joined movable body parts |
Attention is drawn to the following places, which may be of interest for search:
Foldable portable telephones |
This place covers:
Also when the hinging part is composed of two parallel rotation axes.
This place covers:
Reversing the orientation done either by rotating along the X or Y axis or by detaching the display and attaching it in the reverse orientation. Illustrative example:
This place covers:
Illustrative examples of subject matter classified in this group:
Additionally rotation around an axis common to the plane they define but perpendicular to their common side, e.g. reversing the relative orientation along an axis common to both planes but not along their sides (which would be then a folding axis).
This place does not cover:
Reversing the face orientation of the screen of a folding flat display |
Attention is drawn to the following places, which may be of interest for search:
Rotatable portable telephones |
This place covers:
Portable computers linked by a mechanism allowing translation of one housing relatively to the other housing.
Attention is drawn to the following places, which may be of interest for search:
Slidable portable telephones |
This place covers:
Also bags allowing the transport of other peripherals together with the portable computer and carrying trolleys for transporting portable computers.
This place does not cover:
Bags per se | |
Stands with or without wheels as supports for apparatus |
Attention is drawn to the following places, which may be of interest for search:
Holders or carriers for hand articles |
Attention is drawn to the following places, which may be of interest for search:
Garnments adapted to accomodate electronic equipment | |
Fastening articles to garnments |
This place covers:
Expansions which are directly attached to portable computers, including supplementary battery packs external to the housing, port replicators and cradles for PDAs.
This place does not cover:
Standard wired or wireless peripherals such as keyboards, printers or displays which are not mechanically linked to a portable computer |
Attention is drawn to the following places, which may be of interest for search:
Mounting in a car | |
Locking against unauthorized removal | |
Battery charging cradles | |
PCMCIA cards |
In patent documents, the following words/expressions are often used as synonyms:
- "docking station", "cradle" and "port replicator"
Attention is drawn to the following places, which may be of interest for search:
Constructional details or arrangements of portable computers specific to the type of enclosures | |
Mounting of specific components of portable telephones |
Attention is drawn to the following places, which may be of interest for search:
Computer power supply in general | |
Details of mounting batteries in general | |
Portable telephones battery compartments |
Attention is drawn to the following places, which may be of interest for search:
Constructional details related to the housing of computer displays in general | |
Accessories mechanically attached to the display housing portion of portable computers | |
Portable telephones display |
This place does not cover:
Including at least an additional display |
Should be used when the displays are used in combination as a virtual single display area where the displayed image is split over the display screens.
This place does not cover:
Movement typologies |
Attention is drawn to the following places, which may be of interest for search:
Touchpads integrated in a laptop or similar computer | |
Secondary touch screen |
This place does not cover:
Constructional details or arrangements related to integrated I/O peripheral being a secondary touch screen used as control interface, e.g. virtual buttons or sliders |
This place covers:
Typically very small displays disposed on the back of the main display for indicating time, alerts or battery level or small status displays near the hinge above the keyboard. Illustrative examples:
Attention is drawn to the following places, which may be of interest for search:
Portable telephones flexible display |
This place does not cover:
Accessories mechanically attached to the display housing portion of portable computers | |
Enclosure details of non portable computers | |
Cooling arrangements for portable computers |
Attention is drawn to the following places, which may be of interest for search:
Portable telephones with mechanically detachable module(s) | |
Portable telephones with improved resistance to shocks |
This place does not cover:
Internal mounting structures of non portable computers |
Attention is drawn to the following places, which may be of interest for search:
Details of stand alone keyboards | |
Constructional details of keyboard switches | |
Portable telephones keypads |
Attention is drawn to the following places, which may be of interest for search:
Digitisers | |
Interaction with virtual keyboards displayed on a touch sensitive surface |
Attention is drawn to the following places, which may be of interest for search:
Movement typologies | |
Relative motion of the body parts to change the operational status of the portable telephone |
Attention is drawn to the following places, which may be of interest for search:
Portable telephones open/close detection |
This place does not cover:
Hinge details related to the transmission of signals or power |
Attention is drawn to the following places, which may be of interest for search:
Hinges for doors, windows or wings | |
Portable telephones hinge details |
This place covers:
Also optical transmission of data or inductive transmission of power between housings.
Attention is drawn to the following places, which may be of interest for search:
Camera details of portable telephones |
This place does not cover:
Touchscreens | |
Constructional details of pointing devices |
Attention is drawn to the following places, which may be of interest for search:
Joysticks in general | |
Constructional details of pointing devices in portable telephones |
This place covers:
Secondary touchscreens which are used only as input device (touchpad, virtual input devices), and not for information display.
Attention is drawn to the following places, which may be of interest for search:
Gestural input | |
Motion sensing in space for computer input |
This place covers:
Scanners for e.g. A4 sheets.
This place does not cover:
Barcode readers |
Attention is drawn to the following places, which may be of interest for search:
Scanners | |
Printers |
This place does not cover:
details of antennas disposed inside a computer | |
Interaction of portable devices with video on demand or television systems |
Attention is drawn to the following places, which may be of interest for search:
Aerials | |
Cordless telephones |
This place covers:
Cases and housing for computers and how computer components are "packed" , i.e. mounted within the housing . It also covers arrangements, e.g. cabling, to distribute the power generated by the power supply unit to the other computer components mounted within the casing.
This place covers:
Enclosures for computers, including constructional details of front or bezel.
This place does not cover:
Enclosures for portable computers |
Attention is drawn to the following places, which may be of interest for search:
Enclosures for electrical apparatuses in general |
This place covers:
Enclosures for non-standard computers, e.g. industrial computers, computers specifically adapted to special environments.
Attention is drawn to the following places, which may be of interest for search:
Shielding against electromagnetic interference in general |
This place covers:
Mounting structures for securing and/or interconnecting among them internal components within the enclosure of a computer system.
This place does not cover:
Internal connecting means for buses |
Attention is drawn to the following places, which may be of interest for search:
Mounting structures for printed circuits in general |
Attention is drawn to the following places, which may be of interest for search:
Housings for circuits carrying a CPU and adapted to receive expansion cards |
Attention is drawn to the following places, which may be of interest for search:
Mounting of expansion boards in general |
Used for the securing of expansion cards completely within the enclosure, and not to the connection to openings in the enclosure.
Attention is drawn to the following places, which may be of interest for search:
Securing of expansion boards in general |
Used for to the connection of expansion boards to openings in the enclosure so that at least a portion, or connector, of the expansion board is accessible from outside the enclosure.
Attention is drawn to the following places, which may be of interest for search:
Constructional details of disk drives housings in general |
Used for both optical drives and hard disk drives.
Attention is drawn to the following places, which may be of interest for search:
Power supply for computers |
This groups refers also to documents wherein the thermal management is achieved by lowering power consumption in order to reduce heat generation..
Documents also disclosing costructional details about the managed cooling arrangement should be also classified in G06F 1/20 if describing the cooling of a desktop computer or G06F 1/203 if describing the cooling of a portable computer.
Attention is drawn to the following places, which may be of interest for search:
Microprogramme loading | |
Restoration from data faults |
This place covers:
Power supplies for computers including:
- Power regulation;
- Power monitoring including means for acting in the event of power supply fluctuations or interruption;
- Power save.
This place does not cover:
Power supplies for memories |
Attention is drawn to the following places, which may be of interest for search:
Systems for regulating electric or magnetic variables |
This place covers:
Arrangements with switchable, multiple power supplies (typical example is AC and battery, but may also include multiple batteries, fuel cells or solar panels).
This place does not cover:
Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations |
This place covers:
Arrangements to supply power to external peripherals, either directly from the computer or under computer control (typical cases are the supply of power through a USB interface and the power strips).
This place covers:
Arrangements to monitor, and only monitoring, power supply parameters (e.g. voltage and/or current).
This place does not cover:
Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations |
This place does not cover:
For resetting only |
Attention is drawn to the following places, which may be of interest for search:
Involving the processing of data-words |
This place covers:
Means to save power in computers, including devices, methods and combinations of devices and method features.
This place covers:
Power saving obtained by switching, in relation to events of any type, between computing device operating modalities implying different power consumption levels. As opposed to power saving arrangements and/or methods of a permanent or continuous nature.
This place covers:
Power saving triggered by a certain event and/or condition detected by monitoring or supervision of e.g. hardware, communication, processing tasks.
Used when the peripheral monitored does not belong to any of the subgroups: G06F 1/3218, G06F 1/3221 or G06F 1/3225.
This place covers:
Power saving initiated when a task completion is detected (typical cases are the completion of processing tasks, e.g. programs, applications, routines).
This place covers:
Power saving initiated when the user absence/presence is detected, e.g. through a camera and/or sensors.
This group is not to be used when the user absence/presence is inferred by a user inactivity period, e.g. absence of keyboard input. Subgroups referring to monitoring of peripheral devices to be used in such cases, i.e. G06F 1/3215 and subgroups.
This place covers:
Power saving obtained by selectively reducing power consumption of all or individual components of a computing system. Such reduction can be achieved in different ways, e.g. by lowering the clock frequency, by stopping the supply of the clock signal, by lowering the voltage, by stopping the supply of power, by task scheduling.
This place covers:
Power saving by stopping clock generation or distribution to a computer or a component.
This place covers:
Power saving taking place in the processing unit of the computer, intended as central processing unit (CPU), microcontroller unit (MCU), microprocessor.
This place covers:
Power saving in optical (or magneto-optical) disk drives, e.g. CD, DVD, Blue-Ray, etc.
This place does not cover:
Power saving in storage systems (e.g. not in disk drives within a computer system) |
This place covers:
Power saving by selectively reducing power consumption of individual components of a computer system. Such reduction can be achieved in different ways, e.g. by lowering the clock frequency or stopping the clock, by lowering the voltage, by stopping the power supply (power gating).
Attention is drawn to the following places, which may be of interest for search:
This place covers:
Includes inter alia arrangements in which a barcode reader is used to input data to a computer and in particular drivers for barcode or QR code readers.
Recognition of data; presentation of data; record carriers; handling record carriers: G06K.
This place does not cover:
Specific input/output arrangements | |
Other optical apparatus |
Attention is drawn to the following places, which may be of interest for search:
Viewers photographic printing | |
Electrography, magnetography | |
Constructional details of barcode readers | |
Reading of RFID record carriers | |
Constructional details of RFID record carriers | |
Use of barcode readers or RFIDs in data processing systems for business applications | |
Wireless phone using NFC or a two-way short-range wireless interface | |
Facsimile per se |
In this place, the following terms or expressions are used with the meaning indicated:
TUI | a user interface in which a person interacts with digital information through a physical environment, i.e. by manipulating physical objects (e.g. in the same way as moving pieces of a game on a tablet), often using RFID or NFC. |
In patent documents, the following abbreviations are often used:
TUI | Tangible User Interface |
RFID | Radio-Frequency Identification |
NFC | Near Field Communication |
This place covers:
Specific arrangements for input through a video camera, not covered by G06F 3/01 - G06F 3/16, e.g. details of the interface linking the camera to the computer.
This group was originally meant for devices adapting analog video cameras to computer entry.
Attention is drawn to the following places, which may be of interest for search:
Tracking user body for computer input | |
Pointing device integrating a camera for tracking its own position with respect to an imaged reference surface or the surroundings | |
Tracking a projected light spot generated by a light pen or a "laser pointer" indicating a position on a display surface | |
Digitisers using a camera for tracking the position of objects with respect to an imaged reference surface | |
Recognising movements or behaviour, e.g. recognition of gestures, dynamic facial expressions; Lip-reading | |
Television cameras |
Attention is drawn to the following places, which may be of interest for search:
Digital input from, or digital output to, record carriers | |
Digital stores in which the information is moved stepwise using magnetic elements and thin films in plane structure | |
Digital stores in which the information is moved stepwise using semiconductor elements | |
Organisation of a multiplicity of shift registers |
Old technology, not used anymore.
This place covers:
Input arrangements, or combined input and output arrangements, for interaction between user and computer.
Particularly, said input arrangements include those based on the interaction with the human body, e.g.
- gloves for hand or finger tracking;
- eye or head trackers;
- devices using bioelectric signals, e.g. detecting nervous activity;
- arrangements for providing computer generated force feedback in input devices.
This place does not cover:
Sound input, sound output including multimode user input, i.e. combining audio input (e.g. voice input) with other user input |
Attention is drawn to the following places, which may be of interest for search:
Interaction techniques based on graphical user interfaces [GUI] |
Diagnosis; surgery; identification: A61B
Recognition of data; presentation of data; record carriers; handling record carriers: G06K
This place does not cover:
Blind teaching |
Attention is drawn to the following places, which may be of interest for search:
Measuring of parameters or motion of the human body or parts thereof for diagnostic purposes | |
For handicapped people in general | |
Games using an electronically generated display and player-operated input means | |
Robot control | |
Stereoscopic optical systems | |
Recognising human body or animal bodies | |
Acquiring or recognising human faces, facial parts, facial sketches, facial expressions | |
Tactile signalling | |
Virtual reality arrangements for interacting with music, including those with tactile feedback | |
For electrophonic musical instruments | |
Electronic switches characterised by the way in which the control signals are generated |
This place covers:
For the scope of this group, Head-tracking is interpreted as covering face detection and tracking.
Attention is drawn to the following places, which may be of interest for search:
Head-tracking for image generation in head-mounted display | |
Use of head-tracking for image generation | |
3D image generation in augmented reality | |
Using viewer tracking |
In patent documents, the following abbreviations are often used:
HMD | Head-Mounted Display |
This place does not cover:
Input arrangements based on nervous system activity detection |
Attention is drawn to the following places, which may be of interest for search:
Apparatus for testing the eyes and instruments for examining the eyes | |
Instruments for determining or recording eye movement | |
Acquiring or recognising eyes |
In patent documents, the following words/expressions are often used as synonyms:
- "eye tracking" and "gaze tracking"
This place covers:
Also covers hand-worn keyboards
Manipulators; chambers provided with manipulation devices: B25J
Attention is drawn to the following places, which may be of interest for search:
Finger worn arrangements for converting the position or the displacement of a member into a coded form |
In this place, the following terms or expressions are used with the meaning indicated:
Data glove (sometimes called a "wired glove" or "cyberglove") | an input device for human–computer interaction worn like a glove |
Attention is drawn to the following places, which may be of interest for search:
Detecting bioelectric signals for diagnostic purpose | |
Bioelectrical control, e.g. myoelectric |
This place covers:
Dynamic force or tactile feedback arrangements. Also passive feedback arrangements but only if they are dynamically reconfigurable under computer control, e.g. buttons raised from a touchpad surface using electronic muscle or similar.
- Manipulators; chambers provided with manipulation devices: B25J
- Conjoint control of vehicle sub-units of different type or different function; control systems specially adapted for hybrid vehicles; road vehicle drive control systems for purposes not related to the control of a particular sub-unit: B60W
- Systems acting by means of fluids; fluid-pressure actuators, e.g. servo-motors: F15B
- Control or regulating systems in general: G05B
- Mechanical control devices: G05G
Attention is drawn to the following places, which may be of interest for search:
Passive (and non reconfigurable) feedback arrangements on a touchscreen, e.g. overlays with reliefs for indicating keys of a virtual keyboard | |
Hand grip control means for manipulators | |
Tactile feedback for vehicle driver | |
Servo-motor systems giving the operating person a "feeling" of the response of the actuated device | |
Means for enhancing the operator's awareness of arrival of the controlling member (knob, handle) at a command or datum position; Providing feel, e.g. means for creating a counterforce | |
Tactile presentation of information, e.g. Braille display | |
Keyboards characterised by tactile feedback features | |
Piezoelectric actuators |
This place covers:
Gesture interaction as a sequence and/ or a combination of user movements captured using various sensing techniques such as (among others) cameras monitoring the user, arrangements for interaction with the human body, input by means of a device moved freely in 3D space or opto-electronic detection arrangements.
This place does not cover:
Gestures made on the surface of a digitiser and/or in close proximity to this surface for digitisers capable of touchless position sensing and/or measuring also the distance in the Z direction |
Attention is drawn to the following places, which may be of interest for search:
Arrangements for interaction with the human body | |
Detection arrangements using opto-electronic means | |
Input by means of (pointing) device or object moved freely in 3D space | |
Acquiring or recognising (static) human faces, facial parts, facial sketches, facial expressions | |
Recognising movements or behaviour, e.g. recognition of gestures, dynamic facial expressions; Lip-reading | |
Lip-reading assisted speech recognition |
Handling natural language data: G06F 40/00
Attention is drawn to the following places, which may be of interest for search:
Inputting characters | |
Handling non-Latin characters, e.g. kana-to-kanji conversion | |
Processing of non-Latin text |
This place covers:
Input arrangements using manually operated switches, e.g. using keyboards or dials, insofar as they are stand-alone devices or integrated in a fixed computer system. Includes wired or wireless keyboards which are not mechanically linked to a portable computer.
Attention is drawn to the following places, which may be of interest for search:
Details related to integrated keyboard of portable computers | |
Keyboard switches per se | |
Electronic switches characterised by the way in which the control signals are generated |
Attention is drawn to the following places, which may be of interest for search:
Special layout of keys | |
Palm(wrist)-rests not integrated in the keyboard | |
Wrist worn wrist rests | |
Document holders for typewriters | |
Input/Output devices for watches | |
Details of keys/push buttons | |
Switches having rectilinearly-movable operating part or parts | |
Constructional details of keyboards having such switches | |
Electronic switching or gating i.e. not by contact-making or -braking | |
Proximity switches | |
Touch switches with electronic switching | |
Capacitive touch switches | |
Force resistance transducer | |
Optical touch switches | |
Piezoelectric touch switches | |
Resistive touch switches | |
Keyboard, i.e. having a plurality of control members, with electronic switching | |
With optoelectronic devices | |
With magnetic movable elements | |
With capacitive movable elements |
In patent documents, the following abbreviations are often used:
RSI | Repetitive Stress Injuries |
Attention is drawn to the following places, which may be of interest for search:
Integration of a mini joystick in a portable computer | |
Integration of a mini joystick in a keyboard | |
Details of the interface with a computer | |
Joysticks with a pivotable rigid stick |
This place does not cover:
Adjusting the tilt angle of the integrated keyboard in a mobile computer |
Attention is drawn to the following places, which may be of interest for search:
Constructional details of barcode readers |
This place does not cover:
Integration of a mini joystick in a portable computer | |
Constructional details of pointing devices | |
Joysticks with a pivotable rigid stick |
This place does not cover:
For keyboards integrated in a laptop computer |
This place covers:
Any keyboard designed or modified to control a specific software application or specific hardware, e.g. by integrating dedicated keys. Key layouts in alternative to the QWERTY standard are also classified in this group.
Attention is drawn to the following places, which may be of interest for search:
Devices for teaching typing |
This place does not cover:
Arrangements for reducing the size of the integrated keyboard in a portable computer | |
Arrangements for ergonomically adjusting the disposition of keys of a keyboard |
Attention is drawn to the following places, which may be of interest for search:
Document holders for typewriters |
This place covers:
Input arrangements using manually operated switches, e.g. using keyboards or dials, further comprising cooperation and interconnection of the input arrangement with other functional units of a computer.
This place does not cover:
Arrangements for converting discrete items of information into a coded form. Arrangements for converting the position or the displacement of a member into a coded form |
Attention is drawn to the following places, which may be of interest for search:
Keyboards integrating additional peripherals | |
Arrangements for converting the position or the displacement of a member into a coded form |
This place covers:
Keyboard interfaces and drivers; peripherals emulating a keyboard (e.g. producing "keystroke input" signals); devices providing additional buttons or foot operated switches and connected between keyboard and PC.
Also comprises KVM switches.
Attention is drawn to the following places, which may be of interest for search:
Virtual keyboards displayed on a touchscreen | |
Coding in connection with keyboards, i.e. coding of the position of operated keys |
In this place, the following terms or expressions are used with the meaning indicated:
KVM | a KVM switch allows a user to control one or multiple computer(s) from one or multiple KVM device(s) |
In patent documents, the following abbreviations are often used:
KVM | Keyboard, Video, Mouse |
This place covers:
Constructional details related to the wireless link, e.g. position of the IR transmitter/receiver as well as protocol details for the wireless transmission of keyboard codes.
Attention is drawn to the following places, which may be of interest for search:
Means for saving power, monitoring of peripheral devices | |
Information transfer between I/O devices and CPU, e.g. on bus |
In this place, the following terms or expressions are used with the meaning indicated:
Cordless keyboards | wireless keyboards; they are also often called according to the technology used: infrared keyboard, radio keyboard, WLAN keyboard, Bluetooth® keyboard |
This place covers:
Character input using a reduced number of keys, e.g. with respect to the alphabet, i.e. multivalued keys. Covers character input methods wherein a character is entered by tracing it on a matrix of switches (keys). Covers character input methods where a character is entered as a sequence of strokes on different keys or on a same key.
Attention is drawn to the following places, which may be of interest for search:
Interaction with virtual keyboards displayed on a touchscreen |
This place covers:
Keyboards or keypads having keys that can be operated not only vertically but also laterally to actuated separate switches associated to different key codes.
Attention is drawn to the following places, which may be of interest for search:
Character input using (e.g. 2 or 4 or 8) directional cursor keys for selecting characters in cooperation with displayed information |
This place covers:
Chord keyboards even if they are split in two or more parts, i.e. the predominant feature is the fact that chording is required to enter a character.
This place does not cover:
Character input using switches operable in different directions |
In this place, the following terms or expressions are used with the meaning indicated:
Chord | only an almost simultaneous depression of several keys |
Attention is drawn to the following places, which may be of interest for search:
Selecting from displayed items by using keys for other purposes than character input |
This place covers:
Character input using retrieval techniques from a database or dictionary based on previously inputted characters, e.g. for predicting and proposing word completion alternatives.
Covers inter alia T9, iTap and similar techniques.
Attention is drawn to the following places, which may be of interest for search:
Converting codes to words or guess-ahead of partial word inputs |
In this place, the following terms or expressions are used with the meaning indicated:
T9 (stands for Text on 9 keys) | a predictive text input technology for mobile phones, developed by Tegic Communications |
iTap | a predictive text technology for mobile phones, developed by Motorola |
This place covers:
Any keyboard in which the function assigned to all or some of the keys can be reprogrammed, e.g. changing alphabetical keys according to language, programming dedicated function keys.
This place does not cover:
Key guide holders |
Attention is drawn to the following places, which may be of interest for search:
Virtual keyboards on a touchscreen | |
Scrambling keyboard with display keys in electronically operated locks | |
Scrambling keyboard in electronically banking systems (POS,ATM) | |
Display on the key tops of musical instruments: | |
Switches with programmable display | |
Display on the key tops in general | |
Telephone set with programmable function keys |
Attention is drawn to the following places, which may be of interest for search:
Display of decimal point | |
Complete desk- top or hand- held calculators |
This place covers:
This group is used only for "exotic" input devices corresponding to the wording of the definition and not fitting in any of the subgroups, for example arrangements detecting the position or the displacement of tangible user interfaces comprising RFIDs tags or bar codes interacting with a surface (such as chessboard-like surface) where the position detection technique is not covered by any of the subgroups of G06F 3/03.
Example:
Attention is drawn to the following places, which may be of interest for search:
Interaction with a tangible user interface other than detecting its location or displacement | |
Electronic game devices per se | |
Coordinate identification of nuclear particle tracks | |
Telemetry of coordinates |
In this place, the following terms or expressions are used with the meaning indicated:
A Tangible User Interface (TUI) | a user interface in which a person interacts with digital information through a physical environment, i.e. by manipulating physical objects (e.g. in the same way as moving pieces of a game on a tablet), often using RFID or NFC |
In patent documents, the following abbreviations are often used:
TUI | Tangible User Interface |
RFID | Radio-Frequency IDentification |
NFC | Near Field Communication |
If the moving part is the sensor then the subject-matter belongs to G06F 3/0304, if the observed target (e.g. finger) is moving then the subject-matter belongs to G06F 3/042.
This place does not cover:
Constructional details of pointing devices not related to the detection arrangement using opto-electronic means | |
Digitisers using opto-electronic means |
Attention is drawn to the following places, which may be of interest for search:
Systems where the position detection is based on the raster scan of a cathode-ray tube (CRT) with a light pen | |
Measuring arrangements characterised by the use of optical means | |
Optical encoders | |
Position fixing using optical waves | |
Prospecting or detecting by optical means | |
Static switches using electro-optical elements in general | |
Optical switches | |
Optical touch switches |
Attention is drawn to the following places, which may be of interest for search:
Thumb wheel switches |
This place covers:
Tracking relative movement in co-operation with a regularly or irregularly patterned surface, e.g. arrangements for detecting relative movement of an optical mouse with respect to a generic surface optically detected as irregularly patterned (table, desk top, ordinary mouse pad) or with respect to a surface (e.g. mouse pad) encoded with an optically detectable regular pattern.
Arrangements for detecting absolute position of a member with respect to a regularly patterned surface, e.g. pen optically detecting position-indicative tags printed on a paper sheet.
This place does not cover:
Digitisers characterised by the transducing means |
Attention is drawn to the following places, which may be of interest for search:
Details of optical sensing in input devices | |
Arrangement for interfacing a joystick to a computer | |
Constructional details of joysticks |
For finger worn pointing devices covered by this group and its subgroups add the Indexing Code G06F 2203/0331.
In patent documents, the following abbreviations are often used:
RSI | Repetitive Stress Injury |
Attention is drawn to the following places, which may be of interest for search:
Integration of a mini joystick in a portable computer | |
Integration of a mini joystick in a keyboard | |
Sliders, in which the moving part moves in a plane | |
Details of the interface with a computer | |
Joysticks with a pivotable rigid stick | |
Switches with generally flat operating part depressible at different locations |
This place covers:
Devices sensing their own position or orientation in a three dimensional space, allowing thereby the user to input up to 6 coordinates (position + orientation) by moving the device. Covers inter alia 3D mice.
Remote control based on movements G08C.
Attention is drawn to the following places, which may be of interest for search:
3D input gestures | |
Input devices using opto-electronic sensing |
This place covers:
Pens detecting the presence of light on one point (such as a CRT scanning beam).
Light emitting pens positioned in contact or proximity of the pointed position.
Attention is drawn to the following places, which may be of interest for search:
Pens comprising an optical sensor for 1 or 2 dimensional position detection | |
Light emitting pointers per se used for marking with a light spot the pointed position from a distance |
This place does not cover:
Mouse/trackball convertible-type devices, in which the same ball is used to track the 2-dimensional relative movement |
Specific Indexing Codes G06F 2203/0332 - G06F 2203/0337 are associated to this group for some constructional details.
This place covers:
Pens other than optically sensing pens or light pens (e.g. for use in combination with a digitiser). Constructional details of pens in general irrespectively of the interaction technology.
Pens used for handwriting recognition:G06V 30/1423, G06V 10/12.
This place does not cover:
Details of optically sensing pens | |
Light pens |
This place covers:
Touch surface for sensing the relative motion of a finger over the surface.
Attention is drawn to the following places, which may be of interest for search:
Digitisers |
Specific Indexing Codes G06F 2203/0338 and G06F 2203/0339 are associated to this group for some constructional details.
This place does not cover:
Mouse/trackball convertible-type devices, in which the same ball is used to track the 2-dimensional relative movement |
Attention is drawn to the following places, which may be of interest for search:
Input arrangements for vehicle instruments | |
Incremental encoders | |
Sliding switches | |
Rotary encoding wheels -"thumb-wheel switches" |
Attention is drawn to the following places, which may be of interest for search:
Control circuits or drivers for touchscreens or digitisers | |
Graphical user interfaces (GUI) in general | |
Pointing device drivers modified to control cursor appearance or behaviour taking into account the presence of displayed objects |
This place covers:
Tracking a projected light spot generated by a light pen or a "laser pointer" indicating a position on a display surface, drivers for light pen systems.
Attention is drawn to the following places, which may be of interest for search:
Light emitting pointers per se used for marking with a light spot the pointed position from a distance | |
Light emitting pens positioned in contact or proximity of the pointed position | |
Light pen using the raster scan of a CRT |
Attention is drawn to the following places, which may be of interest for search:
Furniture aspects | |
Platforms for supporting wrists as table extension |
This place covers:
For example:
This place covers:
Position sensing of movable objects such as fingers or pens in contact with a surface or within a relative small distance to this surface (hovering).
Attention is drawn to the following places, which may be of interest for search:
Touchscreens integrated in a portable computer | |
Integration of touchpad in a portable computer (laptop, PDA) | |
3D input gestures | |
Integration of touchpad in a keyboard | |
True 3D computer input devices with a freely movable member | |
Pens for interaction between user and computer | |
Constructional details of touchpads | |
Accessories for pointing devices | |
Touch interaction within a graphical user interface [GUI] |
In this area, Indexing Codes G06F 2203/04101 - G06F 2203/04114 dealing with details which may be related to different sensing technologies are used in parallel to the classification scheme.
Subgroups G06F 3/0412 and G06F 3/0416 -G06F 3/04186 are not explicit to a specific sensing technology but describe details about the integration within a display or the driving/interface of the digitiser.
For documents belonging to these subgroups, if further relevant details related to the sensing technology are disclosed, the corresponding subgroup of G06F 3/041 that is best related to the sensing technology employed should be doubly allocated as invention information.
If the sensing technology is indicated only with minor details, the sensing technology (if any) should be indicated as additional information.
In this place, the following terms or expressions are used with the meaning indicated:
Surface | either as a physical surface or as a virtual one, such as a virtual interaction plane floating in the air |
This place covers:
Structural details and methods of driving a combination of displays with digitisers that share at least one constitutive part of both the touch sensing technology as well as the display technology (e.g. a common electrode for LCD control and a touch electrode (i.e. driving or sensing) for capacitive touch sensing, a common electrode being used as a guard/shield electrode in touch sensing, or a common electrode that is specifically floated during a touch driving/sensing period).
Examples:
Structural details and methods of driving a display and a digitizer in which the digitizer is either wholly or in part within the structural confines that make up the display panel of the display device (e.g., a sensor pixel that is adjacent to the display pixel) or the sensor is arranged to utilize at least one structural component of the display panel (e.g. such as the top substrate of the display pane).
Examples:
Attention is drawn to the following places, which may be of interest for search:
Constructional details of LCDs | |
Driving details of LED/OLED | |
Driving details of LCDs | |
Construction details of OLED displays |
Documents disclosing both a specific display panel (LCD, OLED etc.) and touch sensing are doubly classified in the relevant areas (for example: G02F for LCD, H01L for OLEDs, and G09G for methods of driving displays), pertaining to the respective types of display panels as well as in G06F 3/0412.
Devices in which a component is shared between touch detection circuitry and display driving circuitry, for example, a shared electrode for touch detection and display driving wherein the details of both the touch detection and the display driving are disclosed should be classified in the relevant areas either G09G (depending upon the type of display device) as well as in G06F 3/0412.
Devices in which construction details of both LCD panel and touch components are disclosed, but touch detection is only nominally disclosed should be classified only in G02F 1/13338 and only classified in G06F 3/0412 as an Additional.
Construction details of OLED display components integrated with touch detection components wherein the disclosure primarily concerns the OLED and minimally recites touch circuitry is classified in H10K 59/40 and only classified in G06F 3/0412 as an Additional.
This place covers:
Touch position determined by the analysis of the signals provided by pressure/force sensors.
Measuring force or stress in general: G01L 1/00.
Attention is drawn to the following places, which may be of interest for search:
Pressure sensors for measuring the pressure or force exerted on the touch surface without providing the touch position | |
Tactile force sensors | |
Force resistance touch switches | |
Piezoelectric touch switches |
This place covers:
Touch position determined by the analysis of the signals provided by a plurality (reduced number) of discrete pressure/force sensors disposed at several points of (e.g. under) the touch sensing surface, e.g. at the corners or the side of a touch sensing plate.
This place covers:
Touch position determined by the analysis of the signals provided by either virtual pressure sensors generated by intersection nodes of a grid of sensing lines interacting with a pressure sensitive medium or an array of discrete pressure/force sensors delivering a variable (not a single Boolean 0/1) signal, the array extending over the whole area of the touch sensing surface, e.g. a grid of sensors disposed under the touch sensing surface.
This place does not cover:
Position sensing using the local deformation of sensor cells |
This place covers:
Digitisers having a grid of crossing wires brought into virtual contact when pressure is exerted on the interaction surface, the virtual contact is established through a pressure sensitive layer disposed between the wire layers and made of a material that resistance diminishes under an applied pressure used to provide a "binary" output. The touch position is determined only by the contacting wires (scanning line and column) and not by the analog value of the sensed signal.
Attention is drawn to the following places, which may be of interest for search:
Tactile force sensors | |
Force resistance touch switches | |
Piezoelectric touch switches |
Attention is drawn to the following places, which may be of interest for search:
Touch interaction with a GUI |
This place covers:
Digitiser control allowing exchange of data with external devices via the digitiser sensing hardware (touch sensing electrodes, touch sensing coils, etc...), including exchange of information with smart pens as long as it concerns data transmission via the touch detection hardware.
Not for transmission of data between devices using only transmission paths other than the touch sensing hardware (e.g. wired or wireless network).
Attention is drawn to the following places, which may be of interest for search:
Remote control transmission over wireless link | |
Near-field transmission systems | |
Data switching networks | |
Mobile phones interface using two way short range wireless interface |
This place covers:
Routing between sensing electrodes and controller or connector, details on wiring and connectors.
This place covers:
For example grouping electrodes for changing the detection speed, resolution or sensitivity (including proximity distance), detection of multiple touches, detection of both pen and finger or, combination of multiple touch technologies.
This place does not cover:
Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally |
This place covers:
Synchronisation of the touch detection signals with the display (or backlight) driving signals whenever the digitiser is integrated in the display or not.
This place covers:
Correcting or resolving an ambiguous detected touch, resulting from either
- an ambiguous touch location measured by the digitiser (e.g. correcting a detected large single touch into more than one smaller and adjacent touches, a partial touch at an edge of a digitiser into a full touch, a detected touch with an unwanted detected event like hover/palm rejection, cracks, water droplets, impurities, ghost touches, or gravity center due to tilt/angle of the input device) or
- an ambiguous interaction with a GUI on a touch screen, wherein the touch location as measured by the digitiser is unambiguous (e.g. correcting a detected touch to a user intended touch position)
Documents disclosing disambiguation of an interaction with a GUI on a touch screen, wherein the touch location as measured by the digitiser is unambiguous, should be doubly classified in G06F 3/0488 and below.
Optical scanners: G06K 7/10544.
Attention is drawn to the following places, which may be of interest for search:
Pens detecting optically their absolute position with respect to a coded surface | |
Systems where the position detection is based on the screen scanning with a light pen | |
Measuring arrangements characterised by the use of optical means | |
Optical encoders | |
Position fixing using optical waves | |
Prospecting or detecting by optical means | |
Static switches using electro-optical elements in general | |
Optical switches | |
Optical touch switches |
When there is a doubt whether the subject matter belongs to G06F 3/0304 and below or to G06F 3/042 and below, the rule of thumb is: if the moving part is the sensor then it belongs to G06F 3/0304 and below, if the observed target (e.g. finger) is moving then it belongs to G06F 3/042 and below. In any case, the subclasses G06F 3/042 and below are used only in the context of interaction with a surface as defined in G06F 3/041 or in close proximity of this surface; they are not used in the context of a true 3D interactive environment.
In patent documents, the following abbreviations are often used:
FTIR | Frustrated Total Internal Reflection |
In this place, the following terms or expressions are used with the meaning indicated:
Beam | a narrow beam emitted in a given direction, not as a bright band of light or as an omnidirectional lightening; in the context of beams propagating from one side towards receivers on the opposite side in a grid like arrangement, the beam may have a triangular (or conical) shape with a slightly broader opening angle in order to be sensed by several receivers on the opposite side but not covering the whole array of receivers. |
Attention is drawn to the following places, which may be of interest for search:
Details of moving scanning beam in optical scanners |
This place covers:
Also documents where the acoustic wave is produced by knocking or rubbing the movable member (finger or pen) on the touch surface without any other vibration generator.
Attention is drawn to the following places, which may be of interest for search:
In patent documents, the following abbreviations are often used:
SAW | Surface Acoustic Waves |
This place covers:
Position detection using pens able either to emit acoustic waves using a dedicated wave generator (e.g. piezoelectric or mechanical vibrators, ultrasound generators or sparks) or to sense the propagating waves arriving through the surface.
Attention is drawn to the following places, which may be of interest for search:
Documents where the movable member (finger or pen) generates the waves but has no acoustic source | |
Piezoelectric vibrators |
This place covers:
Passive movable member (finger or pen) disturbing the propagating waves within the substrate.
Attention is drawn to the following places, which may be of interest for search:
Means for converting the output of a sensing member to another variable by varying capacitance | |
Capacitive proximity switches | |
Capacitive touch switches |
This place covers:
Digitisers using the capacitive coupling between the edge of a pointing pen or a similar sensing device and touch sensing conductors (electrodes) of the position sensing surface wherein the pen detects changes in electric potential of the conductors generated by the tablet (e.g. tablet driving signals); corresponding to JP FI: G06F 3/044.
Attention is drawn to the following places, which may be of interest for search:
Transmission of data between devices using the touch sensing hardware as transmission path |
This place covers:
Digitisers using the capacitive coupling between the edge of a pointing pen or a similar input device and touch sensing conductors (electrodes) of the position sensing surface wherein active pens generate changes in electric potential of tablets, corresponding to JP FI: G06F 3/044.
Attention is drawn to the following places, which may be of interest for search:
Transmission of data between devices using the touch sensing hardware as transmission path |
This place covers:
Digitisers using a single layer of sensing electrodes, i.e. sense and/or drive electrodes. The electrodes may be interconnected by bridges at crossings. The connecting bridge may be in another layer but all the sensing electrodes are in the same one.
This place covers:
Digitisers using a single layer of sensing electrode which is made of a single piece of conducting material extending on the detection area and covered by a dielectric material.
This place covers:
Digitisers using at least two layers of sensing electrodes, i.e. sense and/or drive electrodes, separated either by a solid dielectric layer or by a gap which could be filled by a dielectric material.
This place covers:
Digitisers comprising a plurality of sets of parallel sensing and/or driving electrodes extending in at least two crossing directions; each "row" or "column" electrode may be either a single piece electrode or a plurality of interconnected electrodes (e.g. via bridges over the electrodes in the crossing direction) making a virtual electrode extending along the given direction.
This place covers:
Digitisers comprising an array of cells, e.g. made by the crossing of "row" and "column" electrodes, which are deformed under the pressure of a touching object, inducing a change in their capacitance.
This place covers:
The electrodes have shapes optimised to obtain a specific effect, e.g. increasing fringe field, better resolution or avoiding moiré effect.
If the electrode design or pattern exhibits an irregular or non-conventional shape without mentioning any specific effect then this symbol should be allocated as additional information.
Attention is drawn to the following places, which may be of interest for search:
Touch switches |
Attention is drawn to the following places, which may be of interest for search:
Resistive potentiometers | |
Resistive touch switches |
Attention is drawn to the following places, which may be of interest for search:
Means for converting the output of a sensing member to another variable by varying inductance | |
Electromagnetic proximity switches using a magnetic detector |
This place covers:
Digitisers having a grid of crossing wires brought into contact when pressure is exerted on the interaction surface. The contact may be a direct contact or through a pressure sensitive switch making a connection between the wires. It includes arrays of switches integrated in a display where a galvanic contact is established between rows and columns when the user presses the display surface.
When wires or switches are integrated in a display, G06F 3/0412 should also be used.
This place covers:
Subject matter where the focus is on the way the user can interact with the displayed data, usually by means of pointing devices, irrespective of the type of data treated by the software application or the type of device embedding data processing capability.
As to the design of an interaction technique, this is most commonly determined by one or more of three factors, also in combination:
- the specific behaviour or appearance, of the graphical element or virtual environment;
- the kind of input events that can be generated by a specific input device used to interact with the displayed elements of the GUI;
- the type of operation or function to be performed with relation to these elements.
GUIs are widely used to interact with any type of software application, (e.g. operating system, word-processing or information retrieval applications, spreadsheets, etc.), executed on a general-purpose computer or on a specific device (e.g. car navigation system, telephone, photocopy machine).
Documents mentioning or implying the presence of a standard GUI in the context of the disclosure of a specific software application or a specific device capable of processing data related to its specific function, should be in general classified in the appropriate subclasses related to those software applications or specific devices.
Attention is drawn to the following places, which may be of interest for search:
Hardware interface between computer and display | |
User interface programs, e.g. command shells, help systems, UIMS | |
Input/output arrangements of navigation systems | |
Program-control in industrial systems | |
Drawing of charts or graphs | |
Editing figures and text | |
Control arrangements or circuits for visual displays | |
Display of multiple viewports | |
Interaction with a remote controller on a TV display | |
End user interface for interactive television or video on demand |
In patent documents, the following abbreviations are often used:
GUI | Graphical User Interface |
In this place, the following terms or expressions are used with the meaning indicated:
Cursor (also called (mouse) pointer) | an indicator used to show the position on a computer display that will respond to input from a text input or pointing device |
Attention is drawn to the following places, which may be of interest for search:
Interaction techniques based on cursor behaviour involving tactile or force feedback | |
Interaction techniques for the selection of a displayed object |
Attention is drawn to the following places, which may be of interest for search:
Video games | |
Navigational instruments, e.g. visual route guidance using 3D or perspective road maps (including 3D objects and buildings) | |
3D image rendering in general | |
Perspective computation in 3D image rendering | |
Navigation within 3D models or images (Walk- or flight-through a virtual museum, a virtual building, a virtual landscape etc.) |
This place covers:
Documents describing icons having a specific ( or unconventional ) design or specific properties.
This place does not cover:
Graphical programming languages using iconic symbols |
Attention is drawn to the following places, which may be of interest for search:
User interfaces specially adapted for operating a cordless or mobile telephone by selecting functions from two or more displayed items, e.g. menus or icons | |
Menu-type displays in TV receivers |
This place covers:
Documents which relate to tabs.
Interaction techniques of e-books when they are heavily book-inspired.
Attention is drawn to the following places, which may be of interest for search:
Electronic books, also known as e-books |
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Edit or processing of text |
This place covers:
GUI interaction techniques specifically designed for selecting a displayed object, e.g. a window or an icon.
Selection by a pointing device (in the sense of G06F 3/03) such as a mouse, a joystick, a digitiser, etc.
This place does not cover:
Interaction with lists of selectable items, e.g. menus |
There are some older documents relating to selection by keyboard classified here. However, all new documents related to the latter are now classified in G06F 3/0489.
Every time a set of displayed of objects can be consider as structured as a "list of selectable items", the interaction technique for selecting an item should be classified in G06F 3/0482.
This place covers:
Image manipulation, e.g. dragging or rotation of the whole image, resizing of objects, changing their colour etc.
Attention is drawn to the following places, which may be of interest for search:
Image data processing or generation, in general | |
Editing figures and text; Combining figures or text |
This place covers:
Documents dealing with panning control.
In this place, the following terms or expressions are used with the meaning indicated:
Scrolling | "Dragging" in some applications, i.e. depicting a user gesture which is not causing a motion of a previously selected object, but rather a motion of a reference within a given context. |
This place covers:
Drag and drop operations comprise moving by the user a previously selected object, and finally releasing said object.
Attention is drawn to the following places, which may be of interest for search:
Interaction techniques to control scrolling |
In this place, the following terms or expressions are used with the meaning indicated:
Dragging | "Scrolling", i.e. depicting a user gesture which is not causing a motion of a previously selected object, but rather a motion of a reference within a given context. |
Attention is drawn to the following places, which may be of interest for search:
Constructional details of digitisers | |
Details of input/output arrangements of navigation systems including use of a touch screen and gestures |
Attention is drawn to the following places, which may be of interest for search:
3D input gestures | |
Handwriting per se | |
Digital ink recognition | |
Signature recognition |
This place covers:
Virtual keyboards displayed on a touchscreen or as a template on a tablet.
Attention is drawn to the following places, which may be of interest for search:
Arrangements for projecting a virtual keyboard in a portable computers | |
Character input methods like chording, prediction or disambiguation used on a keyboard | |
Programmable (hardware) keyboards | |
Entering handwritten data, e.g. gesture or text | |
Converting codes to words or guess-ahead of partial word inputs |
This place covers:
The use of keyboard keys dedicated to specific functions, e.g. <Scroll Lock>, <Home>, <PgUp> keys, as well as the use of specific combinations of keyboard keys, e.g. <Ctrl>+<A>, <Ctrl>+<C>, whereby the "+" means that the two keys have to be pressed together.
Attention is drawn to the following places, which may be of interest for search:
Selecting from displayed items by using keys for character input | |
Automatic teller machines (ATM) | |
Adjusting display parameters |
This place does not cover:
Arrangements for controlling cursor position based on coordinate signals |
Attention is drawn to the following places, which may be of interest for search:
Sample-and-hold arrangements | |
Sampling per se |
Attention is drawn to the following places, which may be of interest for search:
Error detection, error correction, monitoring per se regarding storage systems | |
Accessing or addressing within memory systems or architectures | |
Information retrieval | |
Recording or reproducing devices per se |
This place covers:
Physical and/or logical interfaces between a host or a plurality of hosts and a storage device or a plurality of storage devices or storage system related to data/command path and data placement techniques.
Storage devices include devices with rotating magnetic and optical storage media as well as solid state devices, or non-volatile electronic storage elements.
Interfaces to an emulated rotating storage device in (flash) memory.
Attention is drawn to the following places, which may be of interest for search:
Error detection, error correction, monitoring per se | |
Accessing, addressing or allocation within memory systems | |
Interconnection of, or transfer of information between memories, I/O devices, CPUs | |
File systems; file servers | |
Recording or reproducing devices per se | |
Cryptographic protocols | |
Network security protocols | |
Protocols for real-time services in data packet switching networks | |
Network protocols for data switching network services |
Each document should receive regarding "invention information":
- at least one classification in the range G06F 3/0602 - G06F 3/0626 for the technical effect achieved and
- at least one classification in the range G06F 3/0628 - G06F 3/0667 for the technique used and
- at least one classification in the range G06F 3/0668 - G06F 3/0689 for the infrastructure involved.
The classification of "additional information" is optional. CPC symbols in the range G06F 2206/1004 - G06F 2206/1014 should be used for classifying "additional information".
In this place, the following terms or expressions are used with the meaning indicated:
Storage system | An integrated collection of (a.) storage controllers and/or host bus adapters, (b.) storage devices such as disks, CD-ROMs, tapes, media loaders and robots, and (c.) any required control software, that provides storage services to one or more computers |
In patent documents, the following words/expressions are often used as synonyms:
- host
- computer
- PC
- PDA
- smartphone
- (micro)processor
- CPU
- terminal
- client
This place covers:
Facilitating administration like automating recurrent tasks, selecting and presenting management information to the system user or administrator.
This place covers:
Facilitating administration in relation to modification of existing systems, improving compatibility and scalability.
This place covers:
Effects leading to the reduction of the volume of data stored and the storage space requirements e.g. storage efficiency: the ratio of storage system's effective capacity to its raw capacity.
This group is often combined with the technique G06F 3/0641: data de-duplication.
This place covers:
Reducing I/O operation latency time, i.e. the time between the making of an I/O request and the completion of the request's execution.
This place covers:
Increasing I/O operation throughput, i.e. the number of I/O requests satisfied in a given time e.g. expressed in I/O requests/second (IOPS).
This place covers:
Only reliability effects with a technique specific for G06F 3/06 should be classified in this subgroup range.
Attention is drawn to the following places, which may be of interest for search:
Error detection or correction by redundancy in operation | |
Redundancy in hardware using active fault-masking |
This place covers:
Increasing the life expectancy measured in e.g. Mean Time Between Failures (MTBF)
Attention is drawn to the following places, which may be of interest for search:
User address space allocation in block erasable memory: | |
Auxiliary circuits for EPROMs: |
The subject covered by this group is often described in relation to non-volatile semiconductor memory (arrays), which are, as peculiar storage infrastructure, also classified in G06F 3/0679 or G06F 3/0688
This place covers:
Increasing availability, i.e. the amount of time the system is available during those time periods it is expected to be available, measured in e.g. hours of downtime in a year.
Attention is drawn to the following places, which may be of interest for search:
Redundancy in operation: | |
Redundancy in hardware using active fault-masking: |
This place covers:
Avoiding data to be altered or lost in operation or by accident.
Attention is drawn to the following places, which may be of interest for search:
Adding special bits or symbols to the coded information in memories: | |
Backing up (Point in time copy), restoring or mirroring files or drives: | |
Redundancy in hardware by mirroring: | |
Error detection or correction in digital recording or reproducing: |
Attention is drawn to the following places, which may be of interest for search:
Protecting data against unauthorised access or modification | |
Protecting computer components used for data storage | |
Arrangements for network security |
This place covers:
Securing storage systems by preventing unauthorised access to the storage system, e.g. with a password.
This place covers:
Securing storage systems by protecting the data content, e.g. by scrambing the content.
This place covers:
Reducing the power consumption of a storage system, i.e. power efficiency.
Power saving in storage systems with a plurality of storage devices external to the computer.
Attention is drawn to the following places, which may be of interest for search:
Power saving in a single storage device inside a computer | |
Driving, starting, stopping record carriers |
This group is usually combined with the technique G06F 3/0634 (configuration or reconfiguration of storage systems by changing the state or mode of one or more devices).
This group is usually combined with the infrastructure G06F 3/0689 (disk arrays) or G06F 3/067 (distributed storage).
This place covers:
Reducing the physical size, simplifying the physical integration of storage systems
This group is often combined with G06F 3/0658 (controller construction) in order to characterise the technique for the "invention information", e.g. System On Chip (SOC) controller.
This place covers:
This group is the hierarchical head group for the range G06F 3/0629 - G06F 3/0667 related to particular storage techniques and is not used for classification.
This place covers:
Configuration or reconfiguration aspects.
The general management of storage system features and behaviours through the control of changes made to hardware, software, firmware and related resources throughout the life cycle of the storage system.
This place covers:
Allocating physical and/or logical storage resources, including storage elements, storage devices, appliances, virtual devices, disk volume and file resources.
Virtualisation techniques for the allocation of storage areas such as thin-provisioning are classified in G06F 3/0665.
Attention is drawn to the following places, which may be of interest for search:
Management of already existing partitions | |
Allocation of resources in multiprogramming arrangements | |
Addressing or allocation |
This place covers:
- The startup and initial configuration of a storage device, system, piece of software or network.
- The process of installing or removing hardware or software components required for a system or subsystem to function.
- Assignment of the operating parameters of a system, subsystem or device, such as designating a disk array's member disks or extents and parameters such as stripe depth, RAID model, cache allowance, etc.
- The collection of a system's hardware and software components and operating parameters.
Attention is drawn to the following places, which may be of interest for search:
Program loading or initiating |
In this place, the following terms or expressions are used with the meaning indicated:
Discovery of storage device array configuration | Assignment of the disks and operating parameters for a disk array by setting parameters such as stripe depth, RAID model, cache allowance, spare disk assignments, etc. The arrangement of disks and operating parameters that results from such an assignment. |
This place covers:
Changing the operating state or mode or parameters of one or more storage devices e.g. changing the rotational speed (measured in RPM) or powering on/off or spinning up/down one or more storage devices.
This group is often assigned when there is a power saving effect mentioned see G06F 3/0625
In this place, the following terms or expressions are used with the meaning indicated:
Massive Array of Idle Disks (MAID) | A storage system comprising an array of disk drives that are powered down individually or in groups when not required. MAID storage systems reduce the power consumed by a storage array, at the cost of increased Mean Time To Data. |
In patent documents, the following abbreviations are often used:
MAID | Massive Array of Idle Disks |
This place covers:
Changing the configuration of a storage system by changing the interconnections in between storage system components or changing the routes over which the data flows from the host to the storage device and vice versa e.g. storage switches, storage ports, routing aspects in storage systems.
Attention is drawn to the following places, which may be of interest for search:
Distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] |
This group is usually combined with G06F 3/0607: improving administration by facilitating the process of upgrading existing storage systems.
In this place, the following terms or expressions are used with the meaning indicated:
Access path | The combination of adapters, addresses and routes through a switching fabric used by a computer to communicate with a storage device. |
This place covers:
Techniques related to the right of a user or host or group of users or group of hosts to access specific parts of a storage system, e.g. zoning, locking , shared access
Attention is drawn to the following places, which may be of interest for search:
Protecting computer components used for data storage | |
Access control in arrangements for network security e.g. Access Control Lists (ACL) |
This group is usually combined with the effect G06F 3/0622: securing storage system in relation to access
This place covers:
Data organising, formatting or addressing, e.g. compression of data in general in a storage interface.
Mapping aspects: conversion between two address spaces, such as the conversion between physical disk block addresses and logical disk block addresses of virtual disks presented to operating environments by control software, i.e. by using mapping tables which contain the correspondence between the two address spaces being mapped to each other.
Partitioning of storage systems, i.e. the creation of partitions.
- Creation of partitions in a formatted disk is classified in G06F 3/0638.
- Allocation of existing partitions is classified in G06F 3/0631.
Attention is drawn to the following places, which may be of interest for search:
Translation of protocol format and protocol data in a data movement | |
Image compression | |
Audio compression | |
Time compression or expansion in a recording device | |
Compression in general | |
Data compression in computer networks | |
Video compression |
In this place, the following terms or expressions are used with the meaning indicated:
Partitioning | Presentation of the usable storage capacity of a disk or array to an operating environment in the form of several virtual disks whose aggregate capacity approximates that of the underlying physical or virtual disk. Partitioning is common in MS-DOS, Windows, and UNIX environments. Partitioning is useful with hosts that cannot support the full capacity of a large disk or array as one device. It can also be useful administratively, for example, to create hard subdivisions of a large virtual disk. |
This place covers:
Techniques related to the management of blocks in storage systems
In this place, the following terms or expressions are used with the meaning indicated:
Block | The unit in which data is stored and retrieved on disk and tape devices; the atomic unit of data recognition (through a preamble and block header) and protection (through a CRC or ECC). |
Block addressing | An algorithm for uniquely identifying blocks of data stored on disk or tape media by number, and then translating these numbers into physical locations on the media. |
This place covers:
Techniques related to data de-duplication, i.e. the replacement of multiple copies of data - at variable levels of granularity - with references to a shared copy in order to save storage space and/or bandwidth.
Attention is drawn to the following places, which may be of interest for search:
Using de-duplication of the data stored as backup | |
File systems; File servers | |
Compression in general |
This group is usually combined with G06F 3/0608: saving storage space
This place covers:
Techniques related to the management of files in storage systems, e.g. low level file system aspects like File Allocation Tables (FAT)
Attention is drawn to the following places, which may be of interest for search:
User address space allocation | |
File systems; file servers | |
Processing unordered random access data using directory or table look-up | |
Table of contents on record carriers (VTOC) |
This place covers:
Techniques related to the management of space entities in storage systems, e.g. management of partitions, extents, pools
Attention is drawn to the following places, which may be of interest for search:
Creation of space entities (allocating resources to storage systems) | |
User address space allocation | |
File systems; File servers | |
Table of contents on record carriers (VTOC) | |
Distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] |
This place covers:
Aspects of horizontal moving of data between storage devices or systems.
This place covers:
Movement of data or information between information systems, formats, or media. Migration is performed for reasons such as possible decay of storage media, obsolete hardware or software (including obsolete data formats), changing performance requirements (see tiered storage), the need for cost efficiencies etc.
HSM and Tiered storage aspect are usually combined with G06F 3/0685 (hierarchical storage) in order to characterise the infrastructure.
In this place, the following terms or expressions are used with the meaning indicated:
Tiered storage | Storage that is physically partitioned into multiple distinct classes based on price, performance or other attributes. Data may be dynamically moved among classes in a tiered storage implementation based on access activity or other considerations. |
Hierarchical Storage Management (HSM) | The automated migration of data objects among storage devices, usually based on inactivity. Hierarchical storage management is based on the concept of a cost-performance storage hierarchy. By accepting lower access performance (higher access times), one can store objects less expensively. |
This place covers:
Data Lifecycle Management (DLM) comprising the policies, processes, practices, services and tools used to align the business value of data with the most appropriate and cost-effective storage infrastructure from the point in time when data is created through its final disposition. Data is aligned with business requirements through management policies and service levels associated with performance, availability, recoverability, cost, etc. DLM is a subset of Information Lifecycle Management (ILM).
By automatically moving less frequently accessed objects to lower levels in the hierarchy, higher cost storage is freed for more active objects, and a better overall cost to performance ratio is achieved
Attention is drawn to the following places, which may be of interest for search:
File systems; File servers | |
Details of archiving in file system administration | |
Details of hierarchical storage management (HSM) systems |
In patent documents, the following words/expressions are often used as synonyms:
- Retention policy
- Retention time
This place covers:
Replication is the technique of sharing information so as to ensure consistency between redundant resources, such as software or hardware components, to improve reliability, fault-tolerance, or accessibility.
Attention is drawn to the following places, which may be of interest for search:
Backing up (Point in time copy), restoring or mirroring files or drives | |
Redundancy in hardware by mirroring |
This group is usually combined with G06F 3/0614 (improving the reliability of storage systems) and subgroups in order to characterise the effect achieved by the replication mechanism.
In patent documents, the following words/expressions are often used as synonyms:
- Remote copy
- Mirroring
- Snapshot
This place covers:
Erasing of data in storage systems including secure erasure.
Attention is drawn to the following places, which may be of interest for search:
File systems; File servers | |
Delete operations in file systems | |
Cleaning, erase control related to flash memory management | |
Clearing memory, e.g. to prevent the data from being stolen |
This group is often combined with G06F 3/0623 (securing storage systems in relation to content) in order to characterise the effect achieved by the invention
In this place, the following terms or expressions are used with the meaning indicated:
Data shredding | The technique of deleting data that is intended to make the data unrecoverable. One such process consists of repeated overwrites of data on disk. Data shredding is not generally held to make data completely unrecoverable in the face of modern forensic techniques—that requires shredding of the disks themselves. |
This place covers:
Monitoring aspects related to storage interfaces, i.e. extra functionality for observing properties of a running storage device or storage system in its normal operating conditions without inputting test data.
Attention is drawn to the following places, which may be of interest for search:
Thermal management in cooling means | |
Power management | |
Monitoring for error detection | |
Verification or detection of system hardware configuration: | |
Monitoring per se of computing systems | |
Intrusion detection | |
Monitoring of control systems | |
Monitoring, i.e. supervising the progress of recording or reproducing | |
Network monitoring | |
Network monitoring to detect or protect against malicious traffic | |
Monitoring testing in wireless networks |
This place covers:
Arrangements using one or more buffers whereby a buffer is a memory device or programming construct, used to hold data momentarily as it moves along an I/O path or between software components.
Typically, a solid state memory device is used as a buffer. However, any storage device with faster access properties in relation to the storage device it is buffering can be used, e.g. a disk drive can act as a buffer for a tape device.
Attention is drawn to the following places, which may be of interest for search:
Changing the speed of data flow, e.g. FIFO buffers per se | |
Partitioned buffers | |
Caches for peripheral storage systems, e.g. disk caches | |
Detection or prevention of read or write errors by using a data buffer |
In this place, the following terms or expressions are used with the meaning indicated:
Buffer | A region of a physical memory storage used to temporarily hold data while it is being moved from one place to another. It often adjusts timing by implementing a queue algorithm in memory, simultaneously writing data into the queue at one rate and reading it at another rate. |
In patent documents, the following words/expressions are often used as synonyms:
- FIFO
- queue
This place covers:
Constructional details of the storage interface not elsewhere provided for.
Physical connecting arrangements not elsewhere provided for.
Hardware arrangements of storage interface components like processors, bridges, offload engines, state machines
Attention is drawn to the following places, which may be of interest for search:
Information transfer on a bus, bus structures | |
Disposition of constructional parts in recording /reproducing devices | |
Electrical connectors |
This place covers:
Techniques related to command decoding and execution and command transformation and routing including command buffering, command queuing, command scheduling
Attention is drawn to the following places, which may be of interest for search:
Data buffering |
In this place, the following terms or expressions are used with the meaning indicated:
I/O scheduling | Term used to describe the method computer operating systems decide the order in which block I/O operations will be submitted to storage volumes. |
In patent documents, the following words/expressions are often used as synonyms:
- I/O scheduling
- disk scheduling
This place covers:
Techniques related to the conversion of recording formats, e.g. conversion from Count Key Data (CKD) format from a mainframe to Fixed Block Architecture (FBA) format of an open systems computer.
Techniques related to the conversion of storage protocols; bridging hardware e.g. conversion from Small Computer System Interface (SCSI) protocol to an Advanced Technology Attachment (ATA) protocol.
Attention is drawn to the following places, which may be of interest for search:
Information transfer using universal interface adapter: | |
Coupling between buses in general using bus bridges |
This place covers:
Storage virtualisation refers to:
- The act of abstracting, hiding, or isolating the internal functions of a storage (sub)system or service from applications, host computers, or general network resources, for the purpose of enabling application and network-independent management of storage or data.
- The application of virtualisation to storage services or devices for the purpose of aggregating functions or devices, hiding complexity, or adding new capabilities to lower level storage resources.
This place covers:
Devices presented to an operating environment by control software or by a volume manager. From an application standpoint, a virtual device is equivalent to a physical one. In some implementations, virtual devices may differ from physical ones at the operating system level, e.g., booting from a host based disk array may not be possible.
Storage device emulation, e.g. disk emulation.
Storage (sub)system emulation, e. g. Virtual Tape System.
Port virtualisation on a storage network switch, storage interface virtualisation.
Attention is drawn to the following places, which may be of interest for search:
Program control for peripheral devices where the program performs an input/output emulation function |
In this place, the following terms or expressions are used with the meaning indicated:
Virtual disk | A set of disk blocks presented to an operating environment as a range of consecutively numbered logical blocks with disk-like storage and I/O semantics. |
Virtual tape | A virtual device with the characteristics of a tape. |
Virtual tape: a virtual device with the characteristics of a tape.
This place covers:
Storage area virtualisation, i.e. the act of applying virtualisation to one or more area based (storage) services for the purpose of providing a new aggregated, higher level—e.g., richer, simpler, more secure—storage area service to clients.
Thin provisioning.
Dynamic allocation of logical volumes.
In this place, the following terms or expressions are used with the meaning indicated:
Thin provisioning (also, dynamic provisioning) | A technology that allocates the physical capacity of a volume or file system as applications write data, rather than preallocating all the physical capacity at the time of provisioning. |
This place covers:
Object virtualisation:
- The use of virtualisation to present several underlying objects as one single composite object.
- The use of virtualisation to present an integrated object interface when object data and metadata are managed separately in the storage system.
Attention is drawn to the following places, which may be of interest for search:
File systems; File servers |
In this subrange, the physical storage infrastructure should be classified and not the virtualised infrastructure if present. If the virtualised storage infrastructure is important, this should be classified in G06F 3/0664.
This place covers:
Architectures comprising multiple storage systems interconnected by a network allowing access from multiple hosts with emphasis on storage related aspects.
Depicted below, an exemplary connection of storage device to a host through a network.
Attention is drawn to the following places, which may be of interest for search:
Distributed file systems implemented using NAS architecture | |
Distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] |
This place covers:
Architectures with a direct host to storage system connection attachment.
Depicted below, an exemplary connection of storage device(s) to a host through a direct connection.
This place covers:
Storage systems comprising a single controller controlling one or more storage media, e.g. drums.
Depicted below, an exemplary architecture for a single storage device.
This place covers:
Storage devices being a spinning disk drive, i.e. a non-volatile, randomly addressable, data storage device.
This place covers:
Storage devices being a magnetic disk drive, e.g. HDD, DASD.
This place covers:
Optical disk drives, e.g. CDROM, DVD, WORM optical disk.
This place covers:
Semiconductor storage devices, e.g. SSD (solid state drive), flash memory, one time programmable memory (OTP).
Attention is drawn to the following places, which may be of interest for search:
Low level flash management such as logical to physical address mapping, erase management and wear levelling | |
Auxiliary circuits for EPROMs |
This place covers:
Storage devices comprising a controller and multiple storage medium types, e.g. magnetic and semiconductor mediums sharing the same controller.
This place covers:
Storage devices being spinning tape devices, i.e. a non-volatile, serial addressable data storage device.
Attention is drawn to the following places, which may be of interest for search:
Digital recording/reproducing, formatting on tapes |
This place covers:
Storage systems comprising multiple controllers and a plurality of storage devices.
This place covers:
Storage systems comprising multiple controllers and multiple storage medium types, e.g. SSD, HDD and tapes combined; FC-HDD, SATA-HDD, SCSI-HDD combined.
Attention is drawn to the following places, which may be of interest for search:
User address space allocation in block erasable memory | |
Auxiliary circuits for EPROMs |
This place covers:
Storage systems providing automatic access to multiple media cartridges typically via an automatic loading robot, e.g. tape library, media changer, juke box.
Attention is drawn to the following places, which may be of interest for search:
Control of automated cassette changing arrangements | |
Control systems for magazines of disc records |
This place covers:
Storage systems comprising multiple controllers and multiple semiconductor storage devices.
This place covers:
Storage systems comprising multiple controllers and multiple spinning disk drives, e.g. RAID, JBOD.
Attention is drawn to the following places, which may be of interest for search:
Error Correction Coding (ECC) for RAID |
In this place, the following terms or expressions are used with the meaning indicated:
RAID | Redundant Array of Independent Disks (originally: of Inexpensive disks) |
JBOD | Just a Bunch Of Drives |
This place covers:
Interfaces between a host or a plurality of hosts and a memory card reader or a plurality of memory card readers in relation to the data/command path and data placement techniques.
Attention is drawn to the following places, which may be of interest for search:
Information transfer using universal interface adapter | |
Methods or arrangements for sensing record carriers | |
Memory card, integrated circuit (IC) card, smart card, record carriers for use with machines and with at least a part designed to carry digital markings | |
Record carriers with integrated circuit chips | |
Coded identity card or credit card with a coded signal | |
Active credit-cards provided with means to personalise their use |
In patent documents, the following words/expressions are often used as synonyms:
- Memory card
- Integrated Circuit (IC) card
- Smart card
- Intelligent card
- Active card
This place covers:
Old technology related to interfaces with typewriters.
Not used for classification of new documents.
Attention is drawn to the following places, which may be of interest for search:
Digital output to typewriter | |
Arrangements for producing a permanent visual presentation of the output data using printers |
This place covers:
Interfaces between a host or a plurality of hosts and a printer device or a plurality of printer devices. Techniques for preparing the print job, sending it to a printer and printing it.
This place does not cover:
Digital output to typewriter | |
Controlling a printer in view of its graphical performance | |
Printing of alphanumeric characters | |
Special arrangements for scanning and reproduction of pictures, e.g. photographs, facsimile |
This group contains older documents (published before the year 2000) from which the majority are not reorganised in the G06F 3/1201 and its subgroups. No new/recent documents should be classified in G06F 3/1201.
Each new document should receive regarding "invention information":
- at least one class in the sub-groups of G06F 3/1202 for the technical effect achieved;
- at least one class in the sub-groups of G06F 3/1223 for the technique used and
- optionally one class in the sub-groups of G06F 3/1278 for the infrastructure involved.
Class in G06F 3/1278 is added only if the infrastructure plays a major role in the "invention information".
The classification of "additional information" is optional.
Indexing Code symbols in the sub-groups of G06F 3/1202 and/or G06F 3/1223 and/or G06F 3/1278 and/or G06F 2206/15 should be used for classifying "additional information".
The older documents should be retrieved using Indexing Codes:
- G06F 3/1293 Printer information exchange with computer;
- G06F 3/1294 Status or feedback related to information exchange;
- G06F 3/1295 Buffering means;
- G06F 3/1296 Printer job scheduling or printer resource handling;
- G06F 3/1297 Printer code translation, conversion, emulation, compression; Configuration of printer parameters;
- G06F 3/1298 Printer language recognition, e.g. program control language, page description language.
The "additional information" can be found by combining the above Indexing Code(s) with the Indexing Code G06F 3/1201.
In patent documents, the following words/expressions are often used as synonyms:
- "image forming device/apparatus", "image processing device/apparatus", "image printing device/apparatus", "image output device/apparatus", "image control device/apparatus" and "information processing device/apparatus" and "MFP Multi-Function Printer"
This group is not used for classifying documents in it, but to introduce one of the three classification criteria mentioned in the "Special rules for classification" section of G06F 3/1201.
This place covers:
All general aspects of printing management which do not fit in the sub-groups.
This place covers:
Preventing the user or operator from / avoiding the need for doing complicated and burdensome actions related to the printing of a document.
This place covers:
Assisting or helping the user during print job configuration, e.g. increasing granularity in job configuration, achieving more customised settings, proposing suitable settings, preventing selection of incompatible or undesirable print options.
This group is usually combined with G06F 3/1253 and its sub-groups in order to characterise the technique for the "invention information".
This place covers:
Assisting or helping the user to send a print job regardless of the format or type of data that should be printed. Facilitating usage of old print systems with new print systems, more specifically when compatibility between old data formats and new data formats should be achieved.
This place covers:
All aspects that make the user aware of what happened with the print job after it being sent.
This group is usually combined with G06F 3/1259 and its sub-groups in order to characterise the technique for the "invention information".
This place covers:
Assisting the user to increase the quality of print output (e.g. matching print output to what was intended by the user, increasing the appeal of the print output), e.g. by using preview screens, test printing. Actions or processing directed to higher fidelity.
This group is usually combined with G06F 3/1253 and its sub-groups in order to characterise the technique for the "invention information".
This place covers:
Facilitating usage of old print systems with new print systems, more specifically when compatibility between protocols should be achieved. Modifying/enhancing legacy communication protocols to extend their use into (additional) printing environments or print-related functionality (e.g. modifying Bluetooth to adapt to printing --> Basic Printing Profile (BPP)).
This place covers:
Assisting or helping the user to predict or deal with faults, e.g. device faults, lack of consumables, communication errors. Recovering from faults.
Attention is drawn to the following places, which may be of interest for search:
Error or fault reporting or storing |
This place covers:
All aspects of making the job to be printed faster that do not fit in the sub-groups.
This place covers:
Decreasing the time between sending a print job (e.g. pressing "print" button) and actual start of the same job at the print device.
This place covers:
Achieving decreasing the time at the node where the job is either temporarily stored (e.g. computer, server, printer) or actually printed (the printer).
This place covers:
Achieving decreasing the time at the node where the job is initiated from (e.g. computer, server, printer).
This place covers:
Decreasing the time actually spent to print the job, once printing has commenced, at the print device.
This place does not cover:
Reducing the time between arriving of the job at the printer till actual print process starts. |
This place covers:
Decreasing the time during which the printer is doing nothing.
This place covers:
Saving resources of the printer used for printing a job.
This place covers:
Preventing waste of used consumables (see for example US2011051164).
This place covers:
Optimal usage of system's hardware resources.
This place does not cover:
Reducing the number of required printer devices |
This place covers:
Power saving; reducing energy consumption.
This group is usually combined with G06F 3/1229 and its sub-groups in order to characterise the technique for the "invention information".
This place covers:
Adding secure aspects to a print job. Preventing unauthorised printing of a job, limiting the printing based on user credentials.
This group is usually combined with G06F 3/1238, G06F 3/1239 or G06F 3/1234 in order to characterise the technique for the "invention information".
This group is not used for classifying documents in it, but to introduce one of the three classification criteria mentioned in the "Special rules for classification" section of G06F 3/1201.
This place covers:
All aspects that deal with the software or hardware resources of the client or server which do not fit in the sub-groups (see e.g. US2011013223, US2009007151).
This place covers:
Updating or installing printer drivers on the client or server. Adding additional functionality to existing printer drivers (e.g. installing plug-ins, downloading printer definition files). Support for newly installed printers by replacing/updating existing drivers.
This place covers:
The client or the server sends requests to find suitable printers for printing based on certain requirements, e.g. colour, double side printing, finishing options, status, location, supported encryption, etc.
Attention is drawn to the following places, which may be of interest for search:
Device discovery specifically adapted for a queued job and aiming at e.g. load balancing or optimised printing | |
Network management | |
For service discovery | |
Network services | |
Network applications for service discovery |
This place covers:
Printer properties and commands to invoke/execute the printing properties are described in a separate file and can be used by an application program to convert a print job according to certain printer properties without a printer driver. The file can be used by the printer driver as well, e.g. for supporting different printers (see e.g. "Service Item File" in US6897974).
This place does not cover:
Driverless printing |
This place covers:
Specific printer drivers are not used but also printer definition files are not used. Usually a thin client with limited resources is involved. Generic drivers normally are designed to support plurality of different types/models of printers and/or different operating systems.
This place covers:
Device status when checked only in relation to printing of a job - power-level (e.g. on, off, power saving mode), operating or not, reasons for the malfunctions. Logging of device status. All aspects for managing the device which do not fit in the sub-groups.
Attention is drawn to the following places, which may be of interest for search:
Print job status | |
Network management | |
for service discovery | |
Network services | |
Network applications for service discovery |
This place covers:
Downloading or updating of printer's firmware. Installing new software for supporting newly added hardware or additional functions (e.g. image processing functions, resident fonts, support for new data formats).
This place covers:
Update or initialisation of the printer specific properties - IP address, Device name (see e.g. EP1372059, US2005151988).
This place does not cover:
Printer device capabilities |
This place covers:
Transmitting to the requestor printing device capabilities, e.g. double side printing, finishing options, dpi, colour or b/w, ppm (see e.g. EP1435565, EP1178393).
This place does not cover:
Printer device properties/settings, not related to printing capabilities, i.e. IP address. This aspect is covered in |
This place covers:
How to handle received jobs or the job currently being printed in case of error, e.g. reprint only the portion that was not printed, reprint the full job, delete the job and ask the host to send it again.
This place does not cover:
Alternate printer taking over the job from the failed device. |
Attention is drawn to the following places, which may be of interest for search:
Error or fault reporting or storing |
This place covers:
Specific aspects for recovering from errors caused by end of consumables - paper, ink, toner.
This place covers:
All aspects relating to connection between devices - client<->printer, server<->printer, printer<->printer. (see e.g. US2011019231 or US2011019231).
This place covers:
General aspects of job management that do no fit in the sub-groups.
This place does not cover:
Print device management |
This place covers:
Based on user/content credentials allowing/disabling usage of the printer as a whole.
This place does not cover:
Virus detection and handling. |
This place covers:
Limiting the use of printing as such (e.g. credit limit) or limiting the use of printers (e.g. time the printer can be used, e.g. only 1 hour a day, only after 17:00). Restricting configuration options, e.g. to plain paper, to black ink only, double-sided or n-up printing, lower resolution, limited image effects.
This group is usually combined with G06F 3/1219 or G06F 3/122 in order to characterise the effect achieved by the "invention information".
This place covers:
Printing or ripping several portions of a job at the same time.
This group is usually combined with G06F 3/1215 in order to characterise the effect achieved by the "invention information".
This place covers:
Print job is divided and different parts are sent to different devices having different properties.
This place does not cover:
Dividing for parallel printing |
This place covers:
Composing or overlaying content from different sources, e.g. different documents, onto a page.
Attention is drawn to the following places, which may be of interest for search:
2D [Two Dimensional] image generation | |
Image acquisition |
This place covers:
Print data for a page is generated by combining two sets of content (such as text, graphics and images), one set being constant from page to page (fixed content) and the other set being different (variable content) for every page. The combining of fixed and variable data may take place at any step in a print workflow.
Attention is drawn to the following places, which may be of interest for search:
Document retrieval systems | |
Editing, e.g. inserting or deleting |
This place covers:
All aspects of transforming the print job in order to be printed which do not fit in the sub-groups, e.g. parsing in order to eliminate repetitive data, colour transformation, font transformation.
This place covers:
Conversion or translation of the initial document or print job to a format which is not yet ready to be handled by a target printer but is useful for certain manipulation, e.g. faster to transmit, more efficient to store, easy to secure. Conversion or translation to a format which, although it could be suitable to certain printers, may not be suitable for the target printer (e.g. converting to a print format before target printer is known).
This place covers:
Parsing of print jobs written in one of the mark-up languages.
This place covers:
Conversion or translation of the initial print job (or the job in an intermediate format) to a format which is ready to be handled by the target printer.
This place covers:
Parsing of the job in order to find a certain mark (or keyword) that identify the language of the job.
This place covers:
Arrangement of the product's pages (e.g. document pages) on the output medium (e.g. paper sheets or media roll).
Attention is drawn to the following places, which may be of interest for search:
Pagination |
This place covers:
Specifically adapted to when media to be fed by the printer is of long length, e.g. web media, rolls.
This place covers:
Specifically adapted to when media to be fed by the printer is of short length, e.g. sheets (regardless of whether said media is to be folded or cut after printing. See e.g.US2010039670).
This place covers:
All aspects of configuring how the job should be printed which do not fit in the sub-groups.
This place covers:
Automatic allocation of (some) print settings by software, e.g. print driver, (on the client or server) when a print job is to be printed.
Double classification possible if G06F 3/1239 also apply.
This place covers:
Limiting the possibilities given to the user at the time of configuring print job, e.g. in b/w printer hide the option for colour printing, hide the option for double side printing if the printer does not support it or if "transparencies" is selected as media (see e.g. WO2010016234).
Comparing how the job should be printed and what the printer can offer when the job is sent from the client. Automatic adjusting of some of job's settings in order to fit the printer's settings or asking the user to solve the conflict settings manually (see e.g. EP1986410).
This group is usually combined with G06F 3/1204 or G06F 3/1208 in order to characterise the effect achieved by the "invention information".
This place covers:
Techniques for checking how the job will look like when printed either by using a preview on a display, by checks performed by software (pre-flight, pre-press) or by real print of part of the job.
This group is usually combined with G06F 3/1208 in order to characterise the effect achieved by the "invention information"
This place covers:
Previously defined settings are stored (e.g. as a template) and, when configuring a new print job, the stored settings are used instead of selecting a value for each print option.
This place does not cover:
Document templates, i.e. fixed content.. |
This group is usually combined with G06F 3/1204 in order to characterise the effect achieved by the "invention information".
This place covers:
Changing/updating of settings of a received or currently being created print job using UI of the printer.
This place covers:
Supervising of a print job after being sent for printing, e.g. printed, failed, queued. Job status can be requested (by the sending node) or received automatically after job sending.
This place does not cover:
Printer device status |
This group is usually combined with G06F 3/1207 in order to characterise the effect achieved by the "invention information".
This place covers:
Techniques relating to where and/or when the job should be printed which do not fit in the sub-groups. Queuing the jobs before printing, e.g. waiting a long job to finish. Finding a printer based on the job requirements.
This place does not cover:
Determining appropriate device aiming at providing the user with more print destinations or at installing required software for discovered devices |
This place covers:
Determining different (alternative) device for printing a job if the designated device can not print the job, e.g. due to failure, lacking of resources or excessive delay expected (see e.g. US7027169).
This place does not cover:
The same job printed by the same print device after recovered from a failure (i.e. reprinted) |
This place covers:
Combining several print jobs in one job (group job), printing print jobs in batches (e.g. jobs requiring same media or same post-processing, jobs submitted by the same user or intended for the same recipient) (see e.g.WO2008039689).
This place covers:
Changing the order of print jobs according certain priorities - either user-defined or automatically determined.
This place covers:
Determining resources to perform actions/functions on printed output (i.e. after printing) as specified by the job settings (e.g. folding, cutting, trimming, binding).
This place covers:
The print job as submitted does not comprise the document or print data that should be printed but only a reference to it or to its location (e.g. a URL, a file path). The document is later (e.g. when queuing the job or shortly before printing should commence) obtained from its location.
This place covers:
Storing a print job for a certain time before it being printed (e.g. a job to be printed at or after a certain time) or in case it should be re-printed subsequently. Storing the job until certain condition is fulfilled, e.g. user authorisation, recovering from an error state...
This place does not cover:
Normal queuing, e.g. waiting a previous job to finish.. |
This place covers:
Sending a request to print a job. The real job data will be sent or requested later. All aspects of sending a print request (e.g. submitting a document for printing, submitting a print job or a print order) which do not fit in the sub-groups.
This place does not cover:
Printing by reference |
Specific ways to send a request to print a job, e.g. scanning a page with a barcode and receiving printed pages with information identified by the barcode from a remote source.
This place covers:
Server storing user's desires about receiving printed materials, e.g. subscription, and sending personalized print jobs to all users (or users' printers) accordingly.
This place covers:
Folders with associated printing instructions (e.g. print settings or print-related tasks, such as automatic notifications). When a document or job is sent to a folder it will be processed according to the printing instructions associated with the folder.
Attention is drawn to the following places, which may be of interest for search:
Print workflow management |
This place covers:
Using the UI of the printer to configure a new job. The data for the job could be stored on the printer or at a different location, e.g. server.
This place does not cover:
Releasing a stored job according to the user identification |
Attention is drawn to the following places, which may be of interest for search:
Printing by reference |
This place covers:
Configuring and submitting a job using online based resources, e.g. accessing remote print service providers, choosing from web based content.
This place covers:
Creating, managing and using of print job history (see e.g. EP1860546).
This place covers:
Specifically instructing or managing job deletion based on certain criteria, e.g. memory usage, privacy, avoiding mixing of received jobs (see e.g. US2005275864).
This place covers:
Designing or modifying the steps to be performed to a print request from choosing document(s) to be printed to finalising the printed job (e.g. post-processing actions). Adding conditional steps, e.g. what should happen in case of certain events (see e.g.US2008170254).
This place covers:
Print workflow management is done by the driver, regardless where it resides - client or server.
This place covers:
No driver is involved in the filter pipeline. Workflow formed by pieces of software, called "filters" (see e.g. US2002135800).
This place does not cover:
Filters within a printer driver. |
This group is not used for classifying documents in it, but to introduce one of the three classification criteria mentioned in the "Special rules for classification" section of G06F 3/1201.
This place covers:
All aspects of hardware structure of the interface controller of the printer device if the "invention information" mainly focuses on them.
This place covers:
Printing from an USB stick or digital camera directly connected to the printer device.
This place covers:
Printer device having plurality of print engines in order to increase printing speed.
Attention is drawn to the following places, which may be of interest for search:
Parallel printing or parallel ripping |
This place covers:
Network configuration where the information from the server to the printer device always goes via the client.
This place covers:
Network configuration where the client accesses the server via the printer.
Attention is drawn to the following places, which may be of interest for search:
Arrangements for producing a permanent visual presentation of the output data using plotters |
This place covers:
- Interfaces between processor and display system (with or without a standard bus).
- Multiple busses connecting processor, display system and/or other subsystems: e.g. video zoom busses, multimedia busses besides the standard bus.
- Data being furnished to the display system being generated by a multiplicity of sources.
- Data of different types being furnished to the system that displays the data (it can be a display system or a complete computer).
- Interfaces between the host and the display system, especially for system that have a structure different from the structure outlined above (older or special systems).
- Plurality of symbol or graphics generators cooperating with one display unit.
- Aspects of the operating system that have impact on the display system and are not related to a particular aspect of the physical construction of the display.
- Transferring data from an Internet host to the display system.
- kvm-switches, if they (also) switch between a plurality of data sources (i.e. computers).
Data handling that is pertinent neither to the kind of visualisation unit that is used nor to the frame buffer access is to be classified in G09G 5/39.
Attention is drawn to the following places, which may be of interest for search:
Arrangements for producing a permanent visual presentation of the output data | |
Control of display in general | |
Kvm-switches, only linked to one computer as data source | |
Audio-visual communications |
When a standard bus is present, documents will be classified only if they contain details of the standard interface that are peculiar for the display system; "Non-standard" bus interfaces include all bus interfaces (SPI, LVDS, MIPI).
Attention is drawn to the following places, which may be of interest for search:
Digital output to display device involving copying of the display data of a local workstation or window to a remote workstation or window so that an actual copy of the data is displayed simultaneously on two or more displays |
This place covers:
Display devices in which more than one display unit is connected to the display system, irrespective of the type of display.
In cases where one display (device) controller controls two displays, group G09G 2360/04 should be considered for classification.
Controlling a plurality of local displays, with or without display controller: When more than one display terminal is controlled by a local host and some details of the display controller are present, this should be classified in group G06F 3/1423. The controlling of "plurality of displays" takes precedence over the "display controller" in group G09G 5/363.
Conflict between "plurality of local displays" and "conversion of CRT signals for a flat panel":
Group G09G 5/366 covers display systems with more than one display, namely the CRT and the LCD. In these cases, classification should be given in G06F 3/1423 or G06F 3/1431 or G06F 3/1438 and G09G 5/366: if the subject matter is mainly the interface, then classification in groups G06F 3/1423 or G06F 3/1431 or G06F 3/1438 is preferred; if it is the graphic controller, then symbol G09G 5/366 should be given. For search see also G09G 2360/04.
Attention is drawn to the following places, which may be of interest for search:
Using a single graphics controller | |
Using more than one graphics controller |
This place covers:
One single graphics controller (VGA, SVGA or other systems) controls two or more display units. Often one graphics controller card has interface circuitry for interfacing to CRT and to flat panel.
Documents are classified in G06F 3/1431 or G06F 3/1438 if there is a "graphics controller" present in the system, i.e. an interface between the standard bus and the display terminal that contains a graphics processor and a frame bufer. If the plurality of displays are connected to the host processor in a different, non standard, way, or if it is not possible to determine if a graphics controller is present (like for example in the old fashoned "terminals"), the documents will be classified in G06F 3/1423.
This place covers:
Illustrative example of subject matter classified in this group:
See also G09G 2300/026
This place covers:
Also screen sharing where the framebuffer is sent to remote displays, as is commonly done in application sharing (well known as Virtual Network Computing (VNC)).
Examples:
- Remote display on X-windows terminals: the rendering is done centrally, and only the modified sections of the frame buffers are sent to the remote stations. This is a case of remote local display. There is no teledisplay in this case because the remote display stations are acting as terminals of the host.
- Teledisplay: A collaborative work support system that is performed on plural computers each of which is assigned for an operator, and supports collaborative work in which the plural computers display common data and each operator operates the displayed common data through his own computer.
- Sharing of display panel information between several screens in classrooms with a white board.
Attention is drawn to the following places, which may be of interest for search:
Interaction techniques specific for application sharing, as now several users may want to interact with the same display | |
Multiprogramming arrangements; (implementation details of the sharing technique if not framebuffer based, i.e. really the inner workings, exchanged data structures | |
Office automation, groupware | |
Electronic classroom, remote teaching | |
Network arrangements for conferencing, chatrooms, etc | |
Real-time session protocols | |
Network arrangements or protocols for supporting network services or applications | |
Protocols for games, networked simulations or virtual reality | |
Telephonic multimedia conference systems | |
Videophones |
In patent documents, the following abbreviations are often used:
CSCW | Computer Supported Collaborative Work |
In patent documents, the following words/expressions are often used as synonyms:
- "Application sharing" and "Shared application"
- "Groupware" and "Computer Supported Collaborative Work"
Attention is drawn to the following places, which may be of interest for search:
Digital output to display device with means for detecting differences between the image stored in the host and the images displayed on the displays |
This place covers:
Display panels: LEDs, PDP, LCD, etc. Interconnection of POS (point of sales) terminals.
Attention is drawn to the following places, which may be of interest for search:
Data processing in buying/selling transactions, e.g. when dealing with POS terminals | |
Arrangements of circuits for control of indicating devices using static means to present variable information | |
Services or facilities specially adapted for wireless communication networks | |
Services making use of the location of users or terminals |
Attention is drawn to the following places, which may be of interest for search:
with conversion of CRT control signals to flat panel control signals |
This place covers:
General computer sound interfaces for interaction with computer programs or users
This place does not cover:
Speech processing |
Attention is drawn to the following places, which may be of interest for search:
Handling natural language data | |
Coding of audio signals in musical instruments | |
Devices for the storage of speech signals | |
Amplifiers | |
Gain or frequency control | |
Broadcasting | |
Encoding of compressed speech signals for transmission or storage | |
Spatial sound recording | |
Spatial sound reproduction |
This place covers:
Dedicated hardware or software components for interfacing to an audio device i.e. translating the audio stream from a host into a format accepted by the audio device and vice-versa. Providing hardware emulation for an audio source. Intermediation with OS when receiving audio to preserve sound quality. Connecting a host to a mobile phone to aid processing audio to enhance quality Adapting drivers to different audio source formats
Attention is drawn to the following places, which may be of interest for search:
Interfacing to a peripheral in general | |
CODECs per se |
In this place, the following terms or expressions are used with the meaning indicated:
CODEC | coding/decoding, compression/decompression of an audio signal |
This place covers:
Management from a host of the audio device by means of the interface control for modifying the operation of the audio device. Only for control of the audio device/system from the host. Controlling the audio settings such as volume, mute or filters. Controlling the audio stream path (switch output destination). Switch on or off of computer audio devices. Controlling the audio play, pause or replay.
Dedicated to TV appliances: H04N 7/00
Network security protocols H04L 9/40
Control of speech to text/text to speech conversion: G10L 13/00 and G10L 15/00
This place covers:
Interface to a computer user by means of an audio device to send commands to the computer or receive feed-back on an action. Limited to the navigation in a menu and sending control commands. Moving a mouse pointer on a screen using audio. Scrolling through a menu using audio. User interface of an audio card. Audio indicators to focus attention.
User interaction and feedback in general: G06F 3/01
User interaction in a menu in general: G06F 3/048
Speech recognition per se: G10L 15/26, G10L 15/22
This place covers:
Data format conversions; Conversion between packed and unpacked BCD.
This place covers:
Shifting which modifies the value being shifted, e.g. in arithmetic or for implementing shift instructions in processors; in particular the shifting functionality provided and the logic implementing it.
This place does not cover:
Exception handling | |
Rounding | |
Sign extension | |
Electrical details of cells | |
Digital stores in which the information is moved stepwise, e.g. shift-registers | |
Digital stores in which the information circulates |
Use of Indexing Codes:
Indexing Codes G06F 7/49905, G06F 7/49942, G06F 7/49994 are use for secondary aspects (non-invention information).
This place covers:
Details of the shifting arrangement.
This place does not cover:
Denomination or exception handling |
This place covers:
For example, barrel shifter with multiple shifting stages.
This place does not cover:
Methods or arrangements for data conversion without changing the order or content of the data handled for shifting in floating-point computations |
This place covers:
Shift registers with certain functionality and logic implementing it.
Buffer systems in general.
FIFO [First In, First Out] using linked lists.
Fifos of the types "shift-in, individual-out" or "individual -in, shift-out".
Effectuating transfer of data between different clock domains
This place does not cover:
Arrangements for changing the order of data flow |
Attention is drawn to the following places, which may be of interest for search:
Reordering based on contents of data in general | |
FIFO with priority-controlled output |
This place covers:
E.g. physical shifting of data.
This place does not cover:
FIFOs of the types "shift-in, individual-out" or "individual-in, shift-out" | |
Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's | |
Shift registers per se |
This place does not cover:
Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's |
Attention is drawn to the following places, which may be of interest for search:
Addressing methods of the memory |
This place covers:
E.g. signal generated / action taken before buffer runs full/empty.
This place covers:
Signal generated / action taken when buffer is already full/empty.
This place covers:
Alternating address by address, i.e. Odd-even.
Attention is drawn to the following places, which may be of interest for search:
Addressing methods of the memory |
This place covers:
The methods and arrangements in this main group are one level above logic circuits.
Examples of such methods and arrangements are: arithmetic circuits implemented using basic logic gates, implementation of complex logic gates, and implementation at transistor level, specially designed for arithmetic operations.
Other examples are:
Logical operations on words per se;
Finite state machines;
Grey System Theory (method of handling uncertainty),
- Asynchronous digital pipeline = clock-less operation of logical operations.
This place does not cover:
Logic circuits, i.e. Implementation of basic logical circuits (AND, NAND, OR, NOR, EXOR, EXNOR), at transistor level |
Attention is drawn to the following places, which may be of interest for search:
Logical operations on words in combination with arithmetic operations | |
Arrays of processors with common control | |
Information retrieval, or database structures therefor | |
Conversion between different representations of Boolean functions, e.g. Boolean formula synthesis from Karnaugh maps, generation of Reed-Muller expansions | |
Complex mathematical operations |
Documents classified in G06F 7/00 should also be further classified in the appropriate indexing codes G06F 2207/00 - G06F 2207/7295.
In this place, the following terms or expressions are used with the meaning indicated:
Individual record carriers | Designates physically distinct carriers carrying digital information, e.g. sheets, cards. |
This place covers:
For example, bit string matching, character string matching.
This place does not cover:
Arrangements for sorting, selecting, merging or comparing data on individual record carriers | |
Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc | |
Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation |
Attention is drawn to the following places, which may be of interest for search:
Information retrieval | |
Comparing pulses |
This place covers:
Magnitude comparison generating less-than, greater-than, equal-to signals.
Attention is drawn to the following places, which may be of interest for search:
Min or max functions producing one of the two input values |
In this place, the following terms or expressions are used with the meaning indicated:
Window comparator | determines in which window defined by multiple values a certain value falls |
Attention is drawn to the following places, which may be of interest for search:
Sorting of postal letters | |
Conveying record carriers from one station to another |
This place covers:
Classification of digital data.
Maximum, minimum or median value of a set of data.
Attention is drawn to the following places, which may be of interest for search:
Minimum or maximum of two values | |
Pattern recognition |
In patent documents, the following words/expressions are often used as synonyms:
- "Batcher sorter" , "bitonic sorter" and "odd-even merge"
This place covers:
E.g. documents on number representations without dealing with the technical circuit implementation.
This place does not cover:
Using signed-digit representation |
Attention is drawn to the following places, which may be of interest for search:
With a look-up table | |
Complex mathematical operations |
This place covers:
Generation or transformation of stochastic functions; generation of output with certain random characteristics; post processing, e.g. pattern elimination, whitening, reducing auto-correlation or bias; breakdown detection.
Attention is drawn to the following places, which may be of interest for search:
Transformation of stochastic functions by table look-up | |
Lottery apparatus | |
Random pulse generators, random bit generators | |
Secret telegraphic communication |
Random bit generators: In case of a bit sequence, which could be seen as a random number sequence, classification is done both in the appropriate (sub)group in G06F 7/58 and in H03K 3/84.
Methods both valid for random and pseudo-random number generators should be classified in the head group (G06F 7/58) and not in a sub-group, even if a specific PRNG/RNG is discussed.
Double classification head group / main group only
- on basis of other aspects, e.g. possibly non-trivial PRNG or RNG also disclosed
- in case it is not sure that the method is valid for both RNG and PRNG
Use of keywords
Pseudo-random number generators i.e. only deterministic PRNGs;mixed RNGs in G06F 7/588 if more than one type of pseudo-random number generator is discussed:- in case these PRNGs are clearly trivial: classify in head group ( G06F 7/582 ) - in case a PRNG might be non-trivial: classify in relevant sub-group(s) | |
Using finite field arithmetic, e.g. using a linear feedback shift registergenerators including the 2**n state with all zeroes in G06F 7/582 | |
Random number generators, i.e. based on natural stochastic processes also mixed PRNG/RNGs Considered as random (G06F 7/588 ) are methods based on - radioactivity, zener, race, chaos- uncertain moment of pressing a key | |
Using non-contact-making devices, e.g. tube, solid state device; using unspecified devicese.g. 2's complementing | |
Using coordinate rotation digital computer (CORDIC)i.e. CORDIC in non-complex environment: G06F 7/5446 | |
Using signed-digit representationBinary multipliers and dividers often use signed-digit representation internally for one operand or the result; see therefor "recoded" or "Booth" multipliers in G06F 7/523 - G06F 7/5338 and "recoded" or "SRT" dividers in G06F 7/535 - G06F 7/5375. | |
Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational number, logarithmic number system, floating-point numbers (conversion to or from floating-point codes H03M 7/24) ( G06F 7/4806, G06F 7/4824, G06F 7/49, G06F 7/491, G06F 7/544 take precedence)e.g. fused multiply add (FMA) also here, but add G06F 7/5443 | |
Logarithmic number system mainly for non-trivial operations such as addition.multiplication of binary operands via the log-domain is in G06F 7/5235 | |
Adding; Subtracting (G06F 7/4833 takes precedence)e.g. floating-point addition | |
Dividingi.e. floating-point division | |
Multiplying i.e. floating-point multiplication If in fact only the mantissa-multiplication is treated, classification should be made in another group, unless special features for switching between fixed and floating point operands are described. | |
Computations with a radix, other than binary, 8, 16 or decimal, e.g. ternary, negative or imaginary radices, mixed radix (non-linear PCM, G06F 7/4824 takes precedence) N-ary logic | |
Multiplying; Dividing MULTIPLICATION ONLY division goes into G06F 7/4915, whether it uses 8421 code or not | |
Mantissa overflow or underflow in handling floating-point numberse.g. exponent adjustment | |
Normalisation mentioned as feature only 'i.e use of normalisationImplementation of floating-point normalisers: G06F 5/012 | |
Significance controli.e. number of significant bits | |
Implementation of IEEE-754 StandardNote: The standard uses sign magnitude representation | |
Rounding to nearest (G06F 7/49957 takes precedence)Note: The IEEE-754 way is "rounding to nearest even", which is rounds to nearest, and only when exactly in the middle to nearest even. Though rounding to nearest odd may in fact round to an even number, it normally doesn't. | |
Rounding towards zero (G06F 7/49957 takes precedence)e.g. as in IEEE-754 | |
Rounding away from zeroway of rounding not provided for in IEEE-754 | |
Interval arithmetici.e. computations with intervals as values | |
Adding; Subtracting (G06F 7/4806, G06F 7/4824, G06F 7/483 - G06F 7/491, G06F 7/544 take precedence) only binary, radix 8, radix 16.. | |
using carry switching, i.e. the incoming carry is connected directly to the carry output under control of a carry propagate signal Full adders having in general the form1-bit adder stages (ripple carry) | |
with simultaneous carry generation for or propagation over two or more stages e.g. using group carry signals, e.g. carry skip; all smart carry schemes except carry look-ahead and carry select/ conditional sum are in G06F 7/506 | |
using selection between two conditionally calculated carry or sum values e.g. carry select, conditional sum | |
for multiple operands, e.g. digital integrators i.e. operand-parallel addition of 3 or more operands (this is mainly "3" or "a lot");multipliers in G06F 7/52 | |
word-serial, i.e. with an accumulator-registeri.e. OPERAND serial! | |
Multiplying; Dividing (G06F 7/4806, G06F 7/4824, G06F 7/483 - G06F 7/491, G06F 7/544 take precedence) very rare cases only; normally documents are classified in one of the subgroups (or both) This subgroup does not cover G06F 7/5443: multiplier-accumulators (f = ∑ ai xi ), including simple cases f = ax + b, f = ax+ by G06F15/347: vector multipliers, matrix multipliers G06F 7/68: binary rate multipliers/dividers G06F 7/724: finite field multipliers | |
In serial-parallel fashion, i.e. one operand being entered serially and the other in parallel (G06F 7/533 takes precedence) In old documents these multipliers are often called "parallel", in newer documents they are often called "serial"! | |
with row-wise addition of partial products i.e. adding two rows each cycleIn majority: "add to accumulator and shift" | |
In parallel-parallel fashion, i.e. both operands being entered in parallel (G06F 7/533 takes precedence) e.g. single cells for cellular array multiplierse.g. arrays of undetermined type | |
Using indirect methods, e.g. quarter-square method, via logarithmic domainif operands stay in the log-domain then G06F 7/4833 ;quarter-square see XP013079891 | |
in serial-serial fashion, i.e. both operands are entered serially (G06F 7/533 takes precedence) e.g. Lyon multipliers (see XP007901470) | |
with row-wise addition of partial productsi.e. adding two rows each cycle | |
with column-wise addition of partial productse.g. adding one column each cycle with a parallel counter | |
In parallel-parallel fashion, i.e. both operands being entered in parallel (G06F 7/533 takes precedence) e.g. single cells for cellular array multipliers;e.g. arrays of undetermined type | |
With row-wise addition of partial products (G06F 7/5324 takes precedence) cellular array multipliers with ripple carry (=within rows) also skewed arrays of the type "McCanny & McWhirter"e.g. linear chain of cascaded adders | |
With column-wise addition of partial products, e.g. using Wallace tree, Dadda counters (G06F 7/5324 takes precedence)e.g. adder trees | |
Partitioned, i.e. using repetitively a smaller parallel-parallel multiplier or using an array of such smaller multipliers each smaller multiplier larger than 1 bit; multiprecision; also array multipliers A) n × m bit multiplier consisting of an array of k × l multipliers, k being a submultiple of n and l being a submultiple of m respectively, followed by an array or tree of adders, e.g. of Wallace type. B) n × m bit multiplication realised by a single k × l multiplier, k and l as above, used repetitively and followed by an accumulator.The k × l bit multipliers may be single ROM's for example.Not to be confused with multi-bit-scanning, where a selection among precalculated multiples of the multiplicand is made; if the k × l bit multipliers itself are of the latter type, double classification may be appropriate. | |
Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even for Booth, use the subgroups!Note: the term "Booth" is often incorrectly used when intending to say "modified Booth". A Booth recoder module inputs some, e.g. two, consecutive bits and sends a 'Booth carry' to a more significant module. A modified Booth recoder module inputs some, at least three, consecutive bits, the most significant of which is also input to the next higher recoder module. In modified Booth the recoder modules are not connected to each other via a carry. | |
By skipping over strings of zeroes or ones, e.g. using the Booth Algorithme.g. using operand processing, e.g. simple (radix-2, 1st order) Booth, also canonical recoding to NAF form (sequential recoding with carry) | |
By using multiple-bit-scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate pre-calculated multiple of the multiplicand as a partial product i.e. processing multiple bits per iteration (radix > 2) without overlap, e.g. using positive precalculated multiples only groups of MR-bits are decoded for selecting multiples of MD e.g. 2-bit groups: 3-bit groups: 00 0 × MD 000 0 × MD 01 1 × MD 001 1 × MD 10 2 × MD 010 2 × MD 11 3 × MD 011 3 × MD 100 4 × MD 101 5 × MD 110 6 × MD 111 7 × MDMultiples,that are not a power of 2(3x,7x, etc)have to be precalcultated or looked up in a table. | |
Each bitgroup having two new bits, e.g. 2nd order MBAi.e. radix-4 modified Booth, i.e. 2nd order modified Booth | |
Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher (SRT) algorithm (not used, see G06F 7/535 or G06F 7/5375 )NOT USED, non-restoring in general gets the KW non-restoring,SRT in particular goes in G06F 7/5375 | |
Non restoring calculation, where each digit is either negative, zero or positive, e.g. SRT; (WARNING Not complete. Provisionally see G06F 7/535 + G06F 7/5375) almost empty - everything is in Indexing Code G06F 7/5375 | |
For evaluating functions by calculation (with a look-up table G06F 17/10; complex mathematical operations G06F 17/10; G06F 7/4806, G06F 7/4824 take precedence) e.g. min, max of two operands, absolute value, (sum of) absolute differencefinding a maximum value of a set (e.g. during sorting) is in G06F 7/22; direct table lookup of function values is in G06F 1/03 ;table lookup of coefficients during computation goes here, put "table lookup" in the TXT field; | |
Sum of products (for applications thereof, see the relevant places, e.g. G06F 17/10, H03H 17/00) e.g. MACs; fused multiply add (FMA) for floating point are in G06F 7/483 with G06F 7/5443 | |
using crossaddition algorithms, e.g. CORDIC e.g. sin, cos, tan, sinh, cosh, tanh;CORDIC on complex numbers: G06F 7/4818 | |
Powers or roots, e.g. Pythagorean sumse.g. powers by multiplying the operand by itself (which is not possible with non-integer powers) | |
Arithmetic logic units (ALU), i.e. arrangements or devices for performing two or more of the operations covered by groups G06F 7/483- G06F 7/556 or for performing logical operations (instruction execution G06F 9/30; G06F 7/49, G06F 7/491 take precedence; logic gate circuits H03K 19/00)e.g. arrangements for performing more than one operation using the same circuitry | |
Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry: Note: multiplication is not seen as "basic" |
This place covers:
For example, documents concerning
- "permutograph";
- a "Negationsnetz";
Fibonacci code representation.Further details of subgroups
using difunction pulse trains (STEELE computers); phase computers (GAINES). e.g. Delta-Sigma sequences.
number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters (for applications thereof, see the relevant places, e.g. G06F 7/49, G06F 7/5013, G06F 7/509, H03M 1/00, H03M 7/20)
e.g. number of ones counters (parallel counters), compressors, carry save adders 4-2, 7-3, etc, e.g. used in multipliers.
Digital differential analysers, i.e. computing devices for differentiation, integration or solving differential or integral equations, using pulses representing increments; Other incremental computing devices for solving difference equations (G06F 7/70 takes precedence; differential analysers using hybrid computing techniques G06J 1/02) DDA application in numerical control G05B 19/18.Integration per se: G06F 17/10.
Using pulse rate multipliers or dividers pulse rate multipliers or dividers per se (G06F 7/70 takes precedence) (frequency division in electronic watches G04G 3/02; frequency multiplication or division in oscillators H03B 19/00; frequency dividing counters per se H03K 23/00 - H03K 29/00)
e.g. phased locked loop (PLL) with digital divider (thus achieving pulse rate multiplication); PLLs in general are in H03L 7/06;
pulse rate doubling by adding delayed pulses and correcting the duty cycle are in H03K 5/1565; H03K 23/00 - H03K 29/00 mostly relate to analogue aspects.
This place covers:
A mod N, modulo addition, modulo subtraction
Further details of groups
Covers for e.g. modular division; both with composite moduli and in prime number fields.
This subgroup covers RSA [Rivest–Shamir–Adleman ] cryptosystem in general.
Covers mainly (binary) extension fields; prime number fields using modular arithmetic are covered in G06F 7/72 - G06F 7/723, G06F 7/727 and G06F 7/728.
For this type of arithmetic the term "Galois field" and symbols of the type GF(pn) are characteristic, e.g. GF(24).
Elliptic curve cryptography [ECC] is classified in this subgroup only if specific adaptations for elliptic curves are present.
This subgroup covers rational functions p(x)/q(x) for example and inversion in extension fields is covered in G06F 7/726.
Montgomery reduction involves adding of multiples of the modulo, followed by right shifting.
This subgroup covers the Chinese Remainder Theorem for non-RSA for example.
A residue number system (RNS) is a system in which a number is represented by a series of digits, each of which is the remainder of that number with respect to a different modulus mi:
e.g.: moduli -> 5 3 2
2610 = 1 2 0
The maximum number representable is M = (∏i mi) - 1
e.g.: (2 × 3 × 5) - 1 = 29 in the above case.
Attention is drawn to the following places, which may be of interest for search:
Error detection/correction in computers | |
Optical residue arithmetic devices | |
Error detection/correction for coding in general | |
Error detection/correction in transmission | |
Secret communication |
This place covers:
E.g. leading zero anticipation LZA, priority encoders.
With shifting (during/for detection) details: also in G06F 5/01.
This place does not cover:
with shifting |
This place covers:
For example, masking, shuffling
G06F 7/766 covers i.e. serial or parallel generation of all permutations.
G06F 7/768 covers e.g. endian conversion.
Boolean masking in block or stream ciphers is covered by H04L 2209/04.
Endian conversion by memory addressing is covered by G06F 12/04.
Bus coupling with endian conversion and endian conversion instruction are covered by G06F 13/4013.
This place covers:
LIFO [Last In, First Out], also called stack or pushdown store:
- Reversal of a train of data words.
- Reversal of a train of data bits.
Devices called FIFO [First In, First Out], but having possibilities to extract also other data items than the first one.
Matrix transportation devices.
Other devices with an output sequence different from the input sequence, but independent of the contents of the data.
Attention is drawn to the following places, which may be of interest for search:
FIFO-devices | |
Reordering based on contents of data, e.g. sort key | |
Cache-memories | |
FIFO with priority-controlled output |
This place covers:
The engineering discipline of creating software and the assistance of computer tools (CASE tools) in exercising the task of software engineering.
The phases, covered by G06F 8/00, range from the initial requirements collection up to and including the delivery of software to the end user, its maintenance and management but exclude the phase of testing and debugging.
Aspects of the particular application of the software being designed, e.g. commercial or financial software, are classified in the appropriate place.
This place does not cover:
Testing or debugging | |
Administrative, planning or organisation aspects of software project management |
Attention is drawn to the following places, which may be of interest for search:
Execution of a stored program | |
Hardware/software co-design |
In patent documents, the following abbreviations are often used:
CASE | Computer-Aided Software Engineering |
This place covers:
Capturing and formalising user requirements:
- Graph notations;
- Diagramming techniques, e.g. Dataflow diagrams;
- Requirements specifications;
- Use of modelling languages such as uml;
- Petri nets.
Attention is drawn to the following places, which may be of interest for search:
Circuit design | |
Specification of network protocols |
In patent documents, the following abbreviations are often used:
UML | Unified Modeling Language |
This place covers:
Software design, including the determination of the main structure, the modules that will be created and the relationships between them.
The use of design patterns for object-oriented development.
Attention is drawn to the following places, which may be of interest for search:
Computer-aided design in general |
In patent documents, the following abbreviations are often used:
MVC | Model-View-Controller |
This place covers:
The conventional design paradigm, where a design is defined in terms of a sequence of actions to be performed. An example is the Jackson Structured Programming method.
Attention is drawn to the following places, which may be of interest for search:
Declarative |
This place covers:
The process of planning a system in terms of interacting objects for the purpose of solving a software problem as defined by the (formalised) user requirements. Examples are the design patterns from the book "Design Patterns: Elements of Reusable Object-Oriented Software" by Gamma et al.
Attention is drawn to the following places, which may be of interest for search:
Object-oriented method resolution | |
Inheritance | |
Object-oriented databases |
This place covers:
The conceptual step of converting an abstract representation (design or specification) of a software system, into a more concrete representation in the form of program code.
Attention is drawn to the following places, which may be of interest for search:
Specification techniques for generating programs | |
Compilation, i.e. the process of converting source code into binary code during the task of software engineering | |
Reverse engineering; Extracting design information from a source code | |
Porting source code to a different environment | |
Query generation in information retrieval |
This place covers:
Programming languages and paradigms that can be used by a programmer in order to create source code.
Attention is drawn to the following places, which may be of interest for search:
Processing or translation of natural language |
In patent documents, the following abbreviations are often used:
HLL | High Level Language |
This place covers:
Languages designed for functional programming that treats computation as the evaluation of mathematical functions. Examples are Sasl, Miranda and Haskell.
In this place, the following terms or expressions are used with the meaning indicated:
Functional programming | software development model which expresses algorithms as functions, i.e. as stateless mappings of input values to output values |
Declarative programming | programming paradigm that expresses a computation without describing its control flow |
This place covers:
List processing languages, e.g. Lisp and Scheme.
In this place, the following terms or expressions are used with the meaning indicated:
CAR | Function that determines the first element of a list |
CDR | Function that determines the list after its first element |
This place covers:
Programming languages expressing a program as a collection of logical statements.
In this place, the following terms or expressions are used with the meaning indicated:
Declarative programming | programming paradigm that expresses a computation without describing its control flow |
Horn clause | logical statement |
In this place, the following terms or expressions are used with the meaning indicated:
Unification | finding an assignment that satisfies all clauses |
Backtracking | done on partial unifications that cannot succeed, and to continue to find more possible unifications |
This place covers:
Programming languages having constructs for expressing parallelism, e.g. Occam.
This place does not cover:
Parallel logic programming | |
Detecting and extracting parallelism from program code |
This place covers:
Programming languages expressing algorithms as interacting objects, where an object is an aggregation of data (attributes) and actions (methods).
Examples of object oriented languages are Smalltalk, Ruby, Eiffel, C++, C#, Java, Oberon, Modula.
Attention is drawn to the following places, which may be of interest for search:
Object-oriented design paradigms | |
Object-oriented systems | |
Method invocation | |
Distributed object-oriented systems | |
Object-oriented databases |
In this place, the following terms or expressions are used with the meaning indicated:
Method | the action to be performed on (attributes of) an object |
This place covers:
Programming paradigm allowing different, orthogonal, aspects of a program (business rules, security, fault tolerance, data consistency) to be designed independently and to be merged later to produce a final source code product.
Aspect-Oriented Software Development foresees a full and independent design for all the secondary aspects of an application like security, persistency, synchronization, logging, etc., carried out at the same time as the design of the core functionality of the application.
In this place, the following terms or expressions are used with the meaning indicated:
Aspect Weaving | the process of merging the different aspects |
Join Points | the actual places in the program where the aspects are merged |
In patent documents, the following abbreviations are often used:
AOSD | Aspect oriented software development |
This place covers:
Intelligent editors that help a programmer to write programs, e.g. language-sensitive editors.
Examples:
- Proposing a closing bracket when an opening bracket is typed.
- Indenting of if-then-else statements.
- Verification of entered text (e.g. whether variables are already declared).
Attention is drawn to the following places, which may be of interest for search:
Text processing |
This place covers:
P programming techniques whereby a program is created by handling graphical programming objects representing programming constructs/statements rather than writing program text.
Attention is drawn to the following places, which may be of interest for search:
Use of icons for interaction | |
Intelligent editors | |
Development of GUIs, User Interface Management Systems (UIMS) | |
Web page development | |
Creating programs for controlling physical processes by graphically specifying the process to be controlled | |
Creating relay ladder logic program for Programmable Logic controllers (PLC) | |
Multimedia authoring |
This place covers:
Automatically generating program code (source code) from a specification/definition/model of what the program should do.
Typical examples: WO0108007, WO02086704, EP0737918, WO0177882.
Specific topics included:
- Generating a debugger from a formal specification: EP1071016;
- Generation of source code for web applications: WO0171566;
- Convert spreadsheet data into source code: US2003106040, US2004064470;
- Generate source code from XML: US2003167444;
- Generate a shader program from a graphics file: US2003179220;
- OMG's Model driven architecture (MDA).
In patent documents, the following abbreviations are often used:
MDSD | Model driven software development |
MDA | Model driven architecture |
This place covers:
Arrangement for keeping a model and the corresponding program code in sync when applying changes to any of them.
This place covers:
- Storing and retrieving reusable software modules into and from software repositories;
- Building, searching and maintaining software repositories containing reusable software parts;
- Managing repositories of software components, objects;
- Storing software components into a repository, thereby indicating additional information about the components, e.g. the function performed, what inputs are required, what outputs are generated;
- Querying the repository to retrieve components that satisfy the particular requirements, e.g. related to its function;
- Detecting program parts that are candidates for reuse;
- Design patterns.
- Using APIs and interfaces, e.g. for components, to make software reusable.
Attention is drawn to the following places, which may be of interest for search:
Exlining, i.e. finding similar sequences of code to replace them with a procedure invocation | |
Version control using repositories | |
Code clone detection, i.e. detection of identical pieces of code for the purpose of maintenance | |
Plagiarism detection in program code |
This place covers:
- Automatically generating a compiler or parser based on a specification of a grammar/syntax, e.g. Lex and Yacc.
- Generation of lexical analyzers.
Attention is drawn to the following places, which may be of interest for search:
Compilation per se |
In this place, the following terms or expressions are used with the meaning indicated:
Compiler Bootstrapping | creating a compiler using the language it is intended to compile |
This place covers:
The development and generation of source code for user interfaces, in particular GUIs.
Attention is drawn to the following places, which may be of interest for search:
User interaction with graphical user interfaces | |
Details relating to the actual functioning of (graphical) user interfaces |
This place covers:
The transformation of program code from one form into another.
This place covers:
The process of converting source code into binary code.
Attention is drawn to the following places, which may be of interest for search:
Compiler generators | |
Runtime code conversion |
In this place, the following terms or expressions are used with the meaning indicated:
Binary code | a representation of a code understood by a machine |
This place covers:
Determining grammatical structure of the source code with respect to a given formal grammar.
This place covers:
Processing language-external elements, e.g. compiler directives, macro definitions and macro expansions, and inclusion of library source files.
This place covers:
Converting sequences of characters into tokens, skipping comments.
This place covers:
Checking for correct syntax and building a data structure, e.g. parse tree.
Multibox parsers.
Attention is drawn to the following places, which may be of interest for search:
Parser generators | |
Parsing markup language streams |
This place covers:
Checking context-senstive conditions, e.g. whether variables have been declared.
This place covers:
Determining the dependencies between different program parts (e.g. data dependencies, which variables/values are used in expressions, and control dependencies, which statements have influence on other statements), in particular to determine whether such program parts should be placed in a certain order.
This place covers:
Determining whether references, e.g. pointers, reference variables and indexed array elements, actually refer to the same underlying memory element.
This place covers:
Checking semantic conditions which can be determined without actual execution of the program, e.g. whether variables are initialized.
This place covers:
Checking type compatibility of values, variables, parameters and expressions.
This place covers:
Generating an executable implementation of the program for the target machine architecture, usually via an internal form that is independent of the source programming language and that is also independent of the target machine architecture.
This place covers:
Assigning logical registers to variables, assigning physical register to logical registers, coalescing, spilling.
In this place, the following terms or expressions are used with the meaning indicated:
Coalescing | removing useless copy instructions from a program. This needs information about assigned registers and therefore it is commonly performed as a subtask of register allocation besides spilling and register assignment. |
This place covers:
Optimisation of the program code; the program code can take any form e.g. source code, assembly code, machine code.
Attention is drawn to the following places, which may be of interest for search:
Code refactoring |
Whenever an optimisation concerns speed, size, etc, such documents should be classified in the corresponding subgroups. In this group should be classified only special optimision techniques not present in any of the subgroups.
Contains optimizations that do not involve a trade off between different factors (speed, size, energy consumption | |
Involve a trade-off. They are specifically aimed to optimize one aspect, likely at the cost of another aspect. |
This place covers:
Optimisation methods specifically aimed at reducing the energy consumption of program code.
Attention is drawn to the following places, which may be of interest for search:
Means for Saving Power, Power Management strategies |
This place covers:
Optimisation methods specifically aimed at reducing the size of the program code, e.g. by replacing sequences of recurring instructions with a new macro instruction/superinstruction. Requires that the target architecture/virtual machine recognize this new instruction; Cross jumping; Tail Merging.
Attention is drawn to the following places, which may be of interest for search:
Data compression (e.g. PKZIP) |
Note that this group does not cover the compression of program code, which requires a decompression before it can be executed. Compression of program code in this sense does not result in the actual program being smaller; there is only a saving in the secondary storage or transmission via the network.
In contrast, the size-reduced code covered by this group is directly executable, so no decompression is needed before execution.
This place covers:
Detecting and removing of dead or redundant code. Redundancy elimination optimizations avoid repeated computation of the same value by computing the value once, saving it in a temporary variable, and reusing the value from the temporary variable when it is needed again. Examples of redundancy elimination optimizations include common subexpression elimination, loop invariant code motion and partial redundancy elimination.
In this place, the following terms or expressions are used with the meaning indicated:
Dead code | code that is never executed or that is unreachable. |
Redundant code | code that produces results that are never used or are irrelevant to the program execution or code that computes values that were already computed before. |
This place covers:
Detecting recurring sequences of instructions and replacing each of them with a call to a procedure/function that contains those instructions.
Attention is drawn to the following places, which may be of interest for search:
Reuse, i.e. identifying recurring pieces of code for purposes of reuse | |
Inlining | |
Code clone detection, i.e. detection of identical pieces of code for the purpose of maintenance | |
Plagiarism detection in a source code |
This place covers:
Optimisation methods specifically aimed at improving the execution speed of the program.
This place covers:
Avoiding cache misses at run-time. Cache can be instruction or data cache.
Splitting a program into frequently used and not frequently used parts (hot and cold parts) and keeping the hot parts in the cache.
Rearranging the individual instructions in order to have data/instructions present in the cache when they are needed.
This place does not cover:
Cache prefetching |
This place covers:
Replacing a procedure invocation with the instructions of the procedure, thus removing the cost of procedure invocation.
Attention is drawn to the following places, which may be of interest for search:
Exlining |
This place covers:
Increasing the Instruction Level Parallelism (ILP) that can be exploited by the hardware at run-time (pipelines, superscalar processors executing multiple instruction streams). Typically this is done by reordering the instructions (scheduling).
This place does not cover:
Exploiting coarse grain parallelism | |
Run-time scheduling or reordering of instructions by the hardware | |
Process scheduling |
In this place, the following terms or expressions are used with the meaning indicated:
Scheduling | reordering of instructions |
In patent documents, the following abbreviations are often used:
ILP | Instruction Level Parallelism |
This place covers:
Reducing or avoiding run-time pipeline stalls.
Pipeline stalls (or bubbles) are caused by control hazards – e.g. branches -, data hazards -one instruction depends on the result of another instruction and must wait for this instruction to finish- or resource hazards -there are not enough resources to serve all the instructions currently in flight - instructions must wait for resources to be freed in order to be fed to the pipeline.Control Hazards can handled by static branch-prediction, speculative execution or delayed branch. Data Hazards can be avoided by rearranging the instructions so that instructions that depend on each other's result are farther separated.
In a pipeline, there is only one instruction stream. So the parallelism consists in the overlapping of the instructions of the stream rather than executing the instructions of 2 streams simultaneously.
Attention is drawn to the following places, which may be of interest for search:
Hardware aspects of pipelining |
This place covers:
Software pipelining, e.g. Modulo Scheduling, transforms a loop described in a high-level programming language, such as C or FORTRAN, in such a way that the execution of successive iterations of the loop are overlapped rather than sequential. This technique exposes the instruction level parallelism (ILP) available between successive loop iterations to the compiler and to the processor executing the transformed code.
Attention is drawn to the following places, which may be of interest for search:
Hardware aspects of pipelining |
This place covers:
Generation of executable code from the optimized compiler-internal representation of the source code, taking the target machine architecture into account.
Attention is drawn to the following places, which may be of interest for search:
Run-time compounding of instructions by the hardware |
This place covers:
Speeding up the execution of a single task by subdividing the task into a plurality of subtasks and having the subtasks executed simultaneously on different processors. The subtasks are interdependent and they work together to achieve the same goal as the original task.
Attention is drawn to the following places, which may be of interest for search:
Exploiting fine grain parallelism |
This place covers:
Distributing the code of each of the subtasks to the available processors.
This place does not cover:
Considering CPU load at run-time | |
Load rebalancing |
This place covers:
Distributing iterations of parallelizable loops among the processors.
Attention is drawn to the following places, which may be of interest for search:
Software pipelining | |
Allocation of resources to service a request | |
Techniques for rebalancing the load in a distributed system at run-time |
This place covers:
Dividing the data used by the subtasks over the different processors.
This place covers:
Ensuring data consistency between subtasks.
This place does not cover:
Cache consistency protocols in hierarchically structured memory systems |
This place covers:
Detecting parallelism in sequential programs, e.g. by making use of control flow and data flow information.
In this group the burden to detect and extract parallelism is put on the compiler or another software tool. This contrasts with the G06F 8/314, where the burden of indicating parallelism is put on the programmer.
Attention is drawn to the following places, which may be of interest for search:
Techniques and language constructs to create parallel programs | |
Data flow analysis, control flow analysis |
This place covers:
Communication between subtasks, allowing the generated tasks to interact with each other, for example to pass parameters or to return results.
This place does not cover:
Communication between independent tasks |
This place covers:
Synchronisation between subtasks.
This place does not cover:
Synchronisation between independent tasks |
This place covers:
Compiler structure allowing for several source languages (multiple front ends) and/or several target machine architectures (multiple back ends). Some examples of techniques and compilers for this are:
- Architecture Neutral Data Format (ANDF);
- UCSD Pascal P-code;
- Universal Compiler Language (UNCOL);
- GCC - GNU Compiler Collection.
Attention is drawn to the following places, which may be of interest for search:
Generating code for just one computing platform |
In this place, the following terms or expressions are used with the meaning indicated:
Retargetable compiler | a compiler that can relatively easily be modified to generate code for different CPU architectures. |
This place covers:
Specializing a program for some or all of its possible input values.
Different flavours are:
- "normal" PE (partial evaluation): specialize program for certain values of its inputs
- "predictive" PE: predict the run-time values of some inputs and specialize the program accordingly. At run-time, check if the prediction was correct. If yes, execute it. If no, recompile using the actual values.
- "multi-version" PE: generate multiple specialized versions of the program corresponding to different inputs. At run-time choose the appropriate version.
- "placeholder" PE: specialize the program for the known inputs. For the unknown inputs, provide placeholders, that will be filled in at run-time.
Attention is drawn to the following places, which may be of interest for search:
Optimizing a method invocation based on the type of the receiving object |
This place covers:
Translating program code from a first high level programming language to a different second high-level programming language (e.g. from Java to C++). This transformation is independent of the target processor.
Attention is drawn to the following places, which may be of interest for search:
Source to binary translation | |
Preprocessors | |
Optimisation of source code | |
Binary to binary translation | |
Porting; modifying the source code of the application in order to adapt it to new/changed requirements | |
Porting source code to a different environment |
This place covers:
Static translation (i.e. pre-run-time) of binary code from one architecture to a different architecture.
This group covers the following forms of static binary code translation:
- Binary to binary
- Intermediate bytecode to another intermediate bytecode (e.g. Java bytecode, p-code)
This place covers:
Transformation of executable code into source code or assembly code.
Attention is drawn to the following places, which may be of interest for search:
Reverse engineering | |
Protecting software against software analysis or reverse engineering, e.g. by code obfuscation |
This place covers:
Statically linking modules before load-time in order to create executable binary code.
Attention is drawn to the following places, which may be of interest for search:
Dynamic linking, i.e. linking at or after load time, during run-time |
This place covers:
- Installation and updating of computer software
- Methods that make the installation/update of software program transparent, automatic and user-friendly, both to the end-user and the network administrator. Methods that automatically select which programs should be updated, when and how this should happen, and where old and new programs should be located
Updating or installing software based on physical location of the target device.
Attention is drawn to the following places, which may be of interest for search:
Installation and upgrade of device drivers | |
Network booting | |
Program loading or initiating | |
Fault tolerant update or installation. For example when an error occurs during software upgrade, the system is rebooted and restored to the state before installation. | |
Secure aspects of licensing; Try and buy software | |
Arrangements in connection with the implantation of stimulators; Changing the program; Upgrading firmware | |
Downloading information (also software) into vehicles | |
Personalization of smart card applications | |
Download/install/upgrade software in mobile communication devices | |
Multimedia set-top boxes under program control |
This place covers:
- First-time installation of software.
- Unattended installation, installation scripts (answer file).
- Installation packages (containing list of files, program image, files itself, install/update instructions).
- Network installation plans.
- Type of installations.
- Silent installation - no display of the progress of the installation.
- Unattended installation - installation performed without user interaction.
- Self installation - unattended installation without the need of initial launch of the process.
- Headless installation - installation performed without using a monitor connected to the destination computer.
- Clean installation - cleaning up a destination partition (formatting) before actual installation.
- Flat installation - first copying installation files from a media to a hard disk and then installing them from the hard drive.
- Network installation - installation of a program from a shared network drive.
- Virtual installation - performing a virtual installation to check for errors before committing the real installation.
Attention is drawn to the following places, which may be of interest for search:
Loading of device drivers |
In this place, the following terms or expressions are used with the meaning indicated:
Installation | setup, deployment |
This place covers:
Removing software and all its related components.
Uninstallation of software i.e. removing software and all its related components, without interfering with the operation of other software;
Undoing installations/update.
Rollback, reverting to a previous installation/update status. Requires the use of some kind of log file.
Attention is drawn to the following places, which may be of interest for search:
Unloading program code from executable memory | |
Garbage collection |
This place covers:
Installation of whole systems by copying disk images to target systems,
Cloning installed systems.
Attention is drawn to the following places, which may be of interest for search:
Software billing |
In patent documents, the following abbreviations are often used:
BTO | Build to order |
MTO | Make to order |
This place covers:
Installation or update explicitly taking into account hardware characteristics of the target.
Attention is drawn to the following places, which may be of interest for search:
Retargetable compilation | |
Retargetable program loading |
This place covers:
- Updating of existing software, i.e. modifying already installed software to a desired version.
- Being informed of new software that has become available in order to update including installation for the update.
- Synchronization of software of disconnectable devices after their reconnection to the network automatically upgrading software to the correct version.
- Transparent update (e.g. after boot, after update becomes available, regular check for updates,…)
- User-initiated update.
This place does not cover:
Security arrangements therefor |
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Scheduling of updates for software modules stored at the client | |
For set top boxes |
Attention is drawn to the following places, which may be of interest for search:
Error handling during software upgrade | |
Synchronizing caches | |
Replication of documents/files | |
Software upgrading/downloading on mobile terminals |
This place covers:
- Updating software stored in non-volatile, alterable, solid-state storage, e.g. flash or EEPROM.
- In place updating
Attention is drawn to the following places, which may be of interest for search:
Update program code stored in non-alterable ROM | |
Changing the capability of a processor by loading new microcode, e.g. representing a different instruction set | |
Secure firmware programming | |
Low level details of writing to solid-state storage |
This place covers:
- Updating software while it is executing or running
Specific topics included:
- Hot-plugging of new software into a running system
- Run-time adaptation of the functionality of executable code by relinking to new code modules
Attention is drawn to the following places, which may be of interest for search:
Power plants, Industrial process controllers | |
Telecommunication systems |
This place covers:
Update methods explicitly demonstrating how a new version of software is created from an old version and update instructions and/or differential data. The simplest way to update a piece of software from a first version to a second version is to remove the first version in its entirety and replace it by the entire second version. This method, although conceptually simple, is highly inefficient, especially in the case where the second version differs only slightly from the first version:
- It is always necessary to provide the target with the entire second version; if a network is involved, this puts a high burden on the network
- It might take a long time to perform the update because the entire first version has to be deleted and the entire second version has to be written.
This group tackles this problem in that the update is performed by using the existing instance of the first version as a basis and to generate the instance of the second version therefrom. The scope of the group can thus be described as dealing with the details of how to modify an existing instance of the first version in order to arrive at the second version.
Typically, the second version is created by only changing those parts of the first version that actually change. This can be accomplished by creating a difference file (delta) that describes the differences of the second version with regards to the first version. The delta is provided to the target and applied to the first version thus yielding the second version. This delta can be passive - the delta is applied by an updater - or active -the delta contains instructions to actually perform the update.
Incremental update more generally refers to details of the steps involved to convert one piece of software into another. Differential update is more specific and explicitly uses differences between the two pieces of software.
Attention is drawn to the following places, which may be of interest for search:
Updating remote displays by only transmitting differences | |
Comparing a list of software actually installed on a device and a list of software that should be installed on a device; identify software not installed that should be installed on install this software on the device | |
Delta for version control systems | |
Delta in the context of file systems | |
Calculation of difference between files | |
Compression in general |
This place covers:
Updating software that is stored in non-alterable ROM.
This place covers:
- Adapting the code of a program in response to new requirements, changes to the environment, detection of bugs, etc.
- When new functionality is required, analysing the code in order to find the points to edit; generating new code, and incorporating it into the application
This place covers:
Version control, administering version numbers and releases. Deals with the problem of managing a modular software system: keeping track of the changes and the different version of the modules, the interrelation between the modules, the effects of the changes of one module on the other modules, the problem of multiple users editing different modules.
Includes in particular :
- Make, Build
- Analysing changes to/conflicts between sources
- SCCS-like tools
- Dependency analysis
- Comparing/obtaining dates of last changes of sources/intermediates/targets;
- CVS - Concurrent Version Control, SVN, GIT, ...
This place does not cover:
Security arrangements therefor |
Attention is drawn to the following places, which may be of interest for search:
Dependency analysis in compilers | |
Dealing with different versions of software in the context of software updating | |
Configuration of peripheral devices | |
Configuration in the sense of changing parameters | |
Version control for text documents |
This place covers:
Applying any change to a computer program's code which improves its readability or simplifies its structure without changing its results. In software engineering, "refactoring" a source code module often means modifying the module without changing its external behavior, and is sometimes informally referred to as "cleaning it up".
Code refactoring can be considered the design-time equivalent of code optimization (G06F 8/443). Code refactoring is concerned with improving the structure of the code in view of easier maintenance whereas code optimization is concerned to make the code better for a particular aspect (speed, size, energy).
In this place, the following terms or expressions are used with the meaning indicated:
Code Refactoring | the process of changing software such that the changes do not alter the external behavior of the code, yet improve the internal code structure |
Re-engineering | In contrast to reverse engineering |
This place covers:
Augmenting program code with additional information in order to increase its understandability in view of easier maintenance.
Documenting program code, inserting comments in source code.
This place covers:
Reverse engineering of HLL source code to its underlying design, model.
Attention is drawn to the following places, which may be of interest for search:
When the reverse engineering is performed in the context of binary to binary translation | |
Decompilation and dissassembly | |
Protecting software against software analysis or reverse engineering, e.g. by code obfuscation |
This place covers:
Static analysis of the structure of program code.
Attention is drawn to the following places, which may be of interest for search:
Analysing program code in order to identify reusable program parts | |
Monitoring program code execution |
This place covers:
Detecting code clones, e.g. introduced as a result of copy & paste by the programmer.
Attention is drawn to the following places, which may be of interest for search:
Reuse, i.e. identifying recurring pieces of code for purposes of reuse | |
Exlining, i.e. finding similar sequences of code to replace them with a procedure invocation | |
Plagiarism detection for source code |
This place covers:
Adapting program code to run in a different environment, i.e. a different architecture or operating system.
This place covers:
Measurement of software metrics related to a software development project, such as product metrics and process metrics.
Attention is drawn to the following places, which may be of interest for search:
Measuring certain characteristics of a program in view of debugging |
Not to be confused with G06F 11/362 , which deals with measuring certain characteristics of a program in view of debugging.
This place covers:
The Year 2000 problem, i.e. adapting software so as to comply with a not-foreseen date format.
In patent documents, the following abbreviations are often used:
Y2K | Year 2000 |
This place covers:
Program control for general purpose computers.
Runtime execution of programs.
This place does not cover:
Program control for peripheral devices |
Attention is drawn to the following places, which may be of interest for search:
Note for use of these definitions:
In the sub-groups of G06F 9/00 there are rules of classification which differ from the rules of the IPC, and are specified in this section.
The sub-groups mentioned under "Informative references"; "Limiting references" and "Relationship between large subject matter areas" are to be taken as indicators as to where the document to be classified may be forwarded or circulated for classifiying.
Specific combinations or conventions of classification are mentioned under "Special rules of classification".
Not currently used, as old technology.
This place does not cover:
Arrangements for program control using storeddevelopment of programs; Software engineering |
Not currently used, as old technology.
This place covers:
Programming arrangements for computers having a stored program. Covers execution of stored programs, and arrangements therefor.
Attention is drawn to the following places, which may be of interest for search:
Program control for machine tools using a digital processor |
This place covers:
Arrangements for executing microcode in general.
A next instruction of the program, when fetched from program store, is translated into lower level microinstructions, usually by using the instruction to index into a microprogram or control memory to fetch a series of microinstructions which are then decoded to obtain control signals to carry out the function of the machine instruction.
Attention is drawn to the following places, which may be of interest for search:
Execution of machine instructions |
Precedence and classification rules:
The classification rules for subgroups G06F 9/22 - G06F 9/28 is different from those used in G06F 9/30 and subgroups.
All aspects disclosed in a document which are deemed useful for search receive a class, not just the subject matter of the invention. Hence multiple subgroups are to be used.
There is no distinction made between invention and additional subject matter, and the classes for additional subject matter are not used.
A single lower level group is given if appropriate. A higher level group is given for documents having features belonging to multiple subgroups.
In this place, the following terms or expressions are used with the meaning indicated:
Microprogram | internal set of instructions used to translate a machine instruction of the stored program into a series of control signals. The microprogram is usually fixed at runtime, and defines the operations of the processor. Changing the microprogram changes the functionality of the processor, i.e. what type of operations it can carry out, and how these are carried out. |
Nanoinstructions | instructions of a level lower than microinstructions i.e. multiple nanoinstructions are used to execute a microinstruction. |
In patent documents, the following words/expressions are often used as synonyms:
- "microprogram", "microcode", "firmware" and "microinstructions"
This place covers:
Microinstruction execution aspects independent of the type of microinstruction, e.g. decoding of microinstructions; timing.
Includes PLAs used as sequencers for microcode.
In patent documents, the following words/expressions are often used as synonyms:
- "PLA" and "Programmable Logic Array"
This place covers:
Specific types of microinstruction operations.
Microinstruction set, microinstruction format.
This place covers:
- Loading of microcode implying altering the processor functionality;
- Changing the processor operations by loading or modifying microcode in the control store, thereby altering the way in which instructions are implemented in microcode;
- Fetching control microcode from ROM into RAM for execution;
- Patching by loading new microcode. Usually implemented by substituting the microcode at a particular instruction address in the microstore by a correct version during instruction fetching.
Loading of operating system or application programs; loading of new versions of software G06F 9/445.
This place covers:
- microinstruction addressing arrangements;
- sequencers for microcode;
- microinstruction storage, and microinstruction retrieval or fetching.
This place does not cover:
Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel |
In patent documents, the following words/expressions are often used as synonyms:
- "microinstruction" and "microinstruction" or "microprogram" and "microprogram"
This place covers:
Formation of the microinstruction address e.g. using lookup table.
This place covers:
Retrieval of the next microinstruction
This place covers:
Address formation of the next microinstruction by selection according to the results of processing.
Next microaddress or microinstruction derived directly from the program flow, e.g. program counter, branch.
This place covers:
Address formation of the next microinstruction by selection of address on input of storage.
Selecting at the input to the control store, which address to use, and therefore which microinstruction is retrieved.
This place covers:
Address formation of the next microinstruction by selection of microinstruction on output of storage.
Inputting several addresses into the control store, and selecting at the output of the control store which microinstruction to execute.
This place covers:
Address formation of the next microinstruction by selection not based on the results of processing.
Selecting next microaddress or microinstruction not derived directly from the program flow, e.g. interrupt, patching.
Attention is drawn to the following places, which may be of interest for search:
Patching by microcode loading | |
Address formation of the next machine instruction for runtime patching |
In this place, the following terms or expressions are used with the meaning indicated:
Patching | repairing errors of microcode in read-only storage. Usually implemented by substituting the microcode at a particular address in the microstore by a correct version during fetching. |
Interrupt | changing execution flow in response to an (external) event which must be handled with a higher priority. |
This place covers:
Means to improve speed of microcode execution e.g. dual control stores.
Parallel or concurrent execution of microinstructions.
Takes precedence over other sub-groups of G06F 9/22.
This place does not cover:
Arrangements for executing microinstructions |
These rules of classification apply to the group G06F 9/30 and subgroups:
All aspects disclosed in a document which are deemed useful for search are classified.
There is no distinction made between invention and additional subject matter.
Note that combinations of subgroups are possible from different hierarchy levels, or from the same level within the hierarchy.
The following IPC subclasses are not used in this classification scheme, but are covered by the subgroups listed here:
IPC group G06F9/302 covered by CPC group G06F 9/3001;
IPC group G06F9/305 covered by CPC group G06F 9/30029;
IPC group G06F9/308 covered by CPC group G06F 9/30018;
IPC group G06F9/312 covered by CPC group G06F 9/30043;
IPC group G06F9/315 covered by CPC group G06F 9/30032;
IPC group G06F9/318 covered by CPC group G06F 9/30181.
In this place, the following terms or expressions are used with the meaning indicated:
Machine instructions | Executable instructions of the processor, which can be decoded to obtain control signals |
This place covers:
Execution of specific individual machine instructions with a specific opcode and/or instruction format.
Adaptation of hardware, and hardware control, to carry out the execution of a specific machine instruction with a specific opcode and/or instruction format.
Attention is drawn to the following places, which may be of interest for search:
Multiple parallel functional units executing instructions |
In the subgroups of G06F 9/30003, if the execution of the machine instruction includes special arrangements for the setting of a condition code or flag, then also use G06F 9/30094.
In the case of a single machine instruction which carries out a combination of operations, use a subgroup for each operation.
In the subgroups hereof, the terms in capitals which are used as examples, refer to well-known types of instructions characteristic to that subgroup.
This place covers:
Specific instruction to perform operation between input data operands, usually returning an output data operand as the result.
Instructions for complex operations on data, e.g. checksum, hash, transforms, cryptography and random number generator instructions.
Attention is drawn to the following places, which may be of interest for search:
Specific instruction for operation on memory operands |
This place covers:
Specific arithmetic instruction, e.g. add, multiply and multiply accumulate.
Includes how to select the specific operation to execute in an ALU.
In patent documents, the following abbreviations are often used:
ALU | Arithmetic Logic Unit |
MAC | Multiply-Accumulate |
FMA | Fused Multiply Add/Accumulate |
This place covers:
Arithmetic operation where the bit width operated on may be variable precision; e.g. floating point with rounding to fit register; double precision arithmetic.
Bit-sliced arithmetic operation.
Attention is drawn to the following places, which may be of interest for search:
Multiple arithmetic units executing an instruction in tandem or cascaded |
This place covers:
Specific instruction for operation on a series of connected bits, bytes, or characters.
Examples include the EDIT instruction which alters a portion of a character string, or a Find-First-One instruction which detects the position of the first '1' in a string of bits.
Includes cyclic redundancy check instructions.
This place covers:
Specific instruction for comparison between two operands.
Includes matching, greater/less than, minmax instruction.
In patent documents, the following abbreviations are often used:
MINMAX | instruction to find the minimum of a series of input operands, alternatively to find the maximum of the same. |
This place covers:
Specific instruction for conversion from one data format to another.
Includes Endian conversion; Conversion between integer and floating-point; Decimal conversion instructions.
Attention is drawn to the following places, which may be of interest for search:
Data re-arranging instruction, e.g. Shuffle, Permute |
This place covers:
Specific instruction for logical operation or combination, e.g. XOR, NOT.
This place covers:
Specific instruction for moving, rearranging, or re-ordering data within a register.
Examples include: Move instruction which transfers data between registers; Permute/Shuffle instruction which changes the order of data in a register; Rotate or Shift instruction which moves bits or bytes within a register.
Attention is drawn to the following places, which may be of interest for search:
Instruction for operation on string operands | |
Instructions for format conversion operations | |
Instruction for operation on memory operands |
In this place, the following terms or expressions are used with the meaning indicated:
Move | instructions to pass data between memory locations, or between registers, without operating on the data. |
Shift | instructions to move data in a serial fashion from one location to another, where the distance moved is usually less than a word, e.g. shifting data within a register by a few bits. |
Rotate | instructions which are shift instructions where the bits shifted serially out are inserted into the location at the opposite end. |
Permute or Shuffle | instruction which intermingles parts of a datum to produce a new datum. |
This place covers:
Specific instruction operating on multiple data stored in a single register, thereby effecting a SIMD operation.
Instructions operating on packed arrays of elements, e.g. vector, tile or matrix operations.
Attention is drawn to the following places, which may be of interest for search:
Multiple functional units executing an instruction in parallel |
This subgroup may be used in combination with other subgroups of G06F 9/30007, according to the operation performed.
This place covers:
Using a mask while operating on and/or generating packed data. A mask may contain one or more bits for each element of packed data and may be located in a mask register.
Generating a mask used for operating on and/or generating packed data.
In patent documents, the following words/expressions are often used as synonyms:
- mask and predicate
This place covers:
Specific instruction for operation on memory operands in general.
Specific instruction for control operation on memory.
Memory to memory Move instruction.
Stack instructions POP, PUSH
Table lookup instructions.
A combination of a memory operation and further operation e.g. atomic memory operations such as read-modify-write, test-and-set.
Register allocation instructions.
Attention is drawn to the following places, which may be of interest for search:
Specific instruction for data operation |
For atomic memory operations use in combination with serialisation control instructions G06F 9/30087, and possibly G06F 9/3834 for memory consistency.
This place covers:
Specific instruction to read or write data from a memory location, e.g. LOAD, STORE, Load Multiple.
Specific instruction to clear or reset a memory location, e.g. CLEAR.
Register reset or clear instructions.
Context saving or restoring instructions.
For Load Multiple when executed as an iterative instruction use also G06F 9/30065.
This place covers:
Specific instructions for control data or instruction prefetching from memory, e.g. Hint instruction.
Specific instructions to control cache operation, e.g. Cache Flush.
Specific instructions to control a TLB or a page table, e.g. page table entry clearing instruction.
This place covers:
- Specific instruction to control program flow in general.
- Execution of an instruction to select a next instruction other than the next sequential instruction, e.g. for branching.
- Execution of an instruction for facilitating branching, e.g. Prepare-To-Branch instruction.
Specific instruction for monitoring or tracing program flow e.g. breakpoint instruction; flow signature instruction.
Only to be used when there is subject matter relating to special adaptations or details of handling of an unconditional branch instruction.
This place covers:
Special adaptations to execute a specific instruction which unconditionally branches to a target address independent of any condition.
Examples of unconditional branch instructions are CALL, GOTO and RETURN insofar as these are unconditional.
Only to be used when there is subject matter relating to special adaptations or details of handling of an unconditional branch instruction.
This place covers:
Specific instruction which causes conditional branching to a target address dependent on a runtime condition, else continues execution with the next sequential instruction.
Includes IF-THEN-ELSE constructions.
Only to be used when there is subject matter relating to special adaptations or details of handling of a specific conditional branch instruction.
This place covers:
Specific instruction which causes a branching to one of several alternative target addresses depending on a runtime condition.
This place covers:
Specific instruction used for loop control, e.g. specific loop start or end instructions.
Specific instruction which is repeatedly executed, thereby forming a (short) loop, e.g. REPEAT.
Attention is drawn to the following places, which may be of interest for search:
Address formation for loops, loop detection | |
Loop buffering |
This place covers:
Specific instruction which causes a number of instructions to be skipped i.e. not executed, thus effecting a (short) forward branch, e.g. SKIP.
A skip of a single instruction is regarded as conditional instruction execution, not skipping.
Attention is drawn to the following places, which may be of interest for search:
Conditional branch instruction | |
Single instruction skip as conditional execution. |
This place covers:
Specific instruction for conditional operation depending on a runtime condition, which is not for control of program flow, i.e. instruction that is not a branch.
The operation carried out depends on a runtime condition, for example ADD or SUBTRACT depending on the value of the sign bit. Another example is a MOVE which is executed or not depending on a runtime condition.
Includes instructions which are executed conditional on a predicate or guard.
Includes conditional instructions in a branch shadow.
Attention is drawn to the following places, which may be of interest for search:
Conditional branch instruction | |
Multiple instruction skipping for forward branch. | |
Instruction which executes differently according to a mode |
G06F 9/30058 has precedence.
May be used in combination with other sub-groups of the G06F 9/30003 according to the operation performed by the conditional instruction, e.g. conditional MOVE in combination with G06F 9/30032.
In this place, the following terms or expressions are used with the meaning indicated:
Conditional | dependent on a runtime condition or operational status. |
Guard | a tag indicating a condition which is assigned to an instruction. According to the outcome of the condition evaluation, the instruction is executed or skipped. Often assigned by the compiler to avoid branches |
Predicate | same meaning as 'guard' |
This place covers:
Specific instructions for operation control in general.
Includes mode switching instructions.
Includes no-operation instructions [NOP].
Attention is drawn to the following places, which may be of interest for search:
Specific instructions for program flow control | |
Multi-cycle NOP used as a pipeline delay instruction |
This place covers:
Specific instruction to control an instruction pipeline, e.g. HALT, FLUSH
Instructions for variable delay of pipeline or execution, e.g. multicycle NOP.
This place covers:
Specific instruction to control power consumption or thermal aspects of the processor, e.g. SLEEP.
This place covers:
Specific instruction to control serialisation of instruction execution; to control synchronisation of instruction execution.
Includes specific instructions used to implement memory locks; barriers. Includes instructions to facilitate atomic execution.
Attention is drawn to the following places, which may be of interest for search:
Program synchronisation ; Mutual exclusion |
For atomic memory operations use also G06F 9/3004.
For barrier or fence instructions use also G06F 9/3834.
For synchronisation instruction which affects the execution of a thread use also G06F 9/3009.
This place covers:
Specific instruction to control multi-threading; starting and stopping threads, e.g. FORK; JOIN.
This place covers:
Special arrangements for the generation or storage of runtime conditions, e.g. flags (Carry, Zero flag, etc.); writing to status register.
Attention is drawn to the following places, which may be of interest for search:
Execution of instructions according to a runtime mode |
This place covers:
Groups of registers; register files.
Register file addressing; addressing partial registers.
Accessing register file e.g. contention.
Attention is drawn to the following places, which may be of interest for search:
Register address space extension | |
Register renaming |
In this place, the following terms or expressions are used with the meaning indicated:
Register | set of one-bit storages, e.g. latches, accessed in parallel |
Register file | set of registers. May be implemented in a single or in multiple memories |
In patent documents, the following abbreviations are often used:
GPR | general purpose register |
This place covers:
Special adaptation of the use of single or multiple registers for a dedicated purpose, not being general purpose registers. May not be part of the register file.
Examples include particular use of dedicated address register, control register, status register, condition code register, Top Of Stack register.
Attention is drawn to the following places, which may be of interest for search:
Program counter registers |
Only to be used when there is subject matter relating to special adaptations or details of use of a special purpose register.
This place covers:
Details of the structure of an individual register.
Registers having associated bits e.g. valid bits, tags, flags.
This place covers:
Registers which are logically partitioned into multiple operands, e.g. for packed data or parallel operations.
Attention is drawn to the following places, which may be of interest for search:
Multiple registers used for variable length operands |
This place covers:
Register structure for variable length operands, i.e. variable length data can be stored, e.g. single register for storing an M-bit integer or an N-bit integer, or a single register for storing an X-bit integer or a Y-bit floating point value.
Use of partial registers for short data.
Combinations of registers for longer or higher-precision data, e.g. by concatenation.
Accessing of variable length registers.
Attention is drawn to the following places, which may be of interest for search:
A single register for multiple operands |
This place covers:
Registers which cannot be addressed by an instruction, and hence are invisible to the architecture, e.g. coupled registers, not forming part of the register space.
Register with an associated copy, e.g. for saving of architectural state.
Use in combination with G06F 9/30123 for shadow register set used for another context.
In this place, the following terms or expressions are used with the meaning indicated:
Register space | the address space used by registers i.e. the range of program addressable register locations. |
This place covers:
The physical or logical organisation of the register space in general.
Includes partitioned, distributed or banked register files, e.g. per execution unit.
Local and global register files.
Register banks for register space extension use G06F 9/30138.
Register banks for context data use G06F 9/30123.
In this place, the following terms or expressions are used with the meaning indicated:
Register space | logical address space for registers, i.e. the range of addresses defined by a register specifier |
This place covers:
Organisation of sets of registers used for storing the data of a particular context, e.g. local variables.
Includes thread buffers used to hold the context of a thread, and forming part of an instruction stream.
Use in combination with G06F 9/30116 for shadow register set used for another context.
In this place, the following terms or expressions are used with the meaning indicated:
Context data | operands and data representing the architectural state of a context, and which needs to be saved on a context switch |
This place covers:
Organisation of sets of registers used to implement register windows.
May have a pointer to the first window location, which may be used as a base address. Used for example for fast context switching, by moving from a current window to a next window.
In this place, the following terms or expressions are used with the meaning indicated:
Register window | set of contiguous registers used to implement a window to hold context data |
This place covers:
Organisation of sets of registers used to store different types of data.
Includes address registers, Boolean registers, floating point registers, parameter registers.
This place covers:
Register stacks are a series of register locations implementing a stack. The register stack is addressable generally using a register containing the Top-of Stack pointer. Writing to the TOS location implies adding an entry to the top of the stack, reading implies removing an entry from the top of the stack.
The implementation of stack read/write operation in a register stack may involve physically shifting the entries in the queue up or down using shift registers; or alternatively may involve incrementing or decrementing the TOS pointer to access the next or previous register.
Details of shift registers implementing a FIFO buffer are also found here.
Attention is drawn to the following places, which may be of interest for search:
Special purpose register for TOS pointer |
In this place, the following terms or expressions are used with the meaning indicated:
Register stack | contiguous set of register locations used to implement a stack. May be implemented as a shift register |
Shift register | register which shifts its contents in a bit-parallel fashion into an adjacent register. |
In patent documents, the following abbreviations are often used:
TOS | Top of Stack |
This place covers:
Increasing or decreasing the number of available addressable locations in register address space, e.g. more or less physical registers than logical registers, register cache.
Extension of register address length e.g. using indexing.
This place covers:
Hardware implementation of register files.
Register file port architecture; address or data ports.
Internal bypass path of register files.
Adaptations of register file hardware for particular problems, e.g. for power saving; for fault tolerance.
Includes transposing register file being accessible vertically or horizontally.
In this place, the following terms or expressions are used with the meaning indicated:
Bypass path | direct connection between a register file input and output. |
This place covers:
Decoding of instructions in general, of opcode in particular.
Instruction format, instruction encoding, instruction word fields.
Instruction set as a whole.
Decoding of microinstructions G06F 9/223.
Attention is drawn to the following places, which may be of interest for search:
Decoding of microinstructions | |
Runtime instruction translation |
Runtime instruction translation using a decoder is classified under G06F 9/3017 and sub-groups, even if this involves decoding, since the purpose is translation.
In this place, the following terms or expressions are used with the meaning indicated:
RISC | Reduced Instruction Set Computer. Architecture having set of simple instructions which are decoded into direct control signals, and which take a single cycle to execute. |
CISC | Complex Instruction Set Computer. Architecture having set of complex instructions which are decoded into internal (native; microcode) instructions, and which may take multiple cycles to execute. |
This place covers:
Decoding of variable length instructions.
Includes instruction where the relative length of operation and operand part is variable.
Ensuring a whole instruction is decoded. Parsing variable length instructions (VLI).
Attention is drawn to the following places, which may be of interest for search:
Instruction pre-fetching when instruction length is variable, e.g. line-crossing fetch; alignment in instruction buffer |
This place covers:
Arrangements for determining and/or marking the boundaries of a variable length instruction (VLI); Special arrangements for determining the length of a variable length instruction other than by decoding the length.
Attention is drawn to the following places, which may be of interest for search:
Pre-decoding of instructions |
This place covers:
Instruction encodings (e.g. Gray coding) to achieve a secondary effect, e.g. power saving, saving memory space, security, fault tolerance.
Computer-aided instruction set design G06F 30/00.
Attention is drawn to the following places, which may be of interest for search:
Runtime instruction translation for compressed or encrypted instructions |
Use in combination with G06F 9/30178 for decompression by translation, or with G06F 9/3822 for format field decoding for VLIW.
This place covers:
Decoding operand fields of instructions; Format of operand fields of instructions, e.g. specifier format.
Attention is drawn to the following places, which may be of interest for search:
Decoding the opcode of instructions |
This place covers:
Instruction format which is shorter by having operand specifier field(s) missing but implied, e.g. Top of Stack, accumulator, dedicated register.
This place covers:
Decoding of immediate operand specifiers or constants; Concatenation of immediates; Buffering of immediates.
In this place, the following terms or expressions are used with the meaning indicated:
Immediate | data in an instruction to be used directly as an operand, e.g. without storing in a register |
Constant | same meaning as 'immediate' |
This place covers:
Runtime translation of an instruction by decoding an instruction which is non-native to produce an instruction or set of instructions that can be decoded by the processor. The decoding of machine instructions of the executing processor's instruction set, or decoding of lower level microcode is not meant to be included here.
Altering the format or encoding of the input instruction, e.g. length of fields.
Translating a single instruction, e.g. macro, into multiple executable instructions, or the reverse (macro formation).
Attention is drawn to the following places, which may be of interest for search:
Decoding of microinstructions | |
Decoding of instructions | |
Instruction emulation or interpretation |
In this place, the following terms or expressions are used with the meaning indicated:
Macro | An opcode which is an alias for a series of instructions, i.e. a function. |
Non-native instruction | An instruction which is not executable in the architecture of the processor. |
This place covers:
Runtime translation of a non-native instruction (e.g. Javabyte, legacy code) into an executable native instruction using hardware means, e.g. decoder, look-up table.
Runtime translation for the purpose of ISA emulation in hardware.
Instruction emulation or interpretation G06F 9/455.
In this place, the following terms or expressions are used with the meaning indicated:
Non-native instruction set | set of instructions intended to execute on a different architecture, which cannot run without translation or reformatting. Legacy code may be considered non-native. |
Non-native instruction | an instruction which is not executable in the architecture of the processor. |
This place covers:
Runtime translation of an encrypted or compressed instruction into an instruction which can be executed.
Attention is drawn to the following places, which may be of interest for search:
Special encoding of instructions for saving memory or power. |
This place covers:
Modification or extension of the execution of an instruction in general.
Modifications to the instruction itself, or to the architecture, which increase the number of operations available to the architecture.
Attention is drawn to the following places, which may be of interest for search:
Execution unit with adaptable datapath for complex operation |
This place covers:
Modification of the operation of an instruction according to one or more bits encoded within, or appended to, the instruction, e.g. prefix, sub-opcode.
Attention is drawn to the following places, which may be of interest for search:
Modification of the operation of an instruction according to an execution mode |
This place covers:
Modification of the operation of one or more instructions according to a mode of operation, e.g. mode flag in a mode register.
Attention is drawn to the following places, which may be of interest for search:
Mode switching instruction | |
Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode |
This place covers:
Modification of the operation of an instruction according to a data type descriptor, e.g. dynamic data typing.
This place covers:
Modification of the operation of an instruction by modifying the decoding of the instruction using more than one decoder, or a decoder which is adaptable or programmable.
Extension of the instruction set using multiple decoders for multiple instruction sets.
This place covers:
Selecting or calculating the next instruction address.
Sequencers for machine instructions.
This place does not cover:
Concurrent instruction execution, e.g. pipeline, look ahead |
Attention is drawn to the following places, which may be of interest for search:
Subprogram jump |
This place covers:
Incrementing/decrementing means for the program counter.
Selection of next PC from pre-calculated constant values, e.g. +1, +2, 0, -1.
PC arrangements, e.g. multiple PCs.
In this place, the following terms or expressions are used with the meaning indicated:
Program counter | a dedicated register which holds the address of the current instruction in the program sequence |
In patent documents, the following abbreviations are often used:
PC | Program counter |
This place covers:
Address formation, or selection, for the next instruction, being a non-sequential address.
Address calculation or selection, for the execution of branch instructions in general, e.g. for multiple types of branch.
Selection of next instruction address from various alternatives, e.g. PC, a constant, branch target, branch fall-through.
In this place, the following terms or expressions are used with the meaning indicated:
PC address formation | address calculation, i.e. address selection |
This place covers:
Determination of program counter for an instruction that specifies where an address is located (rather than specifying the address itself) and branches using the address. The specification of the address location can be explicit (e.g. Branch R1) or implicit (e.g. RETURN). The address can be the target address or a base address used to calculate the target address.
Attention is drawn to the following places, which may be of interest for search:
Special adaptations or details of handling of a specific unconditional indirect branch instruction that are distinct from program counter determination | |
Special adaptations or details of handling of a specific conditional indirect branch instruction that are distinct from program counter determination |
In patent documents, the following words/expressions are often used as synonyms:
- Indirect branch, computed branch, register-indirect branch and indirect jump.
This place covers:
Formation of the next instruction address using an offset from the program counter.
Attention is drawn to the following places, which may be of interest for search:
Address formation of the instruction operand or result using PC-relative addressing |
This place covers:
Formation of the next instruction address for a loop.
Loop formation; loop detection.
Loop counters.
Attention is drawn to the following places, which may be of interest for search:
Specific loop control instructions or iterative instructions | |
Buffering of loop instructions |
This place covers:
Formation of the next instruction address for an interrupt, using hardware means e.g. look-up table.
This place covers:
Formation of the address of a next instruction for the purpose of patching an instruction.
Includes detection of program addresses or instructions to be patched.
Patching of software or loading of new version of software G06F 9/445.
Instruction emulation G06F 9/455.
Runtime patching of microcode in ROM G06F 9/268.
In this place, the following terms or expressions are used with the meaning indicated:
Patching | repairing errors in machine instructions in read-only storage at runtime. Usually implemented by substituting the instruction at a particular address in the memory by a correct version. |
This place covers:
- Addressing the instruction operand or the result.
- Operand addressing modes in general.
- Endian conversion.
Addressing of memories in general, address translation G06F 12/00.
Attention is drawn to the following places, which may be of interest for search:
Accessing an operand in a pipeline | |
Address translation |
In this place, the following terms or expressions are used with the meaning indicated:
Addressing mode | type of operand addressing e.g. indirect, indexed |
This place covers:
Increasing the size of the addressable operand memory space i.e. increasing the number of available addressable locations.
Extending the operand address space by increasing the bit length of addresses.
Extending the operand address space by use of multiple address spaces; bank pointer.
Address space extension in memory systems G06F 12/0615
Attention is drawn to the following places, which may be of interest for search:
Organisation of register space |
This place covers:
Address formation for a series or group of operands, e.g. for an array.
Address formation for pairs of operands at adjacent addresses i.e. addr;addr+1.
Attention is drawn to the following places, which may be of interest for search:
Prediction of operand addresses for operand prefetching | |
Addressing multiple banks |
May also be classified according to the addressing mode.
This place covers:
Address formation for a series of operands by adding a stride value to the previous address to form the next address.
May be used to predict the next operand address.
In this place, the following terms or expressions are used with the meaning indicated:
Stride | offset or displacement which may be a constant. |
This place covers:
Address formation using a single address operand, e.g. using the contents of an address register or GPR.
In this place, the following terms or expressions are used with the meaning indicated:
Indirect addressing | the address is the value contained in the register specified in the instruction. |
Direct addressing | the address is the value specified in the instruction. |
GPR | general purpose register |
This place covers:
Operand address formation using more than one address operand, e.g. using base + index/offset registers.
Indexed address formation or calculation details.
Uses at least two address operands which are added or concatenated. The resulting address may be longer than the base address, hence indexed addressing may be also used for address space extension.
Attention is drawn to the following places, which may be of interest for search:
Address space extension |
In this place, the following terms or expressions are used with the meaning indicated:
Indexed addressing | the address is the value contained in the base register specified in the instruction summed with the value contained in the index register specified in the instruction. The index part of the address usually consists of less bits than the base part of the address, and is therefore an offset from the base address |
In patent documents, the following words/expressions are often used as synonyms:
- " index"," offset", "displacement" and "delta"
In this place, the following terms or expressions are used with the meaning indicated:
Wraparound | incrementing the maximum address value, e.g. 11111111 leads to wraparound to the lowest address value, e.g. 00000000, so that addressing is continuous, avoiding an overflow error |
Modulo or circular addressing | same meaning than Wraparound |
In this place, the following terms or expressions are used with the meaning indicated:
Scaling | indexed addressing where the index address is multiplied by a factor before adding to the base address |
This place covers:
- Address formation using the program counter as a base for indexed addressing;
- PC-relative addressing.
Attention is drawn to the following places, which may be of interest for search:
Next instruction addressing using an offset from the program counter. |
This place covers:
Simultaneous execution of instructions in general, in parallel or pipelined.
Special architectures where instruction execution is concurrent.
Includes stack machines.
Concurrent program execution: G06F 9/46.
This place covers:
Prefetching and fetching of instructions for execution, in general.
Instruction buffering; instruction caches
This place covers:
Prefetching of instructions for branch paths.
In this place, the following terms or expressions are used with the meaning indicated:
Hedging | Fetching both paths of an unresolved conditional branch |
Branch folding | Removal of a branch instruction from the instruction stream, e.g. by including the branch condition in an instruction as a predicate |
This place covers:
Using a history of previous branch target addresses to predict the address to fetch from, e.g. branch target buffer, branch history buffer;
Address buffers for predicting next fetch address for a branch, e.g. return address stack.
Attention is drawn to the following places, which may be of interest for search:
Dynamic prediction of branch direction | |
Static prediction of branch direction | |
Hybrid prediction of branch direction |
In this place, the following terms or expressions are used with the meaning indicated:
BTB | buffer indexed by an instruction fetch address or PC, which returns the predicted target address if the instruction is a taken branch. |
BHT | buffer indexed by a branch instruction address, which returns a prediction of whether the branch is taken or not. |
Return address stack | Stack to hold the program address to return to after a Call-type branch. The stack structure allows nesting of Calls. |
In patent documents, the following abbreviations are often used:
BTB | Branch Target Buffer |
BHT | Branch History Table |
BTAC | Branch Target Address Cache |
This place covers:
Prefetching of instructions intended to be used more than once, thereby saving fetch time.
Buffering of instructions for reuse, e.g. trace cache.
Branch target caches for caching a branch target instruction.
The storing of addresses, e.g. branch target address caches (BTAC), is not meant to be stored here.
Program tracing for monitoring G06F 11/3466.
In this place, the following terms or expressions are used with the meaning indicated:
Branch target cache | History buffer of first instruction at a branch target, which returns an instruction rather than an address, thus saving fetch time. |
Trace cache | Cache storing a history of previously executed paths through the program, as sequences of instructions. Accessing the trace cache returns the next predicted instructions in the sequence. |
This place covers:
Prefetching of instructions intended to be used in a loop, thereby saving fetch time;
Buffering of instructions for loops.
Attention is drawn to the following places, which may be of interest for search:
Specific loop control instructions | |
Formation of the next instruction address for a loop; detection of loops |
This place covers:
Instruction prefetching in an architecture allowing instruction modification.
How to handle store-into-instruction-stream, wherein an instruction in memory is modified, e.g. by writing back a new operand value, hence the prefetched copy of the instruction is stale.
This place covers:
- Special arrangements for buffering of prefetched instructions;
- Prefetch buffers;
- Banked or partitioned instruction buffers.
In this place, the following terms or expressions are used with the meaning indicated:
Prefetch buffer | in this subclass, a buffer to hold a recently fetched set of instructions, usually between the instruction memory and the instruction decoder, e.g. cache line buffer. |
In patent documents, the following words/expressions are often used with the meaning indicated:
"cross-modifying code" | "instructions which can modify other instructions". |
"self-modifying code" | "instructions which can modify themselves". |
This place covers:
Arrangements for (correct) alignment of instructions in prefetch buffers.
Instruction prefetching which crosses a line in memory or cache, for example for variable length instructions.
Attention is drawn to the following places, which may be of interest for search:
Variable length instructions | |
Predecoding instructions for alignment information |
This place covers:
Decoding for enabling the concurrent execution of instructions.
Attention is drawn to the following places, which may be of interest for search:
Decoding of a single instruction |
This place covers:
Decoding for enabling the pipelined execution of instructions.
Predecoding stage in a pipeline.
Partitioned decoding stage.
Attention is drawn to the following places, which may be of interest for search:
Instruction alignment using predecode information |
This place covers:
Decoding for enabling the parallel execution of instructions, e.g. parallel decode units.
Special details of decoding multiple instructions in parallel, e.g. decoding of Very Long Instruction Word format field.
Attention is drawn to the following places, which may be of interest for search:
Compressed VLIW instructions |
This place covers:
Retrieving operands for instructions, from memory, registers, other pipeline stages or execution units.
Attention is drawn to the following places, which may be of interest for search:
Load, Store instructions | |
Register file accessing in general |
In patent documents, the following words/expressions are often used as synonyms:
- "input operand" and "source"
- "output operand", "result" and "destination"
This place covers:
Arrangements for the transfer of an instruction result to a dependent instruction, without first storing in the architected state, e.g. bypassing the register file;
Transfer of operand data from the output of a functional unit to the input of another functional unit, without waiting for the completion of the data producing instruction, or without waiting for the data to be stored in the register file, e.g. locally between pipeline stages, within a pipeline stage.
Attention is drawn to the following places, which may be of interest for search:
Transfer of data between Store and Load instructions for memory consistency |
In patent documents, the following words/expressions are often used as synonyms:
- "bypassing" and "forwarding"
This place covers:
Bypass of an instruction result to a dependent instruction in another pipeline, or group of execution units, e.g. between pipelines, between clusters;
Bypass arrangements for global data.
Attention is drawn to the following places, which may be of interest for search:
Parallel execution units organised in clusters |
In this place, the following terms or expressions are used with the meaning indicated:
Cluster | Group of execution units and register resources |
This place covers:
Prefetching of data operands;
Software data prefetching;
Prefetching from a data cache reduces cache misses during execution of the instruction using the data.
Prefetching between higher level memories: G06F 12/0862.
Attention is drawn to the following places, which may be of interest for search:
Specific instruction to prefetch data from memory | |
Instruction prefetching | |
Speculative load instructions | |
Prefetching between higher level memories |
In this place, the following terms or expressions are used with the meaning indicated:
Operand prefetching | Look-ahead fetching of an operand before the execution of the instruction which will use the operand |
This place covers:
Reuse or prediction of the value of an operand;
Operand value prediction using a history of the value of an operand;
Operand value buffering for reuse;
Prediction of the address of an operand.
Data caches in general:G06F 12/08.
This place covers:
How to maintain memory consistency during operand accessing for instruction execution.
Avoiding errors caused by loads and/or stores to the same memory address being executed out of order or concurrently.
Ensuring stored operands and fetched operands are consistent, e.g. memory disambiguation.
Ensuring out-of-order loads receive the latest store information by forwarding.
Cache consistency protocols: G06F 12/0815.
Multiprogramming arrangements for transaction processing: G06F 9/466.
Multiprogramming arrangements for program synchronisation: G06F 9/52.
Attention is drawn to the following places, which may be of interest for search:
Specific atomic or synchronisation instructions, e.g. Read-Modify-Write | |
Operand bypassing between Load and Store instructions | |
Consistency of architectural state | |
Cache consistency protocols |
In this place, the following terms or expressions are used with the meaning indicated:
Memory consistency | Keeping data in the memory up-to-date. Read data should not be stale; written data should not be overwritten by older data, which may occur in out-of-order execution. |
Memory disambiguation | Checking stores against earlier executed out-of-order loads, and re-issuing the loads if their data is stale. |
This place covers:
Runtime scheduling or issuing of instructions, e.g. dynamic instruction scheduling, out of order instruction execution.
Issuing policies or mechanisms for instructions. Instruction dispatching to execution units or execution buffers.
Concurrent execution of instructions.
Synchronisation of instruction execution.
Runtime scheduling of tasks: G06F 9/4806
Attention is drawn to the following places, which may be of interest for search:
Accessing of operands for issue | |
Re-issuing of faulting instructions |
In this place, the following terms or expressions are used with the meaning indicated:
Issuing | Runtime selection or scheduling of the instructions to execute. |
Superscalar | Architecture where more than one instruction is selected to be executed in parallel in one cycle. |
VLIW | Very Long Instruction Word being a compound instruction word formed by the compiler, containing multiple sub-instructions to be issued and completed together in one cycle |
This place covers:
Special arrangements to detect or record data dependencies between instruction operands at issue time, e.g. register scoreboarding.
In this place, the following terms or expressions are used with the meaning indicated:
Data dependency | When a first instruction specifies an operand which is also specified in a following second instruction, the second instruction is dependent on the first, and cannot be executed until the dependency is resolved, or the operand is available. |
Register scoreboard | Table of indicators of which instructions use which registers. May be used for dependency checking by detecting two instructions having a matching indicator. |
In patent documents, the following words/expressions are often used as synonyms:
- "Pseudo data dependency" , "false data dependency" , "anti-dependency" , "write-after-write dependency" and "output dependency"
This place covers:
Special arrangements to carry out register renaming, e.g. as a means of avoiding pseudo dependencies;
Rename tables and buffer, which may form part of a reorder buffer.
Attention is drawn to the following places, which may be of interest for search:
Reorder buffers |
In this place, the following terms or expressions are used with the meaning indicated:
Register renaming | Associating a logical register specified in an instruction to a unique physical register. Allows multiple physical registers to be assigned to hold data for multiple instances of a logical register, thus avoiding false dependencies.Relies on the set of physical registers being larger than the set of logical registers. |
RAW, read-after-write dependency | Occurs when a read to the same location occurs after a write to the same location. If the instructions are not in program order, this may lead to wrong execution. |
WAW, write-after-write dependency | It occurs when a write to the same location occurs after another write to the same location. If the instructions are not in program order, this may lead to wrong execution. |
Pseudo data dependency, false dependency, anti-dependency, output dependency | Dependency which may be resolved without wrong execution, e.g. a write followed in program order by another write; a read followed in program order by a write. |
In patent documents, the following words/expressions are often used as synonyms:
- "RAW" and "read-after-write dependency"
- "WAW" and "write-after-write dependency"
- "pseudo data dependency", "false dependency", "anti-dependency", "output dependency"
This place covers:
Execution of instructions ahead of program order, with the presumption that execution will prove to be correct, e.g. speculative loads, boosting.
Speculative instructions which are executed, e.g. alternative paths of a branch.
Execution of instructions dependent on a branch before its outcome is known.
Execution of instructions in a low-level transaction, e.g. machine instructions between a start transactional execution machine instruction and an end transactional execution machine instruction.
Attention is drawn to the following places, which may be of interest for search:
Conditional instruction execution, e.g. predication | |
Result nullification for executed instructions | |
Recovery after mis-speculation |
In this place, the following terms or expressions are used with the meaning indicated:
Speculative instructions | Executed instructions which may not be on the actual path taken through the program, and therefore may require recovery after execution if mis-speculation occurs. |
Speculative loads | Look-ahead or early execution of load instructions, where recovery would be needed in the case of mis-speculation. |
Transaction | A sequence of instructions executed as an atomic group. A transaction either commits (its updates take effect), or aborts and is rolled back (its updates are discarded). |
This place covers:
Speculative execution of instructions using dynamic branch prediction;
Using runtime conditions, and the previous behaviour of branches, to predict the outcome of a branch, without having to wait for its execution, e.g. branch history table;
Early generation of branch results.
Attention is drawn to the following places, which may be of interest for search:
Prediction of a branch address/target | |
Using hybrid branch prediction |
In this place, the following terms or expressions are used with the meaning indicated:
Dynamic prediction | Branch prediction based on runtime conditions, as opposed to compile-time branch prediction. |
Branch history table | Branch prediction based on runtime conditions, as opposed to compile-time branch prediction. |
Branch Target Buffer | Buffer indexed by an instruction fetch address or PC, which returns the predicted target address if the instruction is a taken branch. |
Branch History Table | Buffer indexed by a branch instruction address, which returns a prediction of whether the branch is taken or not. |
Branch Prediction Counter | saturating counter used to obtain a weighting for a branch prediction based on several branch executions. |
In patent documents, the following abbreviations are often used:
BTB | Branch Target Buffer |
BHT | Branch History Table |
BTAC | Branch Target Address Cache |
This place covers:
Speculative execution of instructions using static branch prediction, e.g. branch taken strategy;
Branch prediction performed by compiler, and not dependent on runtime conditions, e.g. hint bits.
Attention is drawn to the following places, which may be of interest for search:
Prediction of a branch address/target | |
Using hybrid branch prediction |
In this place, the following terms or expressions are used with the meaning indicated:
Static prediction | Branch direction is predicted based on compile-time branch prediction. |
Hint bit | Bit in branch instruction inserted by compiler to give an indication whether branch predicted taken or not. |
In patent documents, the following words/expressions are often used as synonyms:
- "hint bit" and "static bit"
This place covers:
Prediction schemes involving more than one type of predictor, e.g. selection between prediction techniques;
Static and dynamic prediction used alternately;
Local and global prediction mechanisms;
Two-level branch prediction.
Attention is drawn to the following places, which may be of interest for search:
Prediction of a branch address/target | |
Using dynamic prediction, e.g. branch history table | |
Using static prediction, e.g. branch taken strategy |
In this place, the following terms or expressions are used with the meaning indicated:
Two-level branch prediction | Two-dimensional prediction where the output of one method is used as an index into another method to provide a prediction (e.g. branch history's output as an index into a pattern history table). |
This place covers:
- Issuing instructions from multiple threads each having a context, including at least a program counter, and possibly registers and execution resources;
- Includes multiple streams for different threads, or from both directions of a branch;
- Interleaved execution of threads in a single or in multiple streams;
- Stream selection.
Thread scheduling or multithreading at OS or application level G06F 9/46.
This place does not cover:
Dispatching of multiple tasks or threads |
Attention is drawn to the following places, which may be of interest for search:
Context registers for multiple streams | |
Execution units or pipeline architectures for executing multiple streams |
In this place, the following terms or expressions are used with the meaning indicated:
Instruction stream | Architectural aspects, e.g. resources and context, used to execute a thread or series of instructions. Includes at least a program counter, and possibly including dedicated instruction buffers, registers, status register, execution units. |
This place covers:
Issuing of compound instructions;
Compounding single instructions into a group;
Issuing a group of instructions, that must complete in the same cycle;
Dispatching aspects of compound instructions, e.g. variable format VLIW instructions.
Attention is drawn to the following places, which may be of interest for search:
Decoding of VLIW format field |
In this place, the following terms or expressions are used with the meaning indicated:
Compound instruction | Consisting of sub-instructions, i.e. contains multiple opcodes, e.g. VLIW instructions. |
This place covers:
Post-execution stages
This place covers:
Special arrangements for reordering of instructions issued out-of-order;
Queue arrangements include reorder buffers;
Age tags include marking the instructions with the original program order.
In this place, the following terms or expressions are used with the meaning indicated:
Reordering | Restoring the program order after instruction execution, ensuring that the instructions complete in the correct order. |
Age tag | An indicator associated with an instruction to indicate its original program order, e.g. in the case of instructions executed out-of-order. |
This place covers:
Special arrangements to write back results to the architectural state or memory, which may be for ensuring correctness of the architectural state;
Special arrangements to write back multiple results from a low-level atomic or transactional block, e.g. machine instructions between a start transactional execution machine instruction and an end transactional execution machine instruction.
Attention is drawn to the following places, which may be of interest for search:
Specific machine instruction to store data to memory | |
Maintaining memory consistency | |
Recovery of architectural state after an exception |
In this place, the following terms or expressions are used with the meaning indicated:
Architectural state | Runtime data in the pipeline resources, including program counter, instruction queue, status register, condition codes, general purpose and special purpose registers, rename data, pipeline registers, etc. The state is updated when one of these resources is written to. |
This place covers:
Ensuring correctness of the architectural state by nullifying the results of wrongly executed instructions.
Nullifying may use, for example, preventing writeback; tagging the result as invalid; clearing of result.
Arrangements for nullifying the result of a predicted instruction where the predicate resolves to false.
Nullifying multiple results from a low-level atomic or transactional block, e.g. machine instructions between a start transactional execution machine instruction and an end transactional execution machine instruction.
Attention is drawn to the following places, which may be of interest for search:
Instructions which execute conditionally | |
Recovery from exceptions |
In this place, the following terms or expressions are used with the meaning indicated:
Nullification | Invalidation of an instruction result. The instruction has already executed, but the results are invalid, and must not update the architectural state. |
This place covers:
Recovery of correct instruction execution after an exception or fault;
Restoring the correct architectural state after an exception, e.g. after branch mis-prediction, arithmetic overflow.
May require nullifying wrong results; flushing the instructions in the pipeline; restarting the pipeline from the point of exception.
Error detection or correction: G06F 11/00.
Exception handling in genera: G06F 11/0793.
Attention is drawn to the following places, which may be of interest for search:
Instruction result nullification |
The group is only to be used for the handling of exceptions caused by instruction execution.
In this place, the following terms or expressions are used with the meaning indicated:
Architectural state | The runtime data in the pipeline resources, including program counter, instruction queue, status register, condition codes, general purpose and special purpose registers, rename data, pipeline registers etc. |
Exception, fault | Error caused by the execution of an instruction, e.g. floating point overflow; page fault; mis-speculation. |
This place covers:
Recovery using multiple copies of architectural state;
Restoring the architectural state to that previous to an exception using a previous version of the state, e.g. checkpoint, future file, shadow registers. Also known as rollback.
Software debugging: G06F 11/36.
Attention is drawn to the following places, which may be of interest for search:
Shadow register structure |
The subgroup is only to be used for the handling of exceptions caused by instruction execution. In particular, checkpointing for software debugging is not meant.
In this place, the following terms or expressions are used with the meaning indicated:
Architectural state | the runtime data in the pipeline resources, including program counter, instruction queue, status register, condition codes, general purpose and special purpose registers, rename data, pipeline registers etc. |
This place covers:
Handling or nullification of an instruction exception, e.g. using exception flags, which does not occur in the cycle in which the exception is detected, but later, e.g. at writeback stage.
This place covers:
Concurrent execution using instruction pipelines;
Control of instructions moving through a pipeline of functional stages. A typical pipeline consists of these stages: Instruction fetch; Instruction decode; Operand fetching; Instruction issue; Instruction execution; Instruction completion/Result writeback;
Pipeline control, e.g. flushing, halting;
Pipeline stages, e.g. type of stage, number of stages;
Variable length pipeline, e.g. elastic pipeline;
Counterflow pipeline;
Cascaded pipelines.
Data-driven systems, e.g. tokens: G06F 9/4494.
Computer architectures for data-driven systems: G06F 15/82.
Attention is drawn to the following places, which may be of interest for search:
Specific instructions for pipeline control | |
Asynchronous pipeline control, e.g. using handshaking |
In this place, the following terms or expressions are used with the meaning indicated:
Pipeline | Series of linearly sequential execution stages for executing instructions. The stages have buffers between them for output data which is input into the next stage. The buffers may be clocked so that data from one stage moves into the next stage on a clock signal. All stages move at once, else an asynchronous pipeline. |
Counterflow pipeline | Pipeline in which instructions travel down pipeline, but data travels up pipeline. |
Cascaded pipeline | Parallel pipelines where a group of instructions are issued in successive cycles to produce a staggered execution of the group. |
This place covers:
Instruction pipeline synchronisation;
Timing aspects of instruction pipelines, e.g. clock cycle, derating;
Clocking of pipeline stages; clock domains;
Clock skew problems;
Clock gating in pipelines, e.g. for power saving;
Latches and buffers between pipelines stages.
Attention is drawn to the following places, which may be of interest for search:
Specific instructions for pipeline control. |
In this place, the following terms or expressions are used with the meaning indicated:
Clock skew | lack of synchronicity between instances of a clock signal caused, e.g. by differing clock wire lengths. |
This place covers:
Asynchronous pipeline, e.g. using handshake signals between stages, e.g. ACK, DONE signals.
Pipelines where the stages do not all move at the same time.
In this place, the following terms or expressions are used with the meaning indicated:
Asynchronous pipeline | Pipeline where not all stages move at once, e.g. execution in a stage starts when a signal is received from previous stage, and ends by sending a done signal to next stage. |
Handshake signals | Exchange of signals between stages, e.g. to inform a next stage when data is available to process, and to inform a previous stage when data may be forwarded. |
This place covers:
Pipeline with dynamically varying length, e.g. elastic pipeline.
Multiple pipelines having different lengths.
In this place, the following terms or expressions are used with the meaning indicated:
Pipeline length | The number of pipeline stages. |
This place covers:
Pipeline architecture where a single stage is split into sub-stages (e.g. superpipelining) using pipeline buffer, with higher clocking rate implied for that stage, e.g. pipelined execution unit; pipelined decode unit.
Pipeline architecture having multiple stages for the same function, e.g. two execution stages, without higher clock rate.
Attention is drawn to the following places, which may be of interest for search:
Pipelined decoding |
This place covers:
Concurrent instruction execution using slave processor or coprocessor which controls its own execution i.e. has a decode unit or sequencer;
Means and protocol to transfer instructions and data to a slave processor, and to receive results in return;
Detection of presence or absence of a slave processor;
Reconfigurable coprocessors i.e. not special purpose.
Vector processors: G06F, G06F 15/8053.
Cryptographic processors: G06F 21/123 .
I/O or DMA processors: G06F 13/12.
Image or graphics processors: G06T 1/20.
Digital data processing G06F 17/00, G06F
Attention is drawn to the following places, which may be of interest for search:
Execution units executing under control of a master decoder | |
Peripheral processor | |
Vector processor |
In this place, the following terms or expressions are used with the meaning indicated:
Host | master processor to which the coprocessor is a slave |
In patent documents, the following words/expressions are often used as synonyms:
- "COP" and "coprocessor"
This place covers:
Slave processors which receive and decode instructions which are not explicit in the instruction set of the host, e.g. commands; function calls; using an escape code; using memory-mapped commands;
Slave processors which are adapted to execute a non-native instruction set, e.g. Java coprocessor.
In this place, the following terms or expressions are used with the meaning indicated:
Non-native instruction set | Instructions which cannot be executed on the master processor |
This place covers:
Special arrangements or protocols for transfer of instructions or commands, and for exchange of data with a slave processor which executes non-native instructions.
This place covers:
Special arrangements for concurrent instruction execution using parallel functional units, implying the concurrent execution of multiple instructions, one in each of the functional units;
Parallel execution pipelines.
Arrays of processors G06F 15/78, G06F 15/80, G06F 15/16.
Attention is drawn to the following places, which may be of interest for search:
Parallel decode units | |
Concurrent execution using a slave processor |
This group is only to be used for special architectural arrangements to enable the concurrent execution of instructions, not for the mere presence of parallel functional units.
Parallel functional units does not usually mean parallel processors. Multicore architectures may be found here only if they carry out concurrent execution of instructions from the same program.
In this place, the following terms or expressions are used with the meaning indicated:
Functional unit | Unit within the processor which carries out part of the execution of an instruction. |
This place covers:
Multiple parallel functional units controlled by a single instruction, e.g. SIMD.
For SIMD execution, this class contains details relevant to the execution aspects, e.g. executing a global instruction according to local conditions.
SIMD architectures: G06F 15/80.
In this place, the following terms or expressions are used with the meaning indicated:
SIMD | Acronym for "single instruction multiple data" being an architecture having a set of homogenous execution units which execute the same instruction in any given cycle, but which each have their own operand data, e.g. vector data. |
This place covers:
Special arrangements at runtime for performing multiple iterations of a loop in parallel using SIMD lanes.
Attention is drawn to the following places, which may be of interest for search:
Reducing the execution time required by program code via optimisations performed during compilation | |
Software pipelining using a compiler | |
Distributing iterations of parallelizable loops among processors using a compiler | |
Parallelism detection by a compiler |
This place covers:
Runtime determination of a vector length used for performing multiple iterations of a loop in parallel.
Using a vector length variable stored in a vector length register for performing multiple iterations of a loop in parallel.
This place covers:
An execution model where multiple independent threads execute a same instruction in parallel, typically on different data elements (SIMT), where conditional instructions may cause different threads to follow divergent execution paths through a program, which may result in individual threads being inactive at times, and each thread may have its own instruction address counter and register state.
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Processor architectures or configurations for image data processing |
Attention is drawn to the following places, which may be of interest for search:
Specific instructions to control multi-threading, e.g. FORK or JOIN instructions |
In this place, the following terms or expressions are used with the meaning indicated:
Warp | A warp is a set of parallel threads that execute the same instruction together. |
Thread Block | A thread block is a set of concurrent threads that can cooperate among themselves through barrier synchronization and shared access to a memory space private to the thread block. Once a thread block is assigned to a streaming multiprocessor, it is further partitioned into warps. |
Grid | A grid is a set of thread blocks that may each be executed independently and thus may execute in parallel. |
Streaming multiprocessor | A streaming multiprocessor executes warps and comprises multiple stream processors. |
In patent documents, the following abbreviations are often used:
SIMT | Single Instruction Multiple Thread |
CTA | Cooperative Thread Array |
GPGPU | General-Purpose Computing on Graphics Processing Units |
SM | Streaming Multiprocessor |
SP | Streaming Processor |
CUDA | Compute Unified Device Architecture |
OpenCL | Open Computing Language |
In patent documents, the following words/expressions are often used as synonyms:
- "CUDA", "OpenCL" and "GPGPU"
- "thread block", "work group" and "cooperative thread array"
- "thread" and "work item"
- "warp", "wavefront" and "thread group"
- "streaming multi-processor" and "compute unit"
This place covers:
Special arrangements, in a SIMT architecture, to handle different threads following divergent execution paths (e.g., control flow paths) through a program due to a conditional instruction.
Reconvergence of threads in a SIMT architecture.
This place covers:
Multiple parallel functional units controlled collectively by multiple instructions.
Includes special techniques of parallel functional unit control in a superscalar or VLIW architecture.
Hardware streams.
MIMD architectures: G06F 15/16.
This group is only to be used for special architectural arrangements to enable the concurrent execution of instructions, not for the mere presence of parallel functional units executing multiple instructions.
In this place, the following terms or expressions are used with the meaning indicated:
MIMD | Acronym for "multiple instruction multiple data" being an architecture having a set of homogenous execution units which execute different instructions in any given cycle, and which each have their own operand data. |
VLIW | Acronym for "very long instruction word" being an architecture having a compound instruction word formed by the compiler, containing multiple sub-instructions to be issued and completed together in one cycle, and having no interdependencies. |
Hardware stream | Hardware resources used for the context and execution of a stream or thread of instructions. |
This place covers:
Control of parallel execution by groups of functional units, such as multiple execution units sharing local memory, e.g. clusters;
Partitioned architectures, e.g. for hardware multistreaming.
In this place, the following terms or expressions are used with the meaning indicated:
Cluster | Group of execution units with shared register resources. |
Hardware stream | Hardware resources used for the context and execution of a stream or thread of instructions. |
This place covers:
Multiple functional units which are controlled in tandem or cascade to carry out an instruction.
Multiple functional units controlled by the same instruction but not in the same cycle, e.g. multiplier-accumulator.
Hierarchical adders: G06F 7/50.
In patent documents, the following abbreviations are often used:
MAC | Multiplier-accumulator unit |
FMA | Fused multiplier-accumulator unit |
This place covers:
Multiple functional units which are controlled in tandem or cascade to carry out an instruction which is a complex operation, possibly over multiple cycles.
This place covers:
Parallel functional units controlled in tandem to execute complex operations using adaptable datapath.
Reconfigurable computer architectures: G06F 15/7867.
This place covers:
Execution of a single program.
Attention is drawn to the following places, which may be of interest for search:
Program initiating or program switching in the context of multiprogramming |
In this place, the following terms or expressions are used with the meaning indicated:
High level language | refers to what is commonly known in the art, i.e. a language containing human readable constructs intended to be used by a human programmer and to be translated to binary code for execution.The fact that it is theoretically possible to read, understand and directly program binary code does not qualify this type of code as HLL. |
Low-level language | language that provides little or no abstraction from a computer's instruction set architecture |
In patent documents, the following abbreviations are often used:
HLL | High level language |
This place covers:
Starting up or shutting down a computer system and loading of the operating system.
This place does not cover:
Security arrangements for bootstrapping |
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
For set top boxes |
Attention is drawn to the following places, which may be of interest for search:
Low level details of resetting means | |
Compiler bootstrapping | |
Installation of computer software | |
Fault tolerant booting | |
Details of Power-On Self Test (POST) |
In this place, the following terms or expressions are used with the meaning indicated:
Bootstrap | a simple program that begins initialisation of the computer's operating system |
In patent documents, the following abbreviations are often used:
IPL | Initial program load |
This place covers:
Initialisation of the processor and the processor's direct environment immediately after the initial reset signal.
This group deals with local issues - there is no network involved.
Includes:
- Initial microcode loading;
- Selecting the very first instructions to be executed after a hardware reset;
- Processor address boot facilities;
- I/O channel initialisation;
- Making BIOS ROM invisible after booting;
- Means to shadow BIOS from ROM to (faster) RAM.
Attention is drawn to the following places, which may be of interest for search:
Loading microcode per se | |
Configuring of multiprocessors |
This place covers:
Initialisation of processors in a multiprocessor system immediately after the initial reset signal.
Attention is drawn to the following places, which may be of interest for search:
Configuring of multiprocessors |
This place covers:
Loading of the operating system and the preparatory steps for loading the OS.
Also includes the launching of application programs once the OS has been loaded, and OS formats on storage devices.
This place covers:
Searching and selecting a bootable boot device.
This place covers:
Computer systems having more than one bootable OS
- Choosing one of the available bootable OSs and booting from that OS (dual-boot or multi-boot);
- Providing mechanical means to switch between the OSs (see US2006107029);
- When a computer is switched on for the first time, the user is required to choose one of the OSs available on the computer. Once an OS is chosen, the other OSs are made unavailable. The next time the computer is started, it will boot only the selected OS (see EP0794484).
Attention is drawn to the following places, which may be of interest for search:
Emulating one OS using another | |
Two active OSs, where one OS (the guest OS) is running as an application in the other OS (the host OS) | |
Multiple OSs running simultaneously in the context of a VMM | |
When one of this plurality of OSs serves as a backup OS in case of failure, recovery OS |
This place covers:
Initialisation and configuration of peripheral devices, insofar as this configuration is related to the interaction with the operating system.
Also deals with the configuration of the operating system in order to be able to interact with peripheral devices.
A peripheral device in this class should be understood as a passive entity, i.e. whose functioning is controlled by the host computer to which it is attached. Systems involving a host computer with attached devices that have processing capabilities of their own should be treated as a multiprocessor or a networked distributed system.
This initialisation/configuration does not have to occur during booting (although it typically does) - it can also take place e.g. when a device is hot-inserted (plug and play).
This group deals with local issues - there is no network involved.
- Assigning IRQ lines, I/O addresses;
- Configuring registers on the peripheral;
- Device discovery: detecting which devices are present; building device trees;
- Adapting OS for device configuration;
- Device initialisation;
- Config.sys peripheral device facilities.
Loading or installation of device drivers. This does not necessarily have to occur at boot time.
Attention is drawn to the following places, which may be of interest for search:
Configuration of printer parameters | |
Updating of firmware in peripheral devices | |
Configuring software or OS when this configuration is not related to interacting with the peripheral device | |
Program control for peripheral devices - the inner workings of a device driver, i.e. how the driver performs its job of interfacing between OS & device, how the driver is structured, etc. | |
Electrical details of hot-plugging, plug and play | |
Peripherals with a processor and software running thereon together with the computer's processor can be considered a multiprocessor system. A distinction has to be made between the device driver - i.e. the software that runs on the host to interface with the peripheral - and the software running on the peripheral. | |
Reconfiguration of FPGAs, PLDs | |
HAVi networks | |
Configuration of network elements | |
Management of devices over a network |
A device driver is understood to be software used by a computer to control/operate a peripheral device. A peripheral is any kind of device that can be attached to/inserted into a computer in order to expand its functionality (modem, sound card, disk drives). A device driver- i.e. the piece of software that is loaded on a host computer and that enables the host computer to control the operation of an attached peripheral - differs from the peripheral's operating software - i.e. the piece of software that resides on the peripheral itself and executed by the peripheral's processor that allows the peripheral to operate as an independent unit.
In this place, the following terms or expressions are used with the meaning indicated:
Peripheral Internal | an expansion card that is plugged into one of the ISA/PCI slots |
Peripheral External | an external device connected through the serial/parallel port a PC card |
This place covers:
Arrangements for automating the process of device driver loading or configuration of a peripheral device or the operating environment of the computing element hosting the peripheral device in in response to dynamic changes in the peripheral constitution of the computing element (addition or removal of peripheral devices).
Plug-and-play in the context of this class occurs either during boot time or during run-time (live addition or removal).
This place covers:
The peripheral device itself contains all the information (or a reference to a place where the information is stored) required for its configuration and the configuration of the operating environment. In other words, it is the peripheral device and not the operating environment that is burdened with the task of providing configuration information or device drivers.
This place covers:
Booting of client computers, processors or devices that do not have the necessary boot code locally available but retrieve the boot code from a remote source, e.g. a boot server in a network environment.
Specific topics included:
- Booting of diskless computers ("net" computers);
- "Push" booting: a server computer boots a client computer by sending a boot program to the client computer;
- PXE (Preboot Execution Environment)
The Preboot Execution Environment (PXE) is an industry standard client/server interface that allows networked computers that are not yet loaded with an operating system to be configured and booted remotely by an administrator. The PXE process consists of the client notifying the server that it uses PXE. If the server uses PXE, it sends the client a list of boot servers that contain the operating systems available. The client finds the boot server it needs and receives the name of the file to download. The client then downloads the file using Trivial File Transfer Protocol and executes it, which loads the operating system.
- Booting a thin client in a "client device/data center" environment (see US2006/161765);
- Network booting;
- Booting diskless workstations;
- Booting thin clients.
Attention is drawn to the following places, which may be of interest for search:
Booting of multiprocessor systems, e.g. where one processor (the master) sends the boot or initialisation code to the other processors (slaves) | |
Wake-on-LAN (WoL) | |
BOOTP, DHCP protocol | |
Network protocols involving booting |
Remote booting in the context of a first-time and one-off installation of an OS is also classifed in the G06F 8/61.
In patent documents, the following abbreviations are often used:
RIPL | Remote Initial Program Load |
PXE | Preboot Execution Environment |
This place covers:
Suspend/Resume and Hibernate/Wake Up refer to techniques to put a system in a low power, non-operating mode, thereby preserving the system state that existed at the time of going into Suspend or Hibernate. The next time the computer is started, operation continues at the point where it left off, rather than starting from scratch.
- Speeding up the boot process by restoring persisted data from previous executions rather than going to the whole boot process.
- Hibernating a system to persistent storage on a first computer, transporting the storage to a second computer and resuming the execution there. Please note that this is not process migration.
- Multiple removable storage devices, each having a different hibernated system image stored thereon; resuming the different system images on one computer by switching the storage devices.
- Quickly bringing a computer into an operational state by copying a memory image from persistent storage to RAM, thereby bypassing the lengthy conventional boot process.
Attention is drawn to the following places, which may be of interest for search:
Low-level, electrical details of suspend and resume | |
Power Management | |
Normal Shutdown (without saving state information - the next boot starts from scratch) | |
Suspending a running process and resuming its execution later in the context of process scheduling | |
Booting a computer system when an error/ fault is involved. Includes Dealing with errors that occur during the boot process itself (e.g. when encountering a corrupt BIOS); * Rebooting the system after a previous irregular shutdown (e.g. due to a power failure), thereby restoring as much as possible the system state that existed before the irregular shutdown occurred. In absence of an emergency power supply, a power failure will cause the computer system to be simply powered down, inevitably resulting in the loss of system state. The next time the computer is booted, the system state will be restored as much as possible. | |
Graceful shutdown: When a power failure is detected, an emergency power supply (e.g. UPS) is activated giving the system enough time to do a proper shutdown (when shutting down a computer system, no state information is saved). Graceful hibernation:When a power failure is detected, an emergency power supply (e.g. UPS) is activated giving the system enough time to do a proper hibernation (thereby saving the system state) before eventually powering down. Dealing with power failures that occur when the system is in suspend mode, i.e. when the RAM is still powered; In battery-powered systems, suspending or hibernating the system when the battery level drops below a predetermined level | |
Wake-on-LAN |
The techniques of Suspension and Hibernation differ from each other in the degree of persistency of saving the system state.
With Hibernation, the system state is stored on a non-volatile memory device, e.g. HDD, while in the case of Suspension, the system state is stored in volatile memory (e.g. RAM).
In the G06F 9/4418 we only deal with situations where the reason or the system to suspend or hibernate is controlled/intentional e.g. after user presses power off button, after a preset period of inactivity for power saving purposes. When the reason to suspend or hibernate is the occurrence of a power failure, low battery voltage or another anomaly (e.g. system hang), then the document should be classified in G06F 11/1441 (see Related Fields). The subsequent restart of the system is classified in G06F 11/1417.
In this place, the following terms or expressions are used with the meaning indicated:
Hibernation | also known as Suspend-to-Disk (S2D) and is defined as sleeping mode S4 in the ACPI specification. |
Suspension | also known as Suspend-to-RAM (STR) and is defined as sleeping mode S3 in the ACPI specification. |
This place covers:
Shutting down the computer, the opposite operation of bootstrapping (G06F 9/442).
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Suspend and resume | |
Graceful shutdown in case of power failure, e.g. using an uninterruptible power supply (UPS) |
This place covers:
Preparing a program for execution including the actual launching of the program.
This place does not cover:
Bootstrapping | |
Security arrangements for program loading or initiating |
Attention is drawn to the following places, which may be of interest for search:
Updating of computer software | |
Loading of microcode | |
Process Migration | |
Protocols for network applications involving the movement of software and/or configuration parameters, e.g. applets |
This place covers:
Run-time configuration of software and computer applications, for example:
Configuring the Windows registry;
User profiles: roaming (i.e. restoring the user's settings at a different computer), multiple users (i.e. each user has a different profile).
Attention is drawn to the following places, which may be of interest for search:
Configuration management in the context of software development | |
Configuration of peripheral devices | |
Configuration of FPGA, PLA | |
Gaming configure | |
Personalization of smart cards | |
Configuration of parameters specifically aimed at networking/communication | |
Protocols for network applications involving terminal/user profiles | |
Differentially changing configuration parameters |
Configuration wizards that assist a user in configuring a software application, are also classified in G06F 9/453 (Help systems).
This place covers:
Roaming user profiles; migrating configuration settings between computers.
Attention is drawn to the following places, which may be of interest for search:
Network-specific arrangements/protocols involving user profiles |
This place covers:
Ways to load program code whereby, rather than first loading the entire program code before starting execution, the program code is loaded only when needed.
Also includes:
- Saving memory space and preventing unnecessary processing by only loading the program parts that are actually used; Parts that are never executed are never loaded;
- Starting execution once certain parts are loaded: no need to wait for the whole program to be loaded;
- Executing instructions as they are loaded: the idea of streaming;
- Java constant pool resolution
- Dynamic linking/loading is also known as: incremental, partial, run-time, lazy; on-demand linking/loading.
In patent documents, the following abbreviations are often used:
DLLs | Dynamic Link Library |
This place covers:
Dynamically loading special software components to exisitng applications in order to extend their functionality, e.g. Adobe Flash-Player.
This place covers:
Determining the right version of a software component to be loaded.
This place covers:
Program loading explicitly taking into account hardware characteristics of the target.
Attention is drawn to the following places, which may be of interest for search:
Retargetable program installation/update |
This place covers:
Computer programs containing code native to multiple instruction sets (processor architectures).
This place covers:
Mechanisms to allow e.g. different versions of conflicting libraries to be used simultaneously; for example the Windows "DLL Hell".
This place covers:
How software components should be placed in a RAM, e.g. occupying neigbouring sections.
This place covers:
- Sharing program code/data between different applications in order to reduce the memory footprint;
- Solutions to problems that arise when program code/data is shared (e.g. sharing of global variables and Java static fields), often resulting in the duplication of program code/data.
This place covers:
Running programs without having to install or load them beforehand. Execute-in-place refers to running without loading (i.e. without copying to RAM), while portable applications more refer to running without installing.
This place covers:
Skipping or reducing the step of loading and initialization of program code.
Techniques used:
- XIP: eXecute-In-Place: execute programs from where they are persistenly stored. There is no program loading.
- Pre-initialise modules: program code may be loaded, but it is already partially or totally initialised
- Romization of program code
XIP (Execute In Place) refers to the execution program code directly from the memory where it is stored, without first loading the program code to volatile executable memory (RAM).
Where the G06F 9/445 relates to the preparatory process of making program code ready for execution - loading, i.e. transferring the code to executable memory; linking, i.e. resolving references; initializing data structures - XIP relates to methods where the program code can be directly executed without having to go through this preparatory process.
One definition of XIP, taken from US2002/069342: "A XIP architecture is defined by a system's ability to execute one or more bytes of code while still resident within non-volatile memory (e.g., read-only memory (ROM)), without first transferring the code to volatile memory (e.g., random access memory (RAM)."
Another definition of XIP, taken from US2004/193864: "A called execute-in-place (XIP) technology refers to a specific function provided with a storage device, which data or command codes stored in the storage device can be directly accessed by a central processing unit (CPU) in a computer system, without pass through a random access memory (RAM), thus reducing power consumption and data loss, and increasing executing speed."
For program code to be directly executable from the memory where it is stored, it is required that the memory is suitable to directly execute code (read US2002/138702, [0004]-[0008]), and that the code is in such a form that it can be directly executed.
Examples of XIP:
- In normal computer systems, directly executing program code from an externally connected memory device;
- In embedded systems, executing the software directly from the non-volatile memory where it is stored.
Also included:
- Romization, romizer: processes and tools to generate a directly-executable program image.
- Semi-directly-executable code: the code is partially prepared for execution, the rest takes place at load time.
The U3 technology does not fall under the XIP technology, because the program code is not executed directly from the USB stick.
This place covers:
Specific techniques to make code immediately runnable, e.g. making address adjustments (relocation) to enable immediate execution, or prebinding (Mac OS). General aspects of pre-runtime link editing are however classified in G06F 8/54.
This place covers:
Executing applications without installing them before, for example according to the U3 standard, or portable application packages ("Portable App") started directly from a USB stick.
This place covers:
Verification of program code, for example:
Java bytecode verification.
Proof carrying code.
inter instruction consistency checks.
This place does not cover:
High-level semantic checks | |
Testing and debugging software |
- In G06F 11/36 group, the question is: does the program do what it is expected to do? In other words, for a given input, does the program produce the expected output? The program is considered as a black box, only the external behaviour is studied. The tests that are performed do not take into account the implementation or the language that is used to write the program. We are here on the level of users/developers/specifications.
- In G06F 9/44589, a test is performed to see whether the (compiled) program code does not do anything that is not allowed by the rules of the target machine. In other words, the question is: does the program comply with code specific requirements?
The two groups are on a different level. It is possible for a program to respect all code specific requirements and thus to pass G06F 9/44589 tests, but not to produce the expected output and thus not to pass the G06F 11/36 test
- In the G06F 8/43 (Compile-time checking), source code is checked. In most cases, this is done by the compiler but it can also be performed by a separate program. In contrast, the G06F 9/44589 tests already compiled code. In the G06F 8/43, the verification is performed based on source code specific aspects, whereas in the G06F 9/44589 this is done on the basis of target machine related aspects
This place covers:
- Unloading program components from memory or terminating applications, e.g. when they are not needed anymore.
- Java class unloading: removing Java classes from memory when they are not used anymore, e.g. because the class has become "unreachable".
Class unloading is not the same as Garbage Collection: in class unloading, what is removed is program code in executable memory (classes), whereas in Garbage Collection it is data (objects, i.e. class instances) that are removed.
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Uninstallation | |
Garbage collection |
This place covers:
Implementations of specific programming paradigms to execute computer programs, the programming paradigms being e.g. object-orientated, procedural, data driven or finite state machine
In this place, the following terms or expressions are used with the meaning indicated:
OO | Object-oriented |
This place covers:
Relates to procedural execution, i.e. imperative programming where the program is built from one or more procedures (subroutines).
This place covers:
Invocation and execution of subroutines, for example:
- Implementation of a call stack: creating and deleting activation records, reserving space on the stack to store local variables and to pass the arguments
- Argument passing
- Locating variables at higher level in the invocation chain
- Co-routines
- Re-entrant functions
- Function or method overloading: considering the type of all actual arguments/return type of a function to select a proper function instance to execute Calling functions in another programming language
Also covered are other combinations of several instructions, for example combinations of instructions to perform (counted) loops.
Attention is drawn to the following places, which may be of interest for search:
Hardware implementation of instructions that change the program flow to another address (jumps, branches, goto) | |
Remote procedure calls (RPC) | |
Stack caching |
In patent documents, the following words/expressions are often used as synonyms:
- Subprograms,subroutines, functions, procedures, object oriented methods
This place covers:
Finding the entry address of a subroutine and how to preserve the return address
Attention is drawn to the following places, which may be of interest for search:
Static linking, i.e. before load-time | |
Hardware implementation of instructions specifically designed to keep the return address (e.g. branch-and-link, jsr) | |
Branch prediction in a pipelined system | |
Dynamic linking, i.e. at or after load-time |
This place covers:
Execution aspects of object-oriented programs
In this place, the following terms or expressions are used with the meaning indicated:
OO | Object-oriented |
This place covers:
- Object-oriented method resolution, i.e. given a method invocation on a reference (pointer) to an object, how to locate the correct code that implements this method. Typically this is done using virtual function tables.
- Only deals with the resolution of an object-oriented method.
Attention is drawn to the following places, which may be of interest for search:
Remote method invocation (RMI) |
This place covers:
- Speeding up the run-time object-oriented method resolution by predicting the type of the referenced object
In patent documents, the following abbreviations are often used:
PIC | Polymorphic inline cache |
This place covers:
Object oriented class hierarchies including run-time addition of classes to a hierarchy virtual inheritance and/or polymorphism.
Attention is drawn to the following places, which may be of interest for search:
Object-oriented method resolution |
Documents in G06F 9/449 deal with Object-oriented method invocation and will inevitably talk about class hierarchies, which is the subject of G06F 9/4492. However, this alone does not justify classification in G06F 9/4492: only when the document discloses specific details about class hierarchies, the symbol G06F 9/4492 is justified.
In this place, the following terms or expressions are used with the meaning indicated:
Method overriding | subclass provides a specific implementation of a method that is already provided by one of its superclasses |
Polymorphism | creating a variable, a method or an object that has more than one form |
This place covers:
- Making objects persistent and restoring objects from persisted form.
Includes:
- Pointer swizzling
- Flattening objects
Attention is drawn to the following places, which may be of interest for search:
Serialization in the context of RPC, RMI | |
OO databases |
This place covers:
- Software aspects of data driven systems, i.e. systems where the action is dictated by the presence or availability of data at the inputs of the logical circuits, rather than by sequential instruction execution under supervision of a central clock
Attention is drawn to the following places, which may be of interest for search:
Specification techniques, e.g. Petri nets | |
Data flow analysis during compilation | |
Architectures for data or demand driven systems |
This place covers:
Unification is one of the main ideas behind logic programming, best known through the language Prolog. It represents the mechanism of binding the contents of variables and can be viewed as a kind of one-time assignment.
This place covers:
Program execution implemented by a Finite State Machine. There must be enough technical details about the FSM implementation to allocate the subgroup.
This place covers:
- The inner working of user interfaces, in particular graphical user interfaces (GUIs), including:
- Interaction of the GUI with applications and OSs
- The structure and interaction of software components of GUIs
- Implementation of GUI concepts typically used in operating systems, e.g. desktop metaphors, widgets or windowing mechanisms
- Implementation of GUI automation mechanisms, e.g. record/replay of user interactions on the GUI
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
User interfaces for testing or debugging software | |
User interface for databases, visualization of query results | |
User interfaces to web services | |
User interfaces for the field of automation |
Attention is drawn to the following places, which may be of interest for search:
Methods for a user to interact with the GUI, e.g. scrolling, drag and drop, menus | |
Digital output to a display device | |
Development and generation of source code for user interfaces | |
User interfaces for portable communication terminals, e.g. mobile phones |
In this place, the following terms or expressions are used with the meaning indicated:
User interface | is the space where interaction between humans and machine occurs |
In patent documents, the following abbreviations are often used:
HCI | Human-computer interaction |
MMI | Man-machine interaction |
CHI | Computer-human interaction |
GUI | Graphical user interface |
This place covers:
Methods to execute and interact with an application, whereby the application's program code runs on the server, and the GUI runs on the client (terminal). The user interacts with the remotely running application through the local GUI. GUI events/commands run back and forth between client and server. All processing is done at the server.
This place does not cover:
Protocols for virtual reality |
Attention is drawn to the following places, which may be of interest for search:
Communication between two running processes | |
Terminal emulation |
This place covers:
- Customizing the help according to the user's previous actions
- Getting help by pressing f1
- Wizards, application assistants, visual cues
- Online tutorials
This place covers:
- User interfaces in multiple human languages, adapting user interfaces to suit a foreign culture
- Game localisation
Attention is drawn to the following places, which may be of interest for search:
Pseudo-localisation | |
Processing or translation of natural language |
In this place, the following terms or expressions are used with the meaning indicated:
Language localisation | internationalisation (i18n), globalisation |
This place covers:
The emulation of entities, e.g. operating systems, processors, classified under G06F 9/00.
Attention is drawn to the following places, which may be of interest for search:
In-circuit emulation | |
Dynamic binary instrumentation may use techniques similar to emulators and binary optimizers | |
Virtual memory | |
Terminal emulation | |
Computer simulation, in which a model of a system under investigation is beng simulated |
In this place, the following terms or expressions are used with the meaning indicated:
Emulation | In computing, emulation refers to the duplication and imitation of the functions of one computer system/program by another computer system/program, different from the first one, so that the emulated behaviour fully or closely resembles the behaviour of the original system/program. |
This place covers:
Software implementation of a machine (computer) that executes programs like a physical machine:
- Java Virtual Machine (JVM);
- Microsoft .NET common language runtime (CLR);
- Smalltalk virtual machines.
This place does not cover:
Compile time binary to binary translation | |
Run-time interpretation of high level language programs | G06F9/4551 |
Run-time binary to binary translation |
This place covers:
Interpretation of high-level language code, e.g. BASIC.
Attention is drawn to the following places, which may be of interest for search:
Handling natural language data |
This place covers:
Giving commands to a computer (OS) by means of a (graphical) user interface.
These commands can be given via the command line or by performing actions on GUI objects.The commands are typically interpreted by a command interpreter.
- Scripts, recording and executing GUI command scripts.
This place covers:
The execution of binary code/bytecode that is not native to the current run-time execution environment by translating the non-native binary code/bytecode into native code just before execution and subsequently executing the native code .
Subsequently, execution can be optimised as follows:
- By performing a retranslation of the non-native binary code/bytecode yielding more optimal native binary code e.g. by taking into account run-time information;
- By directly transforming the native binary code yielding more optimal native binary code .
The G06F 9/45516 also deals with the initial and subsequent run-time transformation of native binary code into more optimal native binary code.
For the purpose of completeness, the G06F 9/45516 also deals with the translation of intermediate bytecode to a different intermediate bytecode (e.g. Java bytecode to UCSD P-code). This however, is a more theoretic possibility and will not occur frequently.
The majority of the documents in this class deal with the translation of intermediate bytecode to native binary code and more specifically with the dynamic compilation of Java bytecodes into native code (JIT compilation).
- The G06F 9/45516 is the dynamic counterpart of the G06F 8/52
Both classes have the same goal (i.e. translation from one binary format into another) but the point in time when this translation is performed is different: at run-time, just before or during execution (G06F 9/45516) and statically, pre-run-time (G06F 8/52).
- Because the translation in the G06F 9/45516 takes place just before execution, there is less time available
- Difference between G06F 9/45516 and G06F 9/3017
Both G06F 9/45516 and G06F 9/3017 deal with run-time translation of binary code. However, in the G06F8/455B4 the translation relates to a program as a whole and is realised by a software translator, whereas in the G06F 9/3017 the translation relates to individual instructions that are about to be executed and is performed by the processor's internal hardware and.
In G06F 9/45516, the processor is fed with the translated, native instructions; it doesn't know anything about the translation that took place. However, in G06F 9/3017 the processor is fed with the non-native instructions; translation into native code takes place on-the-fly (i.e. at the moment the instruction is actually executed by the internal hardware of the processor).
- Difference between G06F 9/45516 and G06F 9/45508
- The G06F 9/45508 is also related to the execution of binary, non-native code. However, the non-native code is emulated rather than translated: an emulator acts as an virtual machine and interprets the non-native code.
This place does not cover:
Run-time instruction translation | |
Profiling per se |
This place covers:
Translation of code at runtime prior to executing it natively, e.g. bytecode into native machine code. Dynamic compilation.
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Translation of one binary program to another before the program is ever executed. Static binary translation. |
This place covers:
Optimisations carried out at runtime without changing the instruction set architecture.
This place covers:
Conversions or optimisations, e.g. done by JavaScript engines or similar plugin technologies built into another execution environment.
Attention is drawn to the following places, which may be of interest for search:
Dynamic loading of plugins/add-ons |
This place covers:
- Simultaneously executing multiple operating systems using a Virtual Machine Monitor (VMM). The following passage, taken from US2004230794, provides a good definiton of a VMM: 'A VMM enables plural operating systems to run on a single machine by "virtualizing" the entire machine. Conventionally, an operating system controls the use of the physical hardware resources of a machine (e.g., the memory, the processor, etc.), and thus the actual hardware of the machine is exposed to the operating system. When a VMM is used, however, the machine's hardware (e.g., devices) are only exposed to the VMM. The VMM, then, exposes "virtual" machine components to the operating systems'.In G06F 9/45545, plural operating systems execute simultaneously as guest and host (without a VMM)..
- Process switching for virtual machines;
- Handling of non-implemented instructions;
- Address trapping for emulating other memory architectures;
- Host/guest and mode switching instructions;
- Switching between endian modes (endian conversion on a bus G06F 13/40).
This place does not cover:
Loading of microprogram | |
Mode switching during interrupts per se |
This place covers:
Emulation of one OS by another OS
- Simultaneously executing first and second operating systems by executing the second OS as a guest OS on top of the first OS (the host OS). No virtual machine monitor (VMM) is needed. The use of guest and host OSs is described in the following passage, taken from US2004230794: ' Certain techniques allow operating systems to exist side-by-side on the same machine without the use of a virtual machine monitor. One such technique is to have one operating system act as a "host" for the other operating system. (The operating system that the "host" is hosting is sometimes called a "guest.") In this case, the host operating system provides the guest with resources such as memory and processor time '
- Interrupt handling of other OS
- Non I/O services of other OS, e.g. facilities for emulation of virtual memory
- Memory mapping and address trapping for emulating I/O
Associated address trapping is in G06F 9/45533.
This place does not cover:
I/O emulation |
This place covers:
A bare-metal hypervisor runs directly on the host's hardware to control the hardware and to manage guest operating systems, e.g. Citrix XenServer, VMware ESX, Microsoft Hyper-V..
This place covers:
Hypervisor runs within a conventional operating system environment.
This place covers:
Para-virtualisation is a virtualization technique that presents a software interface to virtual machines that is similar but not identical to that of the underlying hardware.
This place covers:
Mechanisms to adapt the instruction set of a guest system to the instruction set offered by the underlying hypervisor and/or native processor.
This place covers:
- Management and integration aspects of hypervisors.
- Functions needed to manage virtual machines or to integrate them into the execution environment that are specific to a hypervised system, e.g. handling of virtual machine instances, creating, cloning, deleting instances, starting and stopping virtual machines, distributing and migrating instances, managing I/O and storage access, isolating virtual machines for security reasons, managing memory of instances.
The following CPC breakdown codes are used for refined classification. Please also consider classification in the main trunk symbols referenced by the breakdown codes.
This place covers:
Handling single instantations of virtual machines, e.g. creation from template or copy of another instance.
This place covers:
Virtual machines running within other virtual machines.
This place covers:
Managing the placement of virtual machine instances.
This place covers:
Specifics about start/stop in the context of virtual machines.
Attention is drawn to the following places, which may be of interest for search:
Program initiating | |
Task life-cycle in general |
This place covers:
Specifics about input/output within virtual machines, e.g. accessing storage, or external devices, using specific drivers.
Attention is drawn to the following places, which may be of interest for search:
Loading of device drivers | |
Internal functioning of device drivers |
This place covers:
Specifics about memory management within virtual machines, e.g. accessing and allocating memory.
Attention is drawn to the following places, which may be of interest for search:
Allocation of memory to service a request | |
Memory management in general |
This place covers:
Mechanisms to isolate virtual machine instances from other instances; protection of virtual machines.
Attention is drawn to the following places, which may be of interest for search:
Security arrangements in general |
This place covers:
Specifics to enable monitoring or debugging within virtual machines.
Attention is drawn to the following places, which may be of interest for search:
Monitoring and debugging in general |
This place covers:
Specifics to enable network access of virtual machines.
Attention is drawn to the following places, which may be of interest for search:
Network virtualisation | |
Network-specific arrangements for supporting networked applications |
This place covers:
aspects of multiprogramming, i.e. where more than one process / task is present and this presence is essential for identifying the problem and / or the solution; a process / task is defined here as a program in execution.
Attention is drawn to the following places, which may be of interest for search:
Object-oriented software design | |
Multi-threading at the hardware level | |
Saving and restoring the state of a system, i.e. hibernation | |
Batch processing | |
Suspend and resume task / process / thread execution without details on context saving and restoring | |
Saving and restoring the state of a mobile agent together with additional details on the mobile agent itself | |
Saving and restoring program state during debugging | |
Access rights for memory resources, e.g. access to memory according to privilege rings | |
Access rights associated to human beings or documents where the final aim is to enforce protection at the user level without giving technically relevant details on the multiprogramming implementation | |
Documents just mentioning a multiprocessing / distributed object-oriented systems and which focus on a specific use / application (e.g. e-commerce, monitoring, information retrieval, security) | |
Documents mentioning a transaction but dealing, in fact, with nothing more than techniques involving a request for a service, without any detail on the ACID (Atomicity, Consistency, Isolation, Durability) properties; e.g. e-commerce transactions | |
Cryptographic protocols | |
Network security protocols | |
Protocols for real-time services in data packet switching networks | |
Network protocols for data switching network services | |
Aspects already covered by G06F 9/48, G06F 9/50, G06F 9/52, G06F 9/54 | See special rules of classification of the corresponding classes |
Rule 1
When a document qualifies for one of the groups in the table of rule 2 below, the group G06F 9/46 should not be assigned.
Rule 2
The following table specifies the group to be assigned:
Technical details on | Group to be assigned |
Saving or restoring of program or task context | |
Saving or restoring of program or task context with multiple register sets. This group takes precedence over G06F 9/461 | |
Program control block organisation. This group takes precedence over G06F 9/461 | |
Structure and arrangements for distributed object oriented systems, e.g. CORBA, Jini, DCOM | |
Transaction processing, namely transactions involving the ACID (Atomicity, Consistency, Isolation, Durability) properties | |
Transactional memory, i.e. transparent support for the definition of regions of code that are considered a transaction, the support being provided either in hardware, software or with hybrid-solutions. This group takes precedence over G06F 9/466. For speculative lock acquisition, G06F 9/528 takes precedence | |
Specific access rights for resources, e.g. using capability register |
Rule 3
The following text specifies the groups which could be assigned in addition to the groups of rule 2 above, to cover further technical details; the group(s) identified as context information should also be checked and assigned, if relevant:
Further technical details on:
The structure of bridges between different distributed object-oriented systems
- Context information: G06F 9/465
The lookup of interfaces and/or the structure of lookup servers / repositories
- Context information: G06F 9/465
The handling of references to remote objects / namespace implementation details within the context of distributed object-oriented systems
- Context information: G06F 9/465
This place covers:
transfer, initiation or dispatching of tasks, i.e. programs in execution, either locally or within a distributed system
Attention is drawn to the following places, which may be of interest for search:
Specific details on power distribution and power saving | |
Scheduling of printer jobs | |
Instruction streams within a processor (e.g. hardware threads) and instruction level details | |
Suspension and resumption at system level (i.e. involving the bootstrapping) | |
Mere loading of code linked to the initiation | |
Details on the task context structure as well as on its saving and restoring | |
Scheduling in terms of space | See special rules of classification for G06F 9/50 |
Process migration in the context of load (re-)balancing, without any technically relevant detail on the migration itself | |
Mere starting of a backup application at a certain date/time | |
Low level (bus-related) details of interrupt handling and interrupt controllers | |
Mere starting of an antivirus application at a certain date/time | |
Scheduling of human resources |
Rule 1
When a document qualifies for one of the groups in the table of rule 2 below, the group G06F 9/48 should not be assigned.
Rule 2
The following table specifies the group to be assigned:
Technical details on | group to be assigned |
Initiation of a task by means of an interrupt, i.e. the aspects of handling/servicing an interrupt | |
InterruptI interrupt priority mechanisms. This group takes precedence over G06F 9/4812 | |
InitiationI of a task by means of an timer related interrupt. This group takes precedence over G06F 9/4812 | |
InitiationI of a task by means of an interrupt with variable priority. This group takes precedence over G06F 9/4812 | |
Initiation of a task by means of an interrupt with variable priority, said priority being time dependent. This group takes precedence over G06F 9/4812 and G06F 9/4831 | |
Initiation, transfer and dispatch of a task, i.e. a program in execution, by another program; creation, e.g. fork() system call, and initiation, e.g. exec() system call, of a task / process / thread, virtual machine in the same or different machine | |
Task life-cycle, e.g. stopping, restarting, resuming execution. This group takes precedence over G06F 9/4843. For scheduling algorithms and internal operation of a scheduler, G06F 9/4881 takes precedence | |
Resuming the execution of a task on a different machine, i.e. migration. This group takes precedence over G06F 9/4843. This group takes precedence over G06F 9/485. For migration for load balancing purposes, G06F 9/5088 takes precedence | |
Mobile agents, i.e. tasks specifically designed to migrate. This group takes precedence over G06F 9/4843. This group takes precedence over G06F 9/485. This group takes precedence over G06F 9/4856. For cloning and replication of mobile agents, only G06F 9/4868 should be assigned. For migration policy, e.g. auction, contract negotiation, of mobile agents, only G06F 9/4875 should be assigned. | |
Scheduling strategies for dispatcher, e.g. round robin, multilevel priority queues; internal operation of a scheduler | |
Algorithms for real-time scheduling of processes, i.e. scheduling taking into account the deadlines of the applications being executed. This group takes precedence over G06F 9/4843. This group takes precedence over G06F 9/4881. | |
Power and heat aware scheduling of tasks. This group takes precedence over G06F 9/4843. This group takes precedence over G06F 9/4881 |
Rule 3
The following text specifies the groups which could be assigned in addition to the groups of rule 2 above, to cover further technical details; the group(s) identified as context information should also be checked and assigned, if relevant:
Further technical details on:
Exception handling
- Context information: G06F 9/4812
Application starting, stopping, resuming
- Context information: G06F 9/485
Scheduling of tasks on multiprocessor systems
Scheduling of a set of tasks by taking into account precedence and dependency constraints, or time and/or occurrence of events
Scheduling of a set of tasks by taking into account constraints on resources, resource based scheduling of tasks
Internals of a task scheduler
In patent documents, the following words/expressions are often used as synonyms:
[scheduling in terms of time] | [with the acceptation of task scheduling, i.e. when to assign a task to a computing unit] |
[scheduling in terms of space] | [with the acceptation of resource scheduling, i.e. which resource(s) to allocate and how to partition them] |
It is the first interpretation, the one which can be found in the context of the G06F 9/48
This place covers:
selection, allocation and de-allocation of hardware and/or software resources, like servers, processes, threads, CPUs, memory; combination and/or partitioning of resources, e.g. cloud computing, hypervisors and logical partitions; mapping of tasks onto parallel / distributed machines; load balancing and re-balancing of resources in distributed systems.
This place does not cover:
Specific details on power distribution and power saving | |
Allocation of disk resources and storage resources in general not being RAM | |
Scheduling of printer jobs | |
Specific details on emulation and internal functioning of a virtual machine | |
Mapping of tasks onto multi-processor systems carried out at compile-time | G06F9/45M1 |
Pure scheduling aspects, i.e. scheduling in terms of time, without considering resource allocation | |
Garbage collection techniques | |
Allocation of human resources | |
Cryptographic protocols | |
Network security protocols | |
Protocols for real-time services in data packet switching networks | |
Network protocols for data switching network services | |
Allocation of resources within a printer / multifunctional peripheral |
Rule 1
When a document qualifies for one of the classes in the table of rule 2 below, the class G06F 9/50 should not be assigned.
Rule 2
The following table specifies the class to be assigned:
Technical details on: | Class to be assigned: |
Allocation of resources to service a request | |
Allocation of resources to service a request, the resources being hardware resources other than CPUs, Servers and Terminals This class takes precedence over G06F 9/5005 | |
Allocation of memory resources to service a request This class takes precedence over G06F 9/5005 This class takes precedence over G06F 9/5011 for documents detailing both the allocation and release of memory resources, the class G06F 9/5022 should also be assigned | |
Release of resourcesThis class takes precedence over G06F 9/5005 This class takes precedence over G06F 9/5011 For documents detailing both the allocation and release of memory resources, the class G06F 9/5016 should also be assigned | |
Allocation of processing resources, e.g. CPUs, Servers, Terminals, processes, threads, virtual machines | |
A llocation of processing resources by considering data affinity This class takes precedence over G06F 9/5005 This class takes precedence over G06F 9/5027 | |
A llocation of processing resources by considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration. Candidates for this group are documents dealing with requests for composite (web) services, where the various components should execute in a certain order and resources for said execution should be assigned accordingly. Also included are documents dealing with "workflow" like systems, where a request to "execute" a project definition, comprising a set of interrelated actions, is sent to a server This class takes precedence over G06F 9/5005 This class takes precedence over G06F 9/5027 | |
A llocation of processing resources by considering hardware capabilities This class takes precedence over G06F 9/5005 this class takes precedence over G06F 9/5027 | |
Allocation of processing resources by considering the load This class takes precedence over G06F 9/5005 This class takes precedence over G06F 9/5027 | |
Allocation of processing resources by considering software capabilities, namely software resources associated or available to the machine, e.g. Web services offered by a specific machine This class takes precedence over G06F 9/5005 This class takes precedence over G06F 9/5027 | |
Partitioning or combining of resources This class should contain also documents dealing with cluster membership, i.e. assignment of a server to a certain group based on some criteria (see exemplary documents WO0156785, EP0805393). | |
Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs This class takes precedence over G06F 9/5061 | |
Grid computing, cloud computing With the expression grid / cloud computing it is meant an environment where multiple services are offered by the various members of the grid (often making use of idle periods), said members being usually located over a large scale network. Candidate documents should have at least one of the following concepts: i) set up of a grid, e.g. registering a new member, re-organizing the grid; ii) usage of a service in the grid, e.g. locating the member, servicing a request. This class takes precedence over G06F 9/5061 | |
Logical partitioning of resources; management and configuration of virtualized resources This group deals with the creation and management (e.g. allocation) of logical partitions and resulting virtual machines in multiprocessor systems; it also deals with the concept of virtualization in general, namely the mere management (e.g. creation, deletion) of an abstract, logical representation of a resource and its configuration (e.g. re-definition of its behaviour). This class takes precedence over G06F 9/5061 For documents detailing the migration of a virtual machine to a different node, the class G06F 9/4856 should also be assigned | |
Techniques for balancing or rebalancing the load in a distributed system by taking into account the load of the whole system | |
Techniques for balancing or rebalancing the load in a distributed system by migrating tasks / jobs / virtual machines This class takes precedence over G06F 9/5083 For documents detailing the migration of a task/job/virtual machine to a different node, the class G06F 9/4856 should also be assigned | |
Allocation of resources based on power and heat considerations |
Rule 3
The following table specifies the classes which could be assigned in addition to the classes of rule 2 above, to cover further technical details; the class(es) identified as Context information should also be checked and assigned, if relevant:
Further details on:
Allocation based on performance criteria
- Class to be assigned: S06F209/5001
Allocation based on proximity
- Class to be asigned: S06F209/5002
Indication of availability of resources
- Class to be assigned: S06F209/5003
- Context information: All groups belonging to G06F 9/50
Enforcing and/or taking into account lower and/or upper ceilings on resource usage in the context of resource allocation
- Class to be assigned: S06F209/5004
- Context information: All groups belonging to G06F 9/50
Cluster membership
- Class to be assigned: S06F209/5005
- Context information: G06F 9/5061
Dependency or time-specific aspects which are taken into account during the allocation
- Class to be assigned: S06F209/5006
- Context information: G06F 9/5038
Allocation of low-level processor resources, e.g. logical units, registers, cache lines, decoding stages
- Class to be assigned: S06F209/5007
Monitoring techniques used in conjunction with the CPU / thread allocation
- Class to be assigned: S06F209/5008
- Context information: All groups belonging to G06F 9/50
Offloading computations (e.g. because lacking some of the necessary capabilities)
- Class to be assigned: S06F209/5009
Allocation based on priority
- Class to be assigned: G06F 2209/5011
Creation, use, management of pool of resources
- Class to be assigned: S06F209/5010
- Context information: All groups belonging to G06F 9/50
Controlling aspects of an already submitted request, e.g. polling for a status, deleting / modifying the request
- Class to be assigned: G06F 2209/5013
Reservation of resources so as to have them ready at the time of the actual allocation
- Class to be assigned: G06F 2209/5014
- Context information: All groups belonging to G06F 9/50
Selection, by a broker, based on the submitted request, of an appropriate server via a registry or a yellow pages server
- Class to be assigned: G06F 2209/5015
Session management
- Class to be assigned: G06F 2209/5016
Task decomposition
- Class to be assigned: G06F 2209/5017
Selection of a thread / process within a multithreaded / multiprocessing machine, said selection being aimed to service a request
- Class to be assigned: G06F 2209/5018
Workload prediction within the context of CPU / process allocation and load rebalancing
- Class to be assigned: G06F 2209/5019
- Context information: G06F 9/5083, G06F 9/5088
Workload threshold within the context of CPU / process allocation and load rebalancing
- Class to be assigned: G06F 2209/5019
- Context information: G06F 9/5083, G06F 9/5088
remote execution techniques whereby program code is executed remotely from the client that initiated the execution and the client provides the code to the remote machine
- Class to be assigned: S06F209/5409
- Context information: All groups belonging to G06F 9/50
The expression "scheduling", in the patent- and non patent-documentation, can have two distinct meanings when referring to task and resources:
1) scheduling in terms of time, with the acceptation of task scheduling, i.e. when to assign a task to a computing unit,
2) scheduling in terms of space, with the acceptation of resource scheduling, i.e. which resource(s) to allocate and how to partition them.
It is the second interpretation, the one which can be found in the context of G06F 9/50.
This place covers:
Arbitrating access from tasks to shared resources (e.g. mutual exclusion), synchronising the execution of tasks with respect to each others (e.g. producer - consumer) ; a task is defined here as a program in execution.
Attention is drawn to the following places, which may be of interest for search:
Speculative instruction issuing and/or data consistency | |
Transaction processing | |
Arbitration of access on a bus | |
Concurrency management in a database |
Rule 1
When a document qualifies for one of the groups in the table of rule 2 below, the group G06F 9/52 should not be assigned
Rule 2
The following table specifies the group to be assigned:
Technical details on | Group to be assigned |
Barrier synchronisation | |
Algorithms to detect and / or avoid deadlocks when tasks interact with each other | |
Mutual exclusion algorithms, specific implementations of locks and other means to ensure a "correct" (from the concurrency point of view) access to a shared resource | |
Speculative execution beyond synchronisation primitives (e.g. busy lock). This group takes precedence over G06F 9/526; e.g. if a document discloses a mutual exclusion algorithm involving speculative execution beyond busy locks, then it should be classified only in the G06F 9/528 and not also in the G06F 9/526 |
Rule 3
The following text specifies the groups which could be assigned in addition to the groups of rule 2 above, to cover further technical details:
Further technical details on:
Low level features of atomic instructions (e.g. test & set) used to implement locks / mutual exclusion primitives
- Context information: G06F 9/526, G06F 9/528
Tokens (e.g. cooperative locking), token managers and lock managers
- Context information: G06F 9/526, G06F 9/528
Multi-mode locks, i.e. with locks specifying also a mode (e.g. read-write)
- Context information: G06F 9/526, G06F 9/528
This place covers:
Communication between tasks, i.e. programs, processes, threads in execution, either on the same machine or on different ones, where the multiprogramming aspect is relevant, e.g. Inter-Process-Communication.
Attention is drawn to the following places, which may be of interest for search:
Communication between a device and a CPU without any technically relevant detail on multiprogramming concepts or with device specific details | G06F 3/00, G06F 13/00, G06F 13/102 (for device drivers) |
Interaction of the user with the system, i.e. the GUI, and not between the Processes / applications subsequent to the user interaction | |
Communication which does not involve multiprogramming concepts, e.g. invocation of a subroutine | |
Pattern-adapters | |
Non-remote method invocation between objects | |
Architectural details, e.g. interface repositories, object adapters, on distributed object-oriented systems, e.g. CORBA, DCOM Communication-specific details of the remote method invocation should (also) be classified in G06F 9/548 | |
Allocation of a remote service to a client | |
Communication between tasks but predominant aspect peculiar of another field, e.g. monitoring, information retrieval on the web, software download and installation | |
Addressing memory | |
Hardware mechanisms for inter-CPU communication | |
Collaborative editing on a file without any technically relevant details on the event handling aspect | |
Cryptographic protocols | |
Event management relating to network management, e.g. alarms produced by network devices, and no technically relevant details on the multiprocessing aspect is present | |
Messages being distributed over a network, i.e. e-mails, instant messaging | |
Network security protocols | |
Protocols for real-time services in data packet switching networks | |
Network protocols for data switching network services |
Rule 1
When a document qualifies for one of the groups in the table of rule 2 below, the group G06F 9/54 should not be assigned.
Rule 2
The following table specifies the group to be assigned:
Technical details on | Group to be assigned |
Adapter mechanisms e.g. between incompatible applications | |
Communication between tasks, either on the same machine or on different ones, by subscribing to events and issuing event notifications when certain events happen, e.g. Event Management Systems, Unix alarms; communication aspects related to the broadcasting of the notifications | |
User-generated data transfer from the process / application point of view, e.g. clipboards, dynamic data exchange (DDE), object linking and embedding (OLE) | |
Communication of processes via buffers, shared memory, pipes, sockets and the like | |
Communication between tasks residing in different layers e.g. user- and kernel-space | |
Communication of processes via a message passing system, i.e. messaging middleware, and the inherent technicalities, e.g. message structure or queue handling; delivery of messages according to preferences of the recipients (which have to be processes) | |
Implementation of Remote Procedure Calls, e.g. stubs, (un-)marshalling of parameters, namely invocation of a procedure at a remote location; lightweight RPC, i.e. procedure call between protection domains / different address spaces on a single machine | |
Implementation of Remote Method Invocations, i.e. details which are peculiar to RPC between (mainly Java and COM) objects, e.g. object serialization, stub / proxy download. This group takes precedence over G06F 9/547. |
Rule 3
The following text specifies the groups which could be assigned in addition to the groups of rule 2 above, to cover further technical details:
Further technical details on:
Communication aspects related to task execution in a client-server system
- Context information: All groups belonging to G06F 9/54
Interception of communications between tasks / layers
- Context information: All groups belonging to G06F 9/54
Handling of events within a single system, e.g. Unix alarms
- Context information: G06F 9/542
Distributed event management systems or handling of events produced in a distributed system
- Context information: G06F 9/542
Event handling related to the execution of a GUI and as long as the event handling aspect is technically relevant
- Context information: G06F 9/542
Broadcasting / multicasting and sequence related problems of event related messages and as long as the network aspect, if any, is not predominant
- Context information: G06F 9/542
Exchange of messages between processes by using a Message Oriented Middleware, e.g. Java Messaging Services
- Context information: G06F 9/546
Particular techniques for handling message queues (or similar structures)
- Context information: G06F 9/546
Remote execution techniques whereby program code is executed remotely from the client that initiated the execution and the client provides the code to the remote machine
- Context information: All groups belonging to G06F 9/54
This place covers:
- Error avoidance (G06F 11/004)
- Identification related to error detection / correction or monitoring (G06F 11/006)
- Reliability and availability analysis of computing systems (G06F 11/008)
- Error detection and/or correction (G06F 11/07 and subgroups)
- Detection or location of defective computer hardware by testing at a time outside of "normal operating mode", e.g. during standby, idle time or at power on (G06F 11/22 and subgroups)
- Checking the correct order of processing (G06F 11/28)
- Monitoring on computing systems (G06F 11/30 and subgroups)
- Preventing errors by analysing, debugging and testing software (G06F 11/36 and subgroups)
This place does not cover:
Error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer | |
Supervising the progress of recording or reproducing | |
Error detection, correction or monitoring in static stores |
Attention is drawn to the following places, which may be of interest for search:
Testing of digital circuits | |
Error detection, correction or monitoring in control mechanisms | |
Methods or arrangements for verifying the correctness of marking on a record carrier | |
Monitoring patterns of pulse trains | |
Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes | |
Digital transmission of data | |
Recovering in data packet switching network from a failure of a protocol instance or entity |
Implementation details of particular digital data processing techniques applied to error detection, error correction or monitoring are classified in the relevant subgroups of G06F 11/00.
The error detection/correction process in neural networks is also covered (G06F 11/1476).
In this place, the following terms or expressions are used with the meaning indicated:
Fault | Physical defect, imperfection, or flaw that occurs within some hardware component, or logical defect of a piece of software. Essentially, the definition of a fault, as used in the fault tolerance community, agrees with the definition found in the dictionary. Faults may be permanent, transient or intermittent. |
Error | The logical manifestation of a fault, observable in terms of incorrect instructions of or corrupted data in a (computer) system. E.g. a fault in a DRAM cell will never be observed if the memory location is never accessed. Specifically, an error is a deviation from accuracy or correctness. |
Failure | The incorrect functioning of a system as perceivable by a user or the system's environment as a consequence of an error. A failure is the non-performance, the untimely performance or the performance in a subnormal quantity or quality of some action that is due or expected. |
Redundant hardware | Additional hardware for performing the same function as another hardware part, provided that in faultless operation you could renounce on either hardware parts of the system without loosing functionality. |
Data representation | A physical or logical encoding (scheme) for data, which allows the latter to be processed, stored or transmitted by a machine. |
Redundancy in data representation | A representation of data using more resources than strictly necessary to encode the desired information such that in the error free situation one could renounce to some of said resources without loosing information. |
Redundancy in operation | Performing (a set of) operations more than once, or performing sequentially different implementations of a particular function, or performing additional operations which (allow to) restore a system in a state from which its correct operation can be resumed after a failure. |
Time diversity | the concept to have an redundant system in which one of the redundant components operates with a delay with respect to the other in order to avoid common mode failures that would affect both redundant components in the same way at the same time, thereby not being detectable/correctable. |
Master-checker setup | A redundant configuration in which a master CPU drives the system. The checker CPU is synchronized (often at clock level) with the master. It processes the input data stream as the master (and often also the very same program). Whenever the master drives an output signal, the checker compares its own value with the data written by the master. A mismatch triggers an error signal. The master-checker mode is supported in many modern microprocessors by a comparator integrated into the pin driver circuitry, thus reducing the external logic to a few chips for interfacing the error signals." The master-checker system generally gives more accurate answers by ensuring that the answer is correct before passing it on to the application requesting the algorithm being completed. It also allows for error handling if the results are inconsistent. Depending on the merit of a correct answer, a checker-CPU may or may not be warranted. In order to alleviate some of the cost in these situations, the checker-CPU may be used to calculate something else in the same algorithm, increasing the speed and processing output of the CPU system." There are two possible configurations: Master-Listener and Cross-Coupled. The Master-Listener lock step configuration pairs two processors, with one as a complete Master and the other as a complete Listener, the latter having disabled output drivers. In the Cross-Coupled configuration, one of the processors, the SI-Master, drives the system interface bus, while the other processor, the SC-Master, drives the secondary cache bus. The SI-Master has disabled output drivers for the secondary cache interface bus while the SC-Master has disabled output drivers for the system interface bus |
Normal operating mode | The operation of a system or software once it is deployed and provides the desired service as opposed to its development, maintenance, test or idle time. |
Fault masking | Hiding the presence of an fault to the user or the environment of a (computer system by means of some sort of redundancy such that the perceived system functionality is not affected. |
Active fault masking | Taking particular actions (e.g. reconfiguration, failover) not performed in the error free situation to mask a fault. |
Passive fault masking | When a system operates such that no particular action is necessary to mask a fault because all necessary operations are constantly performed independently of the presence of a fault (e.g. majority voting). |
Normal operating mode | the operation of a system or software once it is deployed and provides the desired service as opposed to its development, maintenance, test or idle time. |
Interconnections | are physical media and may be of point-to-point type or of bus type. Two interconnections are only considered redundant if: they both physically connect the same nodes, wherein nodes are the source producing or the final destination consuming the data to be transmitted, and are configured to perform the same data transmissions. |
Monitoring | monitoring refers to an extra functionality for observing properties of a running computing system in its normal operating condition without inputting test data |
Mirrored data | Two copies of the data where it is supposed that both copies contain the same data at any moment. |
Backed up data | The second copy of the data reflects the data of the first copy at a particular moment. |
In this group the use of the Indexing Codes G06F 2201/00 and lower is mandatory.
This place covers:
All measures taken to prevent an error from happening. This can either be by preventing the fault from being present or by ensuring that the presence of the fault will not lead to an error.
This place does not cover:
Measures in response to the occurence of a fault, e.g. measures designed to limit the impact of the error |
In this group the use of the Indexing Codes G06F 2201/00 and lower is mandatory.
This subgroup is only to be used for subject-matter for which no other technique (like fault-masking based on redundancy) to respond to the occurrence of a fault applies. If techniques corresponding to G06F 11/07 and subgroups apply, the subject-matter must be classified there instead.
In this group the use of the Indexing Codes G06F 2201/00 and lower is mandatory.
This place covers:
Reliability theory describes the probability of a system completing its expected function during an interval of time. In reliability theory availability is the degree to which a system is in a specified functioning condition. In the literature various definitions can be found. One well established defines availability as "the probability that a system is operating at a specified time t", Barlow and Proschan: Mathematical Theory of Reliability (1975). A simple representation of availability is a ratio of the expected value of the uptime of a system to the aggregate of the expected values of up and down time. For example in the case of systems having a MTBF (Mean Time Between Failure) and MTTR (Mean Time to Recovery), availability = MTBF/(MTBF + MTTR). Typical terminology that the group contains: error prediction, failure rate, predictive maintenance, longevity, etc. A lot of documents deal with pure theory and propose new formula for better assessing a system in terms of reliability.
This place does not cover:
Forecasting, planning |
In this place, the following terms or expressions are used with the meaning indicated:
Reliability | The term refers to the ability of a system or component to perform its required functions under stated conditions for a specified period of time. |
Availability | The ratio of the total time a functional unit is capable of being used during a given interval to the length of the interval. |
Downtime | The term downtime is used to refer to periods when a system is unavailable. |
Uptime | Part of active time during which an equipment, machine, or system is either fully operational or is ready to perform its intended function. |
MTBF | Mean Time Between failure is the predicted elapsed time between inherent failures of a system during operation. |
MTTF | Mean Time to Failure is the time taken for a part or system to fail for the first time. |
MTTR | Mean Time To Repair is a basic measure of the maintainability of repairable items. It represents the average time required to repair a failed component or device. |
MTTR | Mean Time To Recovery is the average time that a device will take to recover from any failure. |
This place covers:
- Error detection/correction on computing systems using redundancy in data representation (also includes RAID systems involving parity) (G06F 11/08 and subgroups).
- Error detection/correction on computing systems using redundancy in operations (G06F 11/14 and subgroups).
- Error detection/correction on computing systems using redundancy in hardware (G06F 11/16 and subgroups).
- Error or fault processing without redundancy (G06F 11/0703 and subgroups).
- Safety measures (G06F 11/0796)
In this place, the following terms or expressions are used with the meaning indicated:
Fault | Physical defect, imperfection, or flaw that occurs within some hardware component, or logical defect of a piece of software. Essentially, the definition of a fault, as used in the fault tolerance community, agrees with the definition found in the dictionary. Faults may be permanent, transient or intermittent. |
Error | The logical manifestation of a fault, observable in terms of incorrect instructions of or corrupted data in a (computer) system. E.g. a fault in a DRAM cell will never be observed if the memory location is never accessed. Specifically, an error is a deviation from accuracy or correctness. |
Failure | The incorrect functioning of a system as perceivable by a user or the system's environment as a consequence of an error. A failure is the non-performance, the untimely performance or the performance in a subnormal quantity or quality of some action that is due or expected. |
Redundant hardware | Additional hardware for performing the same function as another hardware part, provided that in faultless operation you could renounce on either hardware parts of the system without loosing functionality. |
Data representation | A physical or logical encoding (scheme) for data, which allows the latter to be processed, stored or transmitted by a machine. |
Redundancy in data representation | A representation of data using more resources than strictly necessary to encode the desired information such that in the error free situation one could renounce to some of said resources without loosing information. |
Redundancy in operation | Performing (a set of) operations more than once, or performing sequentially different implementations of a particular function, or performing additional operations which (allow to) restore a system in a state from which its correct operation can be resumed after a failure. |
Normal operating mode | The operation of a system or software once it is deployed and provides the desired service as opposed to its development, maintenance, test or idle time. |
Fault masking | Hiding the presence of an fault to the user or the environment of a (computer system by means of some sort of redundancy such that the perceived system functionality is not affected. |
Active fault masking | Taking particular actions (e.g. reconfiguration, failover) not performed in the error free situation to mask a fault. |
Passive fault masking | When a system operates such that no particular action is necessary to mask a fault because all necessary operations are constantly performed independently of the presence of a fault (e.g. majority voting). |
Mirrored data | Two copies of the data where it is supposed that both copies contain the same data at any moment. |
Backed up data | The second copy of the data reflects the data of the first copy at a particular moment. |
This place covers:
The methods for error/fault processing on computing systems in normal operating mode that do not imply the use of any redundancy techniques. The error/fault processing, as it is defined in the subgroup, comprises one or more of the following steps:
- the error detection step (G06F 11/0751 and subgroups)
- the error/fault reporting/storing step (G06F 11/0766 and subgroups)
- the root cause analysis step of the error/fault (G06F 11/079)
- the remedying step (G06F 11/0793), wherein:
- the error/fault reporting/storing refers to collecting/storing of information related to the error/fault (e.g. a performing a memory dump after detecting an error).
- the root cause analysis of an error aims at identifying the initial cause of an error/fault.
- the remedying step refers to the actions taken on the computing system in order to overcome an error/fault.
Examples of places where the subject matter of this place is covered when specially adapted, used for a particular purpose, or incorporated in a larger system:
Monitoring power failures | |
Responding to power failures | |
Error/fault processing in manufacturing/control systems/environment | |
Error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer | |
Error in transmission systems (error detection/correction in data transmission) |
Attention is drawn to the following places, which may be of interest for search:
Exception handling during concurrent execution | |
Error/fault detection or recovery by retry | |
Error/fault detection by checking the correct order of processing of a system or a program | |
Monitoring per se, reporting or storing of non-error data | |
Protection against unauthorized use of memory | |
Computer security, e.g. detection of attacks, malware, unauthorised accesses | |
Fault management in networks wherein the error/fault is related to the data exchange protocols or to the network equipments (e.g. routers or switches) | |
Monitoring of traffic in a network or of network components (e.g. routers or switches) | |
Network security detection/protection against malicious traffic | |
Monitoring testing in wireless networks |
A document classified in G06F 11/0703 - G06F 11/0793 must receive at least one classification for the "functional aspect" and at least one classification for the "architectural context" according to the two following actions.
Action 1 – Classifying the functional aspect (see groups G06F 11/0751 - G06F 11/0793):
- Classifying the document in a subgroup corresponding to the most relevant functional aspect of the error/fault processing described in the document;
- G06F 11/0751 and its subgroups for the function of error/fault detection, e.g. comparing data to an error threshold;
- G06F 11/0766 and its subgroups for the function of error/fault reporting/storing, e.g. performing a memory dump after detecting an error;
- G06F 11/079 for the function of root cause analysis, e.g. determining the first error event causing the others;
- G06F 11/0793 for the function of error/fault remedying, e.g. executing a specific interrupt handler to clear the error/fault;
- A document can be classified in more than one group of the list defined above based on details of different functional aspects disclosed in the document.
Action 2 – Classifying the architectural context (see groups G06F 11/0706 - G06F 11/0748):
- Classifying the document in a subgroup ) corresponding to the most relevant architectural context described in the document;
- A document can be classified in more than one group under G06F 11/0706 based on details of different architectural contexts disclosed in the document;
- In case the document does not disclose any specific architectural context details or only refers to a general computer, the generic head group, G06F 11/0706, should be used.
This place does not cover:
Drivers for digital recording or reproducing units | |
Circuits for error detection or correction within digital recording or reproducing units | |
For distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] |
Attention is drawn to the following places, which may be of interest for search:
Monitoring per se, reporting or storing of non-error data |
This place does not cover:
Recovery from an exception in an instruction pipeline | |
By retry | |
For recovering from a failure of a protocol instance or entity |
This place covers:
A safe computer system protects its user(s) and/or environment from hazards whether its intended function is performed correctly or not. This group deals with measures taken to ensure that a computer-based system stays safe (i.e. does not present a danger to persons or its environment) when it is no longer able to provide its normal functionality due to the presence of an error. This requirement typically occurs in many real-time control systems. The subject-matter of is group is different from fault-masking since the latter attempts to maintain the desired functionality of a system in the presence of faults whereas this group relates to ensuring a safe condition when faults cannot be masked, thereby degrading the desired system functionality.
Attention is drawn to the following places, which may be of interest for search:
If such a system continues to operate albeit with degraded hardware or software functionality, additional classification symbols in the appropriate subgroups may be necessary. |
In this group the use of the Indexing Codes G06F 2201/00 and lower is mandatory.
This place covers:
Documents where the error detection/correction in a computer system is done by redundancy in the representation of the data.
Most often this redundancy arises from the fact that more bits are used to represent the data than strictly necessary. However, these groups cover as well cases where the data is stored twice, but in different formats (e.g. the second time using inverse logic).
However, subject-matter where 2 (or more) identical copies of the data are stored, is not treated here (see informative references)
This place does not cover:
Data with redundancy of data representation stored on storage with movable components | |
Error detection or correction codes per se | |
Transmission of data using redundancy of data representation |
Attention is drawn to the following places, which may be of interest for search:
Redundant storage of data |
Generally only 1 class is given. Only invention information is classified.
This place covers:
Subject matter where more bits are used to represent the data than strictly necessary, however without representing the data twice (or more often).
Subject-matter dealing with host-to-memory or host-to-host transfers is classified in this group per se, except when the protection is on the level of blocks of data (which is in G06F 11/1004).
Attention is drawn to the following places, which may be of interest for search:
Protecting a block of data words |
As soon as the redundant representation is stored on storage, the subject-matter should be classified in G06F 11/1076 and subgroups and not in other subgroups. This is independent of how the redundant representation is determined or what representation is used. Group is not used for classification.
In this place, the following terms or expressions are used with the meaning indicated:
Memory | solid state devices used as main memory which are either directly addressable by the associated CPU (meaning that they are located on the high speed bus), or are not addressable internal memories (such as registers and buffers). As such, memory is different from storage. |
Storage | media from which data needs first to be loaded before it can be used for computing. |
This place covers:
The use of checking codes on bigger units of data than a single word to detect the presence of errors in the data.
This group does not cover correction of data.
In this group, it is irrelevant for what purpose the checking is being used (e.g. for storing the data in memory, for transmission of the data to another component in the computing system, ...) as long as it is related to error detection.
Attention is drawn to the following places, which may be of interest for search:
Security arrangements for protecting computers or computer systems against unauthorized activity | |
Computer virus detection or handling | |
Using checking codes for detecting unauthorised modifications | |
Using checking codes in data communication |
This place covers:
That subject-matter where the error detection and/or correction is done on data stored in a single solid state device (i.e. the detection/correction is done when reading data from or writing data into the memory). It is independent of what function the solid state device has in the system. The relevant criterium is the type of component on which the data is stored (i.e. solid state devices in contrast to disks, tapes or other storage devices with moving components).
This place does not cover:
To protect a block of data words |
Attention is drawn to the following places, which may be of interest for search:
Protection of blocks of data being transferred (from memory to memory or between host and memory) | |
Parity RAID in storage |
G06F 11/1004 takes precedence.
This place covers:
This group and its subgroups cover specific code arrangements, i.e. documents describing how the ECC codes to be applied to the data are determined. As an example, documents describing row and column parity are classified here
G06F 11/1048 takes precedence.
Attention is drawn to the following places, which may be of interest for search:
Protection against unauthorized access to memory |
Not used for classification.
This place covers:
ECC codes where different bits of a data word are stored in different memory modules. Documents classified here, do not deal with calcualtion of ECC/EDC but only on where the data with the corresponding code is stored in the device (e.g. on different modules of the same device).
Attention is drawn to the following places, which may be of interest for search:
Parity distribution in a Redundant Array of Independent storage devices |
Only classify here when no other group applies.
G06F 11/1012 (code arrangements) takes precedence.
G06F 11/1048 (hardware arrangements) takes precedence.
This place covers:
This group and its subgroups cover coding where the hardware plays a role, e.g. to make the error correction or detection faster, to reduce the power consumption for detecting/correcting errors, ...
The hardware involved must be described.
Attention is drawn to the following places, which may be of interest for search:
Parity in RAID systems |
This place covers:
This group covers documents in which no error detection/correction by redundant coding is performed at all in the normal situation.
Subject-matter covering circuits where ECC/EDC codes are calculated in parallel during operation are to be classified in G06F 11/1048.
Not used for classification.
Attention is drawn to the following places, which may be of interest for search:
Memory refresh tehniques |
This place covers:
This group covers ECC when it concerns a feature which is specific to caches or content addressable memories.
For instance if an additional ECC is used for the cache with respect to the memory.
This place does not cover:
G06F 11/1072 takes precedence
G06F 11/1072 takes precedence
Documents classified in this group should be sent to G11C 29/00 as well.
This place covers:
Covers all subject-matter related to memories of which the cells can store more than 2 values.
Attention is drawn to the following places, which may be of interest for search:
Architectural details of multilevel memories |
Documents classified in this group should be sent to G11C 29/00 as well.
This place covers:
Redundancy using parity calculation and stripping in redundant arrays of storage devices such as :
- Hard Drives (e.g. RAID)
- Semiconductor memories (e.g. RAID of SSD/Flash disks)
- Optical Drives (e.g. RAID in ODD archives)
- Tape (e.g. RAIT)
Mirroring in RAID: G06F 11/2053
Use of parity in memories which do not constitute a redundant array and are close to the processor (e.g. ECC or arithmetic code in a semiconductor memory on the high speed bus): G06F 11/1008
This place does not cover:
Control as such of RAID system | |
Mirroring | |
Redundancy on a disk used for reproduction |
If the document can be classified in a subgroup of the G06F 11/1076, then it should not appear in the head subgroup. Only those documents which cannot be classified in one or several subgroups (e.g. G06F 11/108, G06F 11/1084 etc) have to be classified in the head subgroup.
It is important to evaluate whether the parity calculation aspect is present and if specifics about fault recovery / rebuilding are present in the document. If such topic is not present of if the document talks about general parity aspects mixed with other topics, the Indexing Code groups should be used.
In this place, the following terms or expressions are used with the meaning indicated:
RAID | Redundant Array of Independent Disks is a technique for implementing fault tolerance in storage devices. |
Rebuild | Action of regenerating lost data from redundant data present in available drives / memories. |
JBOD | Just a Bunch Of Disks represent a group of disks without particular redundant scheme implemented. |
This place covers:
Using the parity to reconstruct data which would otherwise have been lost when a storage device is failing or is removed.
When the reconstruction takes place once a new disk is available, G06F 11/1092 subgroup is used.
When the reconstruction takes place on a spare disk that was available, G06F 11/1088 subgroup is used.
This place does not cover:
Actual replacement of a failing disk |
In this place, the following terms or expressions are used with the meaning indicated:
RAID | Redundant Array of Independent Disks is a technique for implementing fault tolerance in storage devices. |
This place covers:
Although not fully consistent with the title of this group we consider that prophylactic additional saving-related measures like check-pointing, backing-up or state copying, which are performed before the occurrence of a fault in order to be able to recover or restore (at least partially) in case a fault occurs in the future, and which do not rely on hardware redundancy, are to be classified under this group.
The corresponding reverse operations of restoring and/or recovering and/or rolling back fit in naturally, since these are performed after the occurrence of a fault. The same holds for any type of redoing. All these activities are considered particular cases of error correction.
Retrying an operation may be part of an error detection mechanism when used in conjunction with a counting or time-out scheme. It may constitute an error correction when it is used to overcome a transient error. In both cases it is a mechanism used after the occurrence of a fault.
In this group the use of the Indexing Codes G06F 2201/00 and lower is mandatory.
This place covers:
The techniques covered by G06F 11/1402 imply at least an attempt to correct an error. They do not cover the detection as such, which may be found in G06F 11/1497 or G06F 11/1479.
Classification of documents relating to snapshots is done as follows :
- documents describing the use or creation of snapshots to deal with the detection or correction of errors are classified in G06F 11/00, and normally in subgroups of G06F 11/1402.
- documents describing other uses of snapshots (or creation of snapshots for such purposes) are not classified in G06F 11/00. They are classified in G06F 16/00 or G06F 3/06 unless the specific use is provided for in another classification place.
- General-purpose treatment of snapshots (e.g. management of valid snapshots, determining not needed snapshots, storage optimisation, ...) is dealt with in G06F 16/00 if the snapshots are on file level. If the snapshots are volume-based snapshots, they are dealt with in G06F 3/00 since they concern the management of storage space in this case.
In this place, the following terms or expressions are used with the meaning indicated:
Persistent data | Data which are still relevant after a normal power off/ power on cycle or a logoff/logon procedure. Typically, the user determines when such data should be modified or destroyed (since they are not relevant anymore).Thus, persistent data is not equivalent to data that is stored in a non-volatile manner, the latter merely giving an indication of the type of memory/storage used to save the data. Non-volatile data does not need to be persistent, but persistent data is always non-volatile. |
This place covers:
Measures taken inside the processor or relating to individual processor instructions. To implement these measures, additional hardware (such as registers) can be used. A necessary condition to classify here, is that the operating system is unaware of the measures taken.
This place covers:
The solution of a specific problem related to the functioning of the computer system(s) as a whole in contrast to a particular application functionality. It is intended to cover firmware level (e.g. BIOS), OS level, file system level and/or utilities.
This group is NOT intended to include database specific techniques. Note that if the solutions in these groups involve the use of particular software techniques covered in G06F 11/1479 /low, the documents should be classified there as well. See e.g. the comment under G06F 11/1438 relating to additional classification in G06F 11/1479.
This place covers:
Restricted to correction (attempt) of errors during or using the boot process.
Attention is drawn to the following places, which may be of interest for search:
Booting in general | |
Reboot as part of upgrading to verify the successful upgrade |
This place covers:
Reconfiguration meaning that the system undergoes modification of the components that make up the system or their arrangement in response to an error being detected. The components can be either hardware or software components.
Example:
- The system switches to a minimal video driver in case the normally used video driver does not give any image anymore.
Counterexamples:
- redistributing the load on individual processors of a multiprocessor system in an overload condition
- masking faults by reconfiguring redundant hardware (e.g. making a standby component primary, changing the role of disks in a mirrored pair, ...)
This place does not cover:
Software update in general | |
Checking for a new version of software when a failure occurs with the current version |
Attention is drawn to the following places, which may be of interest for search:
Isolating or reconfiguring faulty entities in data switching networks |
This place covers:
Potential to recover from errors during or after software update or upgrade or installation processes. Also applies when this process is performed by a specific update/install software or even by the application itself.
This place covers:
There is redundancy in the metadata used to access a given stored data item.
Examples are :
- File systems having redundant FATs or redundant tuples
- Redundant CMOS/BIOS data defining the disk layout
Counterexamples are :
- Retry a read from a disk sector by the disk controller when the read fails. This should be classified G11B 20/00
- Retrying the disk I/O request by the CPU. This should be classified in
Attention is drawn to the following places, which may be of interest for search:
File management in general |
This place covers:
The act of restarting a software module (e.g. an application, but not the complete OS, because this would imply a boot process which is covered in G06F 11/1417) either to recover from an error or in order to prevent an error (the latter being rejuvenation). The restarting or rejuvenating may be based on a previous state saving of the software module. Usually, this is based on a previously saved dynamic state of the software module. The dynamic state of a software application or process or task includes at least some of stack, heap, open files, etc. information, from which the application can later continue processing. Continuing from a previously saved state without full application restart is also covered by this group.
If the application restart or rejuvenation mechanism is implemented in an OS or middleware layer outside the application, this aspect is to be additionally classified in G06F 11/1482.
This place covers:
Measures taken out of a normal operating mode (after boot) but before abnormal termination of the system to enable a machine to continue processing from a defined state after a re-initialisation (reset or re-powering) of the machine. Example: power is monitored, when voltage drop is detected, the RAM is saved to disk. After power restore, RAM is reloaded from disk. Or, battery used to temporarily backup the RAM during a (short) power outage.
Without error see G06F 1/3203.
Attention is drawn to the following places, which may be of interest for search:
Means for saving power |
If a spare power supply is used, additionally G06F 11/2015 must be given (either as additional or invention, depending on the circumstances)
This place covers:
Examples :
- printer or disk I/O retry by the Operating System.
- Repeated requests by a client to the server
Attention is drawn to the following places, which may be of interest for search:
Detecting errors in the information received | |
Error detection mechanisms part of a communication protocol |
Documents should only be classified here when they concern transmit or communication errors and where the mechanisms used are not part of a communication protocol and no other group of G06F 11/14 and subgroups or G06F 11/16 and subgroups applies.
This place covers:
Backup done either on file or data block level. Covers, backing up of any type of file, independent of the data it contains.
Note: Due to considerable overlap in technology, backups and data backup systems frequently are confused with archives and fault-tolerant systems. However:
- Backups differ from archives in the sense that archives are the primary copy of data whereas backups are a secondary copy of data.
- Data backup systems differ from fault-tolerant systems in the sense that data backup systems assume that a fault will cause a data loss event, whereas fault-tolerant systems do not.
The scope of this group also covers ensuring that the data to be saved (as backup copy) is consistent (i.e. represents a meaningful state), especially if the copy is made of data within a distributed system.
Attention is drawn to the following places, which may be of interest for search:
Data replication | |
Mirroring | |
Data archiving |
This place covers:
All operations related to data management which are used for the backup data.
Examples of management of the data that is backed up :
- managing versions of backups
- formatting for compatibility with different systems
- consolidation of backed up data
Attention is drawn to the following places, which may be of interest for search:
File management in general |
Documents relating to authorisation control or data security of the backups should also be sent to G06F 21/00 for classification
This place covers:
- any determination of what data should be subjected to backup (e.g. what type of data, which origin of data, according to criticality of the data, ...)
- determining the necessity to include particular data (e.g. based on whether the data has changed)
- in what form the data should be backed up (e.g. incremental backup, full backup, differential backup, ...)
This place covers:
all techniques that are used to detect multiple copies of data items (e.g. files, data blocks, strings of data, ...) and to use this knowledge to optimize the backup (e.g. by not retransmitting the detected item, by not storing the detected item twice,...).
This is irrespective of whether the multiple copies are between (backups of) data at different times or between (backups of) different data items having a part in common or between (backups from) different hosts.
Attention is drawn to the following places, which may be of interest for search:
Redundancy elimination in general |
This place covers:
subject-matter where the hardware arrangement is affected by its use as backup system or where a particular system arrangement is proposed for backup. However, this does not imply that a particular hardware component must be physically modified for backup purposes
The following are some examples :
- additional (temporary) memory or storage is used to enable efficient writing on the backup medium
- storage which is configured to automatically perform a backup, when connected to a system to be backed up.
- A specific type of hardware being used for backup
A distributed architecture where some processing nodes are dedicated to particular backup functions
This place covers:
All operations related to the management of the backup process.
Examples are :
management of backup process :
- how to make the backup process faster
- avoiding data restoration by unauthorized persons
In this group the use of the Indexing Codes G06F 2201/00 and lower is mandatory.
Documents relating to authorisation control or data security of the backups should also be sent to G06F 21/00 for classification
This place covers:
Everything relating to arrangements in which the distributed architecture is of importance for the backup. Examples: Optimizing bandwidth, selecting machines (source or target) for backup, time multiplexed scheduling of backup clients, hierarchical distribution of backup control functionality to different networked machines.
This place covers:
All subject-matter dealing with techniques of limiting the impact of the backup process on normal operations, e.g. by minimizing the backup window.