| Class 438 | SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS |
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![[List of Pre Grant Publications for class 438 subclass 1]](../as.gif) | ![[List of Patents for class 438 subclass 1]](../ps.gif) | 1 | HAVING BIOMATERIAL COMPONENT OR INTEGRATED WITH LIVING ORGANISM |
| | 2 | HAVING SUPERCONDUCTIVE COMPONENT |
| | 3 | HAVING MAGNETIC OR FERROELECTRIC COMPONENT |
| | 4 | REPAIR OR RESTORATION |
| | 5 | INCLUDING CONTROL RESPONSIVE TO SENSED CONDITION |
| | 6 |  Interconnecting plural devices on semiconductor substrate |
| | 7 | Optical characteristic sensed |
| | 10 | Electrical characteristic sensed |
| | 14 | WITH MEASURING OR TESTING |
| | 15 | Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 16 | Optical characteristic sensed |
| | 17 | Electrical characteristic sensed |
| | 19 | HAVING INTEGRAL POWER SOURCE (E.G., BATTERY, ETC.) |
| | 20 | ELECTRON EMITTER MANUFACTURE |
| | 21 | MANUFACTURE OF ELECTRICAL DEVICE CONTROLLED PRINTHEAD |
| | 22 | MAKING DEVICE OR CIRCUIT EMISSIVE OF NONELECTRICAL SIGNAL |
| | 23 | Having diverse electrical device |
| | 26 | Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 29 | Including integrally formed optical element (e.g., reflective layer, luminescent material, contoured surface, etc.) |
| | 33 | Substrate dicing |
| | 34 | Making emissive array |
| | 36 | Ordered or disordered |
| | 37 | Graded composition |
| | 38 | Passivating of surface |
| | 39 | Mesa formation |
| | 42 | Groove formation |
| | 45 | Dopant introduction into semiconductor region |
| | 46 | Compound semiconductor |
| | 48 | MAKING DEVICE OR CIRCUIT RESPONSIVE TO NONELECTRICAL SIGNAL |
| | 49 | Chemically responsive |
| | 50 | Physical stress responsive |
| | 51 |  Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 52 | Having cantilever element |
| | 53 | Having diaphragm element |
| | 54 | Thermally responsive |
| | 56 | Responsive to corpuscular radiation (e.g., nuclear particle detector, etc.) |
| | 57 | Responsive to electromagnetic radiation |
| | 58 | Gettering of substrate |
| | 59 | Having diverse electrical device |
| | 61 | Continuous processing |
| | 63 | Particulate semiconductor component |
| | 64 | Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 65 |  Having additional optical element (e.g., optical fiber, etc.) |
| | 66 | Plural responsive devices (e.g., array, etc.) |
| | 68 | Substrate dicing |
| | 69 | Including integrally formed optical element (e.g., reflective layer, luminescent layer, etc.) |
| | 70 | Color filter |
| | 71 | Specific surface topography (e.g., textured surface, etc.) |
| | 72 | Having reflective or antireflective component |
| | 73 | Making electromagnetic responsive array |
| | 74 | Vertically arranged (e.g., tandem, stacked, etc.) |
| | 75 | Charge transfer device (e.g., CCD, etc.) |
| | 76 |  Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.) |
| | 77 | Compound semiconductor |
| | 78 | Having structure to improve output signal (e.g., exposure control structure, etc.) |
| | 80 | Lateral series connected array |
| | 82 | Having organic semiconductor component |
| | 83 | Forming point contact |
| | 84 | Having selenium or tellurium elemental semiconductor component |
| | 85 | Having metal oxide or copper sulfide compound semiconductive component |
| | 87 | Graded composition |
| | 88 | Direct application of electric current |
| | 89 | Fusion or solidification of semiconductor region |
| | 90 | Including storage of electrical charge in substrate |
| | 91 | Avalanche diode |
| | 92 | Schottky barrier junction |
| | 93 | Compound semiconductor |
| | 94 | Heterojunction |
| | 95 | Chalcogen (i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te)) containing |
| | 96 | Amorphous semiconductor |
| | 97 | Polycrystalline semiconductor |
| | 98 | Contact formation (i.e., metallization) |
| | 99 | HAVING ORGANIC SEMICONDUCTIVE COMPONENT |
| | 100 | MAKING POINT CONTACT DEVICE |
| | 102 | HAVING SELENIUM OR TELLURIUM ELEMENTAL SEMICONDUCTOR COMPONENT |
| | 104 | HAVING METAL OXIDE OR COPPER SULFIDE COMPOUND SEMICONDUCTOR COMPONENT |
| | 105 | HAVING DIAMOND SEMICONDUCTOR COMPONENT |
| | 106 | PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR |
| | 107 | Assembly of plural semiconductive substrates each possessing electrical device |
| | 110 | Making plural separate devices |
| | 115 | Including contaminant removal or mitigation |
| | 116 | Having light transmissive window |
| | 117 | Incorporating resilient component (e.g., spring, etc.) |
| | 118 | Including adhesive bonding step |
| | 120 | With vibration step |
| | 121 | Metallic housing or support |
| | 125 | Insulative housing or support |
| | 127 | Encapsulating |
| | 128 | MAKING DEVICE ARRAY AND SELECTIVELY INTERCONNECTING |
| | 129 | With electrical circuit layout |
| | 130 | Rendering selected devices operable or inoperable |
| | 131 | Using structure alterable to conductive state (i.e., antifuse) |
| | 132 | Using structure alterable to nonconductive state (i.e., fuse) |
| | 133 | MAKING REGENERATIVE-TYPE SWITCHING DEVICE (E.G., SCR, IGBT, THYRISTOR, ETC.) |
| | 134 | Bidirectional rectifier with control electrode (e.g., triac, diac, etc.) |
| | 135 | Having field effect structure |
| | 139 | Altering electrical characteristic |
| | 140 | Having structure increasing breakdown voltage (e.g., guard ring, field plate, etc.) |
| | 141 | MAKING CONDUCTIVITY MODULATION DEVICE (E.G., UNIJUNCTION TRANSISTOR, DOUBLE BASE DIODE, CONDUCTIVITY-MODULATED TRANSISTOR, ETC.) |
| | 142 | MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS |
| | 143 | Gettering of semiconductor substrate |
| | 144 | Charge transfer device (e.g., CCD, etc.) |
| | 145 | Having additional electrical device |
| | 146 | Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.) |
| | 147 | Changing width or direction of channel (e.g., meandering channel, etc.) |
| | 148 | Substantially incomplete signal charge transfer (e.g., bucket brigade, etc.) |
| | 149 | On insulating substrate or layer (e.g., TFT, etc.) |
| | 150 | Specified crystallographic orientation |
| | 151 | Having insulated gate |
| | 152 | Combined with electrical device not on insulating substrate or layer |
| | 154 | Complementary field effect transistors |
| | 155 | And additional electrical device on insulating substrate or layer |
| | 156 | Vertical channel |
| | 157 | Plural gate electrodes (e.g., dual gate, etc.) |
| | 158 | Inverted transistor structure |
| | 161 | Including source or drain electrode formation prior to semiconductor layer formation (i.e., staggered electrodes) |
| | 162 | Introduction of nondopant into semiconductor layer |
| | 163 | Adjusting channel dimension (e.g., providing lightly doped source or drain region, etc.) |
| | 164 | Semiconductor islands formed upon insulating substrate or layer (e.g., mesa formation, etc.) |
| | 166 | Including recrystallization step |
| | 167 | Having Schottky gate (e.g., MESFET, HEMT, etc.) |
| | 168 | Specified crystallographic orientation |
| | 169 | Complementary Schottky gate field effect transistors |
| | 170 | And bipolar device |
| | 171 | And passive electrical device (e.g., resistor, capacitor, etc.) |
| | 172 | Having heterojunction (e.g., HEMT, MODFET, etc.) |
| | 173 | Vertical channel |
| | 174 | Doping of semiconductive channel region beneath gate (e.g., threshold voltage adjustment, etc.) |
| | 175 | Buried channel |
| | 176 | Plural gate electrodes (e.g., dual gate, etc.) |
| | 177 | Closed or loop gate |
| | 178 | Elemental semiconductor |
| | 179 | Asymmetric |
| | 180 | Self-aligned |
| | 186 | Having junction gate (e.g., JFET, SIT, etc.) |
| | 187 | Specified crystallographic orientation |
| | 188 | Complementary junction gate field effect transistors |
| | 189 | And bipolar transistor |
| | 190 | And passive device (e.g., resistor, capacitor, etc.) |
| | 191 | Having heterojunction |
| | 192 | Vertical channel |
| | 194 | Doping of semiconductive channel region beneath gate (e.g., threshold voltage adjustment, etc.) |
| | 195 | Plural gate electrodes |
| | 196 | Including isolation structure |
| | 197 | Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) |
| | 198 | Specified crystallographic orientation |
| | 199 | Complementary insulated gate field effect transistors (i.e., CMOS) |
| | 200 | And additional electrical device |
| | 201 | Including insulated gate field effect transistor having gate surrounded by dielectric (i.e., floating gate) |
| | 202 | Including bipolar transistor (i.e., BiCMOS) |
| | 203 |  Complementary bipolar transistors |
| | 204 | Lateral bipolar transistor |
| | 205 | Plural bipolar transistors of differing electrical characteristics |
| | 206 | Vertical channel insulated gate field effect transistor |
| | 207 | Including isolation structure |
| | 209 | Including additional vertical channel insulated gate field effect transistor |
| | 210 | Including passive device (e.g., resistor, capacitor, etc.) |
| | 211 | Having gate surrounded by dielectric (i.e., floating gate) |
| | 212 | Vertical channel |
| | 213 | Common active region |
| | 214 | Having underpass or crossunder |
| | 215 | Having fuse or integral short |
| | 216 | Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound |
| | 217 | Doping of semiconductor channel region beneath gate insulator (e.g., threshold voltage adjustment, etc.) |
| | 218 | Including isolation structure |
| | 219 | Total dielectric isolation |
| | 220 | Isolation by PN junction only |
| | 221 | Dielectric isolation formed by grooving and refilling with dielectric material |
| | 222 | With epitaxial semiconductor layer formation |
| | 223 | Having well structure of opposite conductivity type |
| | 225 | Recessed oxide formed by localized oxidation (i.e., LOCOS) |
| | 229 | Self-aligned |
| | 233 | And contact formation |
| | 234 | Including bipolar transistor (i.e., BiMOS) |
| | 237 | Including diode |
| | 238 | Including passive device (e.g., resistor, capacitor, etc.) |
| | 239 | Capacitor |
| | 240 | Having high dielectric constant insulator (e.g., Ta2O5, etc.) |
| | 241 | And additional field effect transistor (e.g., sense or access transistor, etc.) |
| | 243 | Trench capacitor |
| | 244 | Utilizing stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.) |
| | 245 | With epitaxial layer formed over the trench |
| | 246 | Including doping of trench surfaces |
| | 250 | Planar capacitor |
| | 253 | Stacked capacitor |
| | 257 | Having additional gate electrode surrounded by dielectric (i.e., floating gate) |
| | 258 | Including additional field effect transistor (e.g., sense or access transistor, etc.) |
| | 259 | Including forming gate electrode in trench or recess in substrate |
| | 260 | Textured surface of gate insulator or gate electrode |
| | 261 | Multiple interelectrode dielectrics or nonsilicon compound gate insulator |
| | 262 | Including elongated source or drain region disposed under thick oxide regions (e.g., buried or diffused bitline, etc.) |
| | 264 | Tunneling insulator |
| | 265 | Oxidizing sidewall of gate electrode |
| | 266 | Having additional, nonmemory control electrode or channel portion (e.g., for accessing field effect transistor structure, etc.) |
| | 268 | Vertical channel |
| | 269 | Utilizing epitaxial semiconductor layer grown through an opening in an insulating layer |
| | 270 | Gate electrode in trench or recess in semiconductor substrate |
| | 273 | Having integral short of source and base regions |
| | 275 | Making plural insulated gate field effect transistors of differing electrical characteristics |
| | 279 | Making plural insulated gate field effect transistors having common active region |
| | 280 | Having underpass or crossunder |
| | 281 | Having fuse or integral short |
| | 282 | Buried channel |
| | 283 | Plural gate electrodes (e.g., dual gate, etc.) |
| | 284 | Closed or loop gate |
| | 285 | Utilizing compound semiconductor |
| | 286 | Asymmetric |
| | 287 | Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound |
| | 288 | Having step of storing electrical charge in gate dielectric |
| | 289 | Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.) |
| | 290 | After formation of source or drain regions and gate electrode |
| | 291 | Using channel conductivity dopant of opposite type as that of source and drain |
| | 292 | Direct application of electrical current |
| | 293 | Fusion or solidification of semiconductor region |
| | 294 | Including isolation structure |
| | 295 | Total dielectric isolation |
| | 296 | Dielectric isolation formed by grooving and refilling with dielectric material |
| | 297 | Recessed oxide formed by localized oxidation (i.e., LOCOS) |
| | 299 | Self-aligned |
| | 300 | Having elevated source or drain (e.g., epitaxially formed source or drain, etc.) |
| | 301 | Source or drain doping |
| | 308 | Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.) |
| | 309 | FORMING BIPOLAR TRANSISTOR BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS |
| | 310 | Gettering of semiconductor substrate |
| | 311 | On insulating substrate or layer (i.e., SOI type) |
| | 312 | Having heterojunction |
| | 313 | Complementary bipolar transistors |
| | 314 | And additional electrical device |
| | 315 | Forming inverted transistor structure |
| | 316 | Forming lateral transistor structure |
| | 317 | Wide bandgap emitter |
| | 318 | Including isolation structure |
| | 320 | Self-aligned |
| | 322 | Complementary bipolar transistors |
| | 323 | Having common active region (i.e., integrated injection logic (I2L), etc.) |
| | 326 | Including additional electrical device |
| | 327 | Having lateral bipolar transistor |
| | 328 | Including diode |
| | 329 | Including passive device (e.g., resistor, capacitor, etc.) |
| | 333 | Having fuse or integral short |
| | 334 | Forming inverted transistor structure |
| | 335 | Forming lateral transistor structure |
| | 336 | Combined with vertical bipolar transistor |
| | 337 | Active region formed along groove or exposed edge in semiconductor |
| | 338 | Having multiple emitter or collector structure |
| | 339 | Self-aligned |
| | 340 | Making plural bipolar transistors of differing electrical characteristics |
| | 341 | Using epitaxial lateral overgrowth |
| | 342 | Having multiple emitter or collector structure |
| | 343 | Mesa or stacked emitter |
| | 344 | Washed emitter |
| | 345 | Walled emitter |
| | 346 | Emitter dip prevention or utilization |
| | 347 | Permeable or metal base |
| | 348 | Sidewall base contact |
| | 349 | Pedestal base |
| | 350 | Forming base region of specified dopant concentration profile (e.g., inactive base region more heavily doped than active base region, etc.) |
| | 351 | Direct application of electrical current |
| | 352 | Fusion or solidification of semiconductor region |
| | 353 | Including isolation structure |
| | 354 | Having semi-insulative region |
| | 355 | Total dielectrical isolation |
| | 356 | Isolation by PN junction only |
| | 359 | Dielectric isolation formed by grooving and refilling with dielectrical material |
| | 360 | With epitaxial semiconductor formation in groove |
| | 361 | Including deposition of polysilicon or noninsulative material into groove |
| | 362 | Recessed oxide by localized oxidation (i.e., LOCOS) |
| | 364 | Self-aligned |
| | 365 | Forming active region from adjacent doped polycrystalline or amorphous semiconductor |
| | 366 | Having sidewall |
| | 368 | Simultaneously outdiffusing plural dopants from polysilicon or amorphous semiconductor |
| | 369 | Dopant implantation or diffusion |
| | 378 | Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.) |
| | 379 | VOLTAGE VARIABLE CAPACITANCE DEVICE MANUFACTURE (E.G., VARACTOR, ETC.) |
| | 380 | AVALANCHE DIODE MANUFACTURE (E.G., IMPATT, TRAPPAT, ETC.) |
| | 381 | MAKING PASSIVE DEVICE (E.G., RESISTOR, CAPACITOR, ETC.) |
| | 382 | Resistor |
| | 386 | Trench capacitor |
| | 387 | Having stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.) |
| | 388 | With epitaxial layer formed over the trench |
| | 389 | Including doping of trench surfaces |
| | 393 | Planar capacitor |
| | 396 | Stacked capacitor |
| | 400 | FORMATION OF ELECTRICALLY ISOLATED LATERAL SEMICONDUCTIVE STRUCTURE |
| | 401 | Having substrate registration feature (e.g., alignment mark) |
| | 402 | And gettering of substrate |
| | 403 | Having semi-insulating component |
| | 404 | Total dielectric isolation |
| | 405 | And separate partially isolated semiconductor regions |
| | 406 | Bonding of plural semiconductive substrates |
| | 407 | Nondopant implantation |
| | 408 | With electrolytic treatment step |
| | 410 | Encroachment of separate locally oxidized regions |
| | 411 | Air isolation (e.g., beam lead supported semiconductor islands, etc.) |
| | 413 | With epitaxial semiconductor formation |
| | 414 | Isolation by PN junction only |
| | 421 | Having air-gap dielectric (e.g., groove, etc.) |
| | 423 | Implanting to form insulator |
| | 424 | Grooved and refilled with deposited dielectric material |
| | 425 | Combined with formation of recessed oxide by localized oxidation |
| | 427 | Refilling multiple grooves of different widths or depths |
| | 429 | And epitaxial semiconductor formation in groove |
| | 430 | And deposition of polysilicon or noninsulative material into groove |
| | 433 | Dopant addition |
| | 435 | Multiple insulative layers in groove |
| | 438 | Reflow of insulator |
| | 439 | Recessed oxide by localized oxidation (i.e., LOCOS) |
| | 440 | Including nondopant implantation |
| | 441 | With electrolytic treatment step |
| | 442 | With epitaxial semiconductor layer formation |
| | 443 | Etchback of recessed oxide |
| | 444 | Preliminary etching of groove |
| | 448 | Utilizing oxidation mask having polysilicon component |
| | 449 | Dopant addition |
| | 452 | Plural oxidation steps to form recessed oxide |
| | 453 | And electrical conductor formation (i.e., metallization) |
| | 454 | Field plate electrode |
| | 455 | BONDING OF PLURAL SEMICONDUCTOR SUBSTRATES |
| | 456 | Having enclosed cavity |
| | 457 | Warping of semiconductor substrate |
| | 458 | Subsequent separation into plural bodies (e.g., delaminating, dicing, etc.) |
| | 459 | Thinning of semiconductor substrate |
| | 460 | SEMICONDUCTOR SUBSTRATE DICING |
| | 461 | Beam lead formation |
| | 462 | Having specified scribe region structure (e.g., alignment mark, plural grooves, etc.) |
| | 463 | By electromagnetic irradiation (e.g., electron, laser, etc.) |
| | 464 | With attachment to temporary support or carrier |
| | 465 | Having a perfecting coating |
| | 466 | DIRECT APPLICATION OF ELECTRICAL CURRENT |
| | 467 | To alter conductivity of fuse or antifuse element |
| | 468 | Electromigration |
| | 469 | Utilizing pulsed current |
| | 470 | Fusion of semiconductor region |
| | 471 | GETTERING OF SUBSTRATE |
| | 472 | By vibrating or impacting |
| | 473 | By implanting or irradiating |
| | 476 | By layers which are coated, contacted, or diffused |
| | 477 | By vapor phase surface reaction |
| | 478 | FORMATION OF SEMICONDUCTIVE ACTIVE REGION ON ANY SUBSTRATE (E.G., FLUID GROWTH, DEPOSITION) |
| | 479 | On insulating substrate or layer |
| | 480 | Including implantation of ion which reacts with semiconductor substrate to form insulating layer |
| | 481 | Utilizing epitaxial lateral overgrowth |
| | 482 | Amorphous semiconductor |
| | 483 | Compound semiconductor |
| | 484 | Running length (e.g., sheet, strip, etc.) |
| | 485 | Deposition utilizing plasma (e.g., glow discharge, etc.) |
| | 486 | And subsequent crystallization |
| | 488 | Polycrystalline semiconductor |
| | 489 | Simultaneous single crystal formation |
| | 490 | Running length (e.g., sheet, strip, etc.) |
| | 491 | And subsequent doping of polycrystalline semiconductor |
| | 492 | Fluid growth step with preceding and subsequent diverse operation |
| | 493 | Plural fluid growth steps with intervening diverse operation |
| | 494 | Differential etching |
| | 495 | Doping of semiconductor |
| | 496 | Coating of semiconductive substrate with nonsemiconductive material |
| | 497 | Fluid growth from liquid combined with preceding diverse operation |
| | 500 | Fluid growth from liquid combined with subsequent diverse operation |
| | 503 | Fluid growth from gaseous state combined with preceding diverse operation |
| | 507 | Fluid growth from gaseous state combined with subsequent diverse operation |
| | 510 | INTRODUCTION OF CONDUCTIVITY MODIFYING DOPANT INTO SEMICONDUCTIVE MATERIAL |
| | 511 | Ordering or disordering |
| | 512 | Involving nuclear transmutation doping |
| | 513 | Plasma (e.g., glow discharge, etc.) |
| | 514 | Ion implantation of dopant into semiconductor region |
| | 515 | Ionized molecules |
| | 516 | Including charge neutralization |
| | 517 | Of semiconductor layer on insulating substrate or layer |
| | 518 | Of compound semiconductor |
| | 519 | Including multiple implantation steps |
| | 522 | Including heat treatment |
| | 523 | And contact formation (i.e., metallization) |
| | 524 | Into grooved semiconductor substrate region |
| | 525 | Using oblique beam |
| | 526 | Forming buried region |
| | 527 | Including multiple implantation steps |
| | 530 | Including heat treatment |
| | 531 | Using shadow mask |
| | 532 | Into polycrystalline region |
| | 533 | And contact formation (i.e., metallization) |
| | 535 | By application of corpuscular or electromagnetic radiation (e.g., electron, laser, etc.) |
| | 537 | Fusing dopant with substrate (i.e., alloy junction) |
| | 538 | Using additional material to improve wettability or flow characteristics (e.g., flux, etc.) |
| | 539 | Application of pressure to material during fusion |
| | 540 | Including plural controlled heating or cooling steps or nonuniform heating |
| | 542 | Diffusing a dopant |
| | 543 | To control carrier lifetime (i.e., deep level dopant) |
| | 544 | To solid-state solubility concentration |
| | 545 | Forming partially overlapping regions |
| | 546 | Plural dopants in same region (e.g., through same mask opening, etc.) |
| | 548 | Plural dopants simultaneously in plural regions |
| | 549 | Single dopant forming plural diverse regions (e.g., forming regions of different concentrations or of different depths, etc.) |
| | 550 | Nonuniform heating |
| | 551 | Using multiple layered mask |
| | 553 | Using metal mask |
| | 554 | Outwardly |
| | 555 | Laterally under mask opening |
| | 556 | Edge diffusion by using edge portion of structure other than masking layer to mask |
| | 557 | From melt |
| | 558 | From solid dopant source in contact with semiconductor region |
| | 559 | Using capping layer over dopant source to prevent out-diffusion of dopant |
| | 560 | Plural diffusion stages |
| | 561 | Dopant source within trench or groove |
| | 562 | Organic source |
| | 563 | Glassy source or doped oxide |
| | 564 | Polycrystalline semiconductor source |
| | 565 | From vapor phase |
| | 570 | FORMING SCHOTTKY JUNCTION (I.E., SEMICONDUCTOR-CONDUCTOR RECTIFYING JUNCTION CONTACT) |
| | 571 | Combined with formation of ohmic contact to semiconductor region |
| | 572 | Compound semiconductor |
| | 573 | Multilayer electrode |
| | 574 | T-shaped electrode |
| | 575 | Using platinum group metal (i.e., platinum (Pt), palladium (Pd), rodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof) |
| | 576 | Into grooved or recessed semiconductor region |
| | 580 | Using platinum group metal (i.e., platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof) |
| | 582 | Using refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) |
| | 584 | COATING WITH ELECTRICALLY OR THERMALLY CONDUCTIVE MATERIAL |
| | 585 | Insulated gate formation |
| | 586 | Combined with formation of ohmic contact to semiconductor region |
| | 587 | Forming array of gate electrodes |
| | 589 | Recessed into semiconductor substrate |
| | 590 | Compound semiconductor |
| | 591 | Gate insulator structure constructed of plural layers or nonsilicon containing compound |
| | 592 | Possessing plural conductive layers (e.g., polycide) |
| | 595 | Having sidewall structure |
| | 597 | To form ohmic contact to semiconductive material |
| | 598 | Selectively interconnecting (e.g., customization, wafer scale integration, etc.) |
| | 599 | With electrical circuit layout |
| | 600 | Using structure alterable to conductive state (i.e., antifuse) |
| | 601 | Using structure alterable to nonconductive state (i.e., fuse) |
| | 602 | To compound semiconductor |
| | 607 | With epitaxial conductor formation |
| | 608 | Oxidic conductor (e.g., indium tin oxide, etc.) |
| | 610 | Conductive macromolecular conductor (including metal powder filled composition) |
| | 611 | Beam lead formation |
| | 612 | Forming solder contact or bonding pad |
| | 618 | Contacting multiple semiconductive regions (i.e., interconnects) |
| | 619 | Air bridge structure |
| | 620 | Forming contacts of differing depths into semiconductor substrate |
| | 621 | Contacting diversely doped semiconductive regions (e.g., p-type and n-type regions, etc.) |
| | 622 | Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) |
| | 623 | Including organic insulating material between metal levels |
| | 624 | Separating insulating layer is laminate or composite of plural insulating materials |
| | 625 | At least one metallization level formed of diverse conductive layers |
| | 626 | Planarization |
| | 627 | At least one layer forms a diffusion barrier |
| | 628 | Having adhesion promoting layer |
| | 629 | Diverse conductive layers limited to viahole/plug |
| | 631 | Having planarization step |
| | 632 | Utilizing reflow |
| | 633 | Simultaneously by chemical and mechanical means |
| | 634 | Utilizing etch-stop layer |
| | 635 | Insulator formed by reaction with conductor (e.g., oxidation, etc.) |
| | 636 | Including use of antireflective layer |
| | 637 | With formation of opening (i.e., viahole) in insulative layer |
| | 638 | Having viaholes of diverse width |
| | 639 | Having viahole with sidewall component |
| | 640 | Having viahole of tapered shape |
| | 641 | Selective deposition |
| | 642 | Diverse conductors |
| | 643 | At least one layer forms a diffusion barrier |
| | 644 | Having adhesion promoting layer |
| | 645 | Having planarization step |
| | 647 | Having electrically conductive polysilicon component |
| | 648 | Having refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) |
| | 650 | Having noble group metal (i.e., silver (Ag), gold (Au), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof) |
| | 652 | Plural layered electrode or conductor |
| | 653 | At least one layer forms a diffusion barrier |
| | 654 | Having adhesion promoting layer |
| | 655 | Silicide |
| | 656 | Having refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) |
| | 657 | Having electrically conductive polysilicon component |
| | 658 | Altering composition of conductor |
| | 660 | Including heat treatment of conductive layer |
| | 665 | Utilizing textured surface |
| | 666 | Specified configuration of electrode or contact |
| | 667 | Conductive feedthrough or through-hole in substrate |
| | 668 | Specified aspect ratio of conductor or viahole |
| | 669 | And patterning of conductive layer |
| | 670 | Utilizing lift-off |
| | 671 | Utilizing multilayered mask |
| | 672 | Plug formation (i.e., in viahole) |
| | 673 | Tapered etching |
| | 674 | Selective deposition of conductive layer |
| | 675 | Plug formation (i.e., in viahole) |
| | 676 | Utilizing electromagnetic or wave energy |
| | 677 | Pretreatment of surface to enhance or retard deposition |
| | 678 | Electroless deposition of conductive layer |
| | 679 | Evaporative coating of conductive layer |
| | 680 | Utilizing chemical vapor deposition (i.e., CVD) |
| | 682 | Silicide |
| | 683 | Of refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) |
| | 684 | Electrically conductive polysilicon |
| | 685 | Refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) |
| | 686 | Noble group metal (i.e., silver (Ag), gold (Au), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof) |
| | 687 | Copper of copper alloy conductor |
| | 688 | Aluminum or aluminum alloy conductor |
| | 689 | CHEMICAL ETCHING |
| | 690 | Combined with the removal of material by nonchemical means (e.g., ablating, abrading, etc.) |
| | 694 | Combined with coating step |
| | 695 | Simultaneous etching and coating |
| | 696 | Coating of sidewall |
| | 697 | Planarization by etching and coating |
| | 700 | Formation of groove or trench |
| | 703 | Plural coating steps |
| | 704 | Having liquid and vapor etching steps |
| | 705 | Altering etchability of substrate region by compositional or crystalline modification |
| | 706 | Vapor phase etching (i.e., dry etching) |
| | 707 | Utilizing electromagnetic or wave energy |
| | 708 | Photo-induced etching |
| | 710 | By creating electric field (e.g., plasma, glow discharge, etc.) |
| | 711 | Utilizing multiple gas energizing means |
| | 712 | Reactive ion beam etching (i.e., RIBE) |
| | 713 | Forming tapered profile (e.g., tapered etching, etc.) |
| | 714 | Including change in etch influencing parameter (e.g., energizing power, etchant composition, temperature, etc.) |
| | 715 | With substrate heating or cooling |
| | 716 | With substrate handling (e.g., conveying, etc.) |
| | 717 | Utilizing multilayered mask |
| | 718 | Compound semiconductor |
| | 719 | Silicon |
| | 720 | Electrically conductive material (e.g., metal, conductive oxide, etc.) |
| | 722 | Metal oxide |
| | 723 | Silicon oxide or glass |
| | 724 | Silicon nitride |
| | 725 | Organic material (e.g., resist, etc.) |
| | 726 | Having microwave gas energizing |
| | 729 | Using specified electrode/susceptor configuration (e.g., of multiple substrates using barrel-type susceptor, planar reactor configuration, etc.) to generate plasma |
| | 732 | Using magnet (e.g., electron cyclotron resonance, etc.) |
| | 733 | Using or orientation dependent etchant (i.e., anisotropic etchant) |
| | 734 | Sequential etching steps on a single layer |
| | 735 | Differential etching of semiconductor substrate |
| | 736 | Utilizing multilayered mask |
| | 737 | Substrate possessing multiple layers |
| | 738 | Selectively etching substrate possessing multiple layers of differing etch characteristics |
| | 742 | Electrically conductive material (e.g., metal, conductive oxide, etc.) |
| | 743 | Silicon oxide or glass |
| | 744 | Silicon nitride |
| | 745 | Liquid phase etching |
| | 746 | Utilizing electromagnetic or wave energy |
| | 747 | With relative movement between substrate and confined pool of etchant |
| | 748 | Projection of etchant against a moving substrate or controlling the angle or pattern of projected etchant |
| | 749 | Sequential application of etchant |
| | 752 | Germanium |
| | 753 | Silicon |
| | 754 | Electrically conductive material (e.g., metal, conductive oxide, etc.) |
| | 756 | Silicon oxide |
| | 757 | Silicon nitride |
| | 758 | COATING OF SUBSTRATE CONTAINING SEMICONDUCTOR REGION OR OF SEMICONDUCTOR SUBSTRATE |
| | 759 | Combined with the removal of material by nonchemical means |
| | 760 | Utilizing reflow (e.g., planarization, etc.) |
| | 761 | Multiple layers |
| | 762 | At least one layer formed by reaction with substrate |
| | 763 | Layers formed of diverse composition or by diverse coating processes |
| | 764 | Formation of semi-insulative polycrystalline silicon |
| | 765 | By reaction with substrate |
| | 766 | Implantation of ion (e.g., to form ion amorphousized region prior to selective oxidation, reacting with substrate to form insulative region, etc.) |
| | 767 | Compound semiconductor substrate |
| | 768 | Reaction with conductive region |
| | 769 | Reaction with silicon semiconductive region (e.g., oxynitride formation, etc.) |
| | 778 | Insulative material deposited upon semiconductive substrate |
| | 779 | Compound semiconductor substrate |
| | 780 | Depositing organic material (e.g., polymer, etc.) |
| | 782 | With substrate handling during coating (e.g., immersion, spinning, etc.) |
| | 783 | Insulative material having impurity (e.g., for altering physical characteristics, etc.) |
| | 786 | Tertiary silicon containing compound formation (e.g., oxynitride formation, etc.) |
| | 787 | Silicon oxide formation |
| | 788 | Using electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.) |
| | 790 | Organic reactant |
| | 791 | Silicon nitride formation |
| | 795 | RADIATION OR ENERGY TREATMENT MODIFYING PROPERTIES OF SEMICONDUCTOR REGION OF SUBSTRATE (E.G., THERMAL, CORPUSCULAR, ELECTROMAGNETIC, ETC.) |
| | 796 | Compound semiconductor |
| | 798 | Ionized irradiation (e.g., corpuscular or plasma treatment, etc.) |
| | 799 | By differential heating |
| | 800 | MISCELLANEOUS |
| CROSS-REFERENCE ART COLLECTIONS | ||
| | 900 | BULK EFFECT DEVICE MAKING |
| | 901 | CAPACITIVE JUNCTION |
| | 902 | CAPPING LAYER |
| | 903 | CATALYST AIDED DEPOSITION |
| | 904 | CHARGE CARRIER LIFETIME CONTROL |
| | 905 | CLEANING OF REACTION CHAMBER |
| | 906 | CLEANING OF WAFER AS INTERIM STEP |
| | 907 | CONTINUOUS PROCESSING |
| | 909 | CONTROLLED ATMOSPHERE |
| | 910 | CONTROLLING CHARGING STATE AT SEMICONDUCTOR-INSULATOR INTERFACE |
| | 911 | DIFFERENTIAL OXIDATION AND ETCHING |
| | 912 | DISPLACING PN JUNCTION |
| | 913 | DIVERSE TREATMENTS PERFORMED IN UNITARY CHAMBER |
| | 914 | DOPING |
| | 915 | Amphoteric doping |
| | 916 | Autodoping control or utilization |
| | 917 | Deep level dopants (e.g., gold (Au), chromium (Cr), iron (Fe), nickel (Ni), etc.) |
| | 918 | Special or nonstandard dopant |
| | 919 | Compensation doping |
| | 920 | Controlling diffusion profile by oxidation |
| | 921 | Nonselective diffusion |
| | 922 | Diffusion along grain boundaries |
| | 923 | Diffusion through a layer |
| | 924 | To facilitate selective etching |
| | 925 | Fluid growth doping control (e.g., delta doping, etc.) |
| | 926 | DUMMY METALLIZATION |
| | 927 | ELECTROMIGRATION RESISTANT METALLIZATION |
| | 928 | FRONT AND REAR SURFACE PROCESSING |
| | 929 | EUTECTIC SEMICONDUCTOR |
| | 930 | TERNARY OR QUATERNARY SEMICONDUCTOR COMPRISED OF ELEMENTS FROM THREE DIFFERENT GROUPS (E.G., I-III-V, ETC.) |
| | 931 | SILICON CARBIDE SEMICONDUCTOR |
| | 932 | BORON NITRIDE SEMICONDUCTOR |
| | 933 | GERMANIUM OR SILICON OR GE-SI ON III-V |
| | 934 | SHEET RESISTANCE (I.E., DOPANT PARAMETERS) |
| | 935 | GAS FLOW CONTROL |
| | 936 | GRADED ENERGY GAP |
| | 937 | HILLOCK PREVENTION |
| | 938 | LATTICE STRAIN CONTROL OR UTILIZATION |
| | 939 | LANGMUIR-BLODGETT FILM UTILIZATION |
| | 940 | LASER ABLATIVE MATERIAL REMOVAL |
| | 941 | LOADING EFFECT MITIGATION |
| | 942 | MASKING |
| | 943 | Movable |
| | 944 | Shadow |
| | 945 | Special (e.g., metal, etc.) |
| | 946 | Step and repeat |
| | 947 | Subphotolithographic processing |
| | 948 | Radiation resist |
| | 953 | MAKING RADIATION RESISTANT DEVICE |
| | 954 | MAKING OXIDE-NITRIDE-OXIDE DEVICE |
| | 955 | MELT-BACK |
| | 956 | MAKING MULTIPLE WAVELENGTH EMISSIVE DEVICE |
| | 957 | MAKING METAL-INSULATOR-METAL DEVICE |
| | 958 | PASSIVATION LAYER |
| | 959 | MECHANICAL POLISHING OF WAFER |
| | 960 | POROUS SEMICONDUCTOR |
| | 961 | ION BEAM SOURCE AND GENERATION |
| | 962 | QUANTUM DOTS AND LINES |
| | 963 | REMOVING PROCESS RESIDUES FROM VERTICAL SUBSTRATE SURFACES |
| | 964 | ROUGHENED SURFACE |
| | 965 | SHAPED JUNCTION FORMATION |
| | 966 | SELECTIVE OXIDATION OF ION-AMORPHOUSIZED LAYER |
| | 967 | SEMICONDUCTOR ON SPECIFIED INSULATOR |
| | 968 | SEMICONDUCTOR-METAL-SEMICONDUCTOR |
| | 969 | SIMULTANEOUS FORMATION OF MONOCRYSTALLINE AND POLYCRYSTALLINE REGIONS |
| | 970 | SPECIFIED ETCH STOP MATERIAL |
| | 971 | STOICHIOMETRIC CONTROL OF HOST SUBSTRATE COMPOSITION |
| | 972 | STORED CHARGE ERASURE |
| | 973 | SUBSTRATE ORIENTATION |
| | 974 | SUBSTRATE SURFACE PREPARATION |
| | 975 | SUBSTRATE OR MASK ALIGNING FEATURE |
| | 976 | TEMPORARY PROTECTIVE LAYER |
| | 977 | THINNING OR REMOVAL OF SUBSTRATE |
| | 978 | FORMING TAPERED EDGES ON SUBSTRATE OR ADJACENT LAYERS |
| | 979 | TUNNEL DIODES |
| | 980 | UTILIZING PROCESS EQUIVALENTS OR OPTIONS |
| | 981 | UTILIZING VARYING DIELECTRIC THICKNESS |
| | 982 | VARYING ORIENTATION OF DEVICES IN ARRAY |
| | 983 | ZENER DIODES |
| FOREIGN ART COLLECTIONS | ||
| FOR000 | CLASS-RELATED FOREIGN DOCUMENTS |
| Any foreign patents or non-patent literature from subclasses that have been reclassified have been transferred directly to FOR Collections listed below. These Collections contain ONLY foreign patents or non-patent literature. The parenthetical references in the Collection titles refer to the abolished subclasses from which these Collections were derived. | ||
| METHODS (156/1) |
| FOR100 | Etching of semiconductor precursor, substrates, and devices used in an electrical function (156/625.1) |
| FOR101 | Measuring, testing, or inspecting (156/626.1) |
| FOR103 | Altering the etchability of a substrate by alloying, diffusing, or chemical reacting (156/628.1) |
| FOR104 | With uniting of preforms (e.g., laminating, etc.) (156/629.1) |
| FOR110 | With in situ activation or combining of etching components on surface (156/635.1) |
| FOR111 | With thin film of etchant between relatively moving substrate and conforming surface (e.g., chemical lapping, etc.) (156/636.1) |
| FOR112 | With relative movement between the substrate and a confined pool of etchant (156/637.1) |
| FOR113 | With removal of adhered reaction product from substrate (156/638.1) |
| FOR114 | With substrate rotation, repeated dipping, or advanced movement (156/639.1) |
| FOR115 | Projection of etchant against a moving substrate or controlling the angle or pattern of projected etchant (156/640.1) |
| FOR116 | Recycling or regenerating etchant (156/642.1) |
| FOR117 | With treatment by high energy radiation or plasma (e.g., ion beam, etc.) (156/643.1) |
| FOR118 | Forming or increasing the size of an aperture (156/644.1) |
| FOR119 | With mechanical deformation, severing, or abrading of a substrate (156/ 645.1) |
| FOR120 | Etchant is a gas (156/646.1) |
| FOR121 | Etching according to crystalline planes (156/647.1) |
| FOR122 | Etching isolates or modifies a junction in a barrier layer (156/648.1) |
| FOR124 | Sequential application of etchant material (156/650.1) |
| FOR128 | Differential etching of a substrate (156/654.1) |
| FOR129 | Composite substrate (156/655.1) |
| FOR130 | Substrate contains metallic element or compound (156/656.1) |
| FOR131 | Substrate contains silicon or silicon compound (156/657.1) |
| FOR132 | Resist coating (156/659.11) |
| FOR134 | Silicon, germanium, or gallium containing substrate (156/662.1) |
| FOR135 | MAKING DEVICE HAVING ORGANIC SEMICONDUCTOR COMPONENT (437/1) |
| FOR136 | MAKING DEVICE RESPONSIVE TO RADIATION (437/2) |
| FOR137 | Radiation detectors, e.g., infrared, etc. (437/3) |
| FOR138 | Composed of polycrystalline material (437/4) |
| FOR139 | Having semiconductor compound (437/5) |
| FOR140 | MAKING THYRISTOR, E.G., DIAC, TRIAC, ETC. (437/6) |
| FOR141 | INCLUDING CONTROL RESPONSIVE TO SENSED CONDITION (437/7) |
| FOR142 | INCLUDING TESTING OR MEASURING (437/8) |
| FOR143 | INCLUDING APPLICATION OF VIBRATORY FORCE (437/9) |
| FOR144 | INCLUDING GETTERING (437/10) |
| FOR145 | By ion implanting or irradiating (437/11) |
| FOR146 | By layers which are coated, contacted, or diffused (437/12) |
| FOR147 | By vapor phase surface reaction (437/13) |
| FOR148 | THERMOMIGRATION (437/14) |
| FOR149 | INCLUDING FORMING A SEMICONDUCTOR JUNCTION (437/15) |
| FOR150 | Using energy beam to introduce dopant or modify dopant distribution (437/ 16) |
| FOR151 | Neutron, gamma ray or electron beam (437/17) |
| FOR152 | Ionized molecules (437/18) |
| FOR153 | Coherent light beam (437/19) |
| FOR154 | Ion beam implantation (437/20) |
| FOR155 | Of semiconductor on insulating substrate (437/21) |
| FOR156 | Of semiconductor compound (437/22) |
| FOR158 | Providing nondopant ion including proton (437/24) |
| FOR159 | Providing auxiliary heating (437/25) |
| FOR160 | Forming buried region (437/26) |
| FOR161 | Including multiple implantations of same region (437/27) |
| FOR162 | Through insulating layer (437/28) |
| FOR164 | Using same conductivity type dopant (437/30) |
| FOR165 | Forming bipolar transistor (NPN/PNP) (437/31) |
| FOR168 | Forming complementary MOS (metal oxide semiconductor) (437/34) |
| FOR169 | Using oblique beam (437/35) |
| FOR170 | Using shadow mask (437/36) |
| FOR171 | Having projected range less than thickness of dielectrics on substrate (437/37) |
| FOR172 | Into shaped or grooved semiconductor substrate (437/38) |
| FOR173 | Involving Schottky contact formation (437/39) |
| FOR202 | Gate structure constructed of diverse dielectrics (437/42) |
| FOR203 | Gate surrounded by dielectric layer, e.g., floating gate, etc. (437/43) |
| FOR204 | Adjusting channel dimension (437/44) |
| FOR205 | Active step for controlling threshold voltage (437/45) |
| FOR185 | Self-aligned (437/41 R) |
| FOR186 | With bipolar (437/41 RBP) |
| FOR187 | CMOS (437/41 RCM) |
| FOR188 | Lightly doped drain (437/41 RLD) |
| FOR189 | Memory devices (437/41 RMM) |
| FOR190 | Asymmetrical FET (437/41 AS) |
| FOR191 | Channel specifics (437/41 CS) |
| FOR192 | DMOS/vertical FET (437/41 DM) |
| FOR193 | Gate specifics (437/41 GS) |
| FOR194 | Junction FET/static induction transistor (437/41 JF) |
| FOR195 | Layered channel (437/41 LC) |
| FOR196 | Specifics of metallization/contact (437/41 SM) |
| FOR197 | Recessed gate (Schottky falls below in SH) (437/41 RG) |
| FOR198 | Schottky gate/MESFET (437/41 SH) |
| FOR199 | Sidewall (437/41 SW) |
| FOR200 | Thin film transistor, inverted (437/41 TFI) |
| FOR201 | Thin film transistor (437/41 TFT) |
| FOR174 | Forming pair of device regions separated by gate structure, i.e., FET (437/40 R) |
| FOR175 | Asymmetrical FET (any asymmetry in S/D profile, gate spacing, etc.) (437/40 AS) |
| FOR176 | DMOS/vertical FET (437/40 DM) |
| FOR177 | Gate specific (specifics of gate insulator/structure/material/ contact) (437/40 GS) |
| FOR178 | Junction FET/static induction transistor (437/40 JF) |
| FOR179 | Layered channel (e.g., HEMT, MODFET, 2DEG, heterostructure FETS) (437/40 LC) |
| FOR180 | Recessed gate (437/40 RG) |
| FOR181 | Schottky gate/MESFET (controls over RG) (437/40 SH) |
| FOR182 | Sidewall (not LDDs) (437/40 SW) |
| FOR183 | Thin film transistor inverted/staggered (437/40 TFI) |
| FOR184 | Thin film transistor (437/40 TFT) |
| FOR206 | Into polycrystalline or polyamorphous regions (437/46) |
| FOR207 | Integrating active with passive devices (437/47) |
| FOR208 | Forming plural active devices in grid/array, e.g., RAMS/ROMS, etc. (437/48) |
| FOR210 | Forming electrodes in laterally spaced relationships (437/50) |
| FOR211 | Making assemblies of plural individual devices having community feature, e.g., integrated circuit, electrical connection, etc. (437/51) |
| FOR212 | Memory devices (437/52) |
| FOR213 | Charge coupled devices (CCD) (437/53) |
| FOR214 | Diverse types (437/54) |
| FOR215 | Integrated injection logic (I2L) circuits (437/55) |
| FOR216 | Plural field effect transistors (CMOS) (437/56) |
| FOR217 | Complementary metal oxide having diverse conductivity source and drain regions (437/57) |
| FOR218 | Having like conductivity source and drain regions (437/58) |
| FOR219 | Including field effect transistor (437/59) |
| FOR220 | Including passive device (437/60) |
| FOR221 | Including isolation step (437/61) |
| FOR222 | By forming total dielectric isolation (437/62) |
| FOR223 | By forming vertical isolation combining dielectric and PN junction (437/63) |
| FOR224 | Using vertical dielectric (air-gap/insulator) and horizontal PN junction (437/64) |
| FOR225 | Grooved air-gap only (437/65) |
| FOR227 | Grooved and refilled with insulator (437/67) |
| FOR229 | Recessed oxide by localized oxidation (437/69) |
| FOR234 | Isolation by PN junction only (437/74) |
| FOR240 | Shadow masking (437/80) |
| FOR241 | Doping during fluid growth of semiconductor material on substrate (437/81) |
| FOR242 | Including heat to anneal (437/82) |
| FOR243 | Growing single crystal on amorphous substrate (437/83) |
| FOR244 | Growing single crystal on single crystal insulator (SOS) (437/84) |
| FOR245 | Including purifying stage during growth (437/85) |
| FOR246 | Using transitory substrate (437/86) |
| FOR247 | Using inert atmosphere (437/87) |
| FOR248 | Using catalyst to alter growth process (437/88) |
| FOR249 | Growth through opening (437/89) |
| FOR253 | Specified crystal orientation other than (100) or (111) planes (437/93) |
| FOR254 | Introducing minority carrier life time reducing dopant during growth, i.e., deep level dopant Au (Gold), Cr (Cromium), Fe (Iron), Ni (Nickel), etc. (437/94) |
| FOR255 | Autodoping control (437/95) |
| FOR257 | Forming buried regions with outdiffusion control (437/97) |
| FOR259 | Growing mono and polycrystalline regions simultaneously (437/99) |
| FOR260 | Growing silicon carbide (SiC) (437/100) |
| FOR261 | Growing amorphous semiconductor material (437/101) |
| FOR262 | Source and substrate in close-space relationship (437/102) |
| FOR263 | Group IV elements (437/103) |
| FOR264 | Compound formed from Group III and Group V elements (437/104) |
| FOR265 | Vacuum growing using molecular beam, i.e., vacuum deposition (437/105) |
| FOR266 | Group IV elements (437/106) |
| FOR267 | Compound formed from Group III and Group V elements (437/107) |
| FOR268 | Growing single layer in multi-steps (437/108) |
| FOR269 | Polycrystalline layers (437/109) |
| FOR270 | Using modulated dopants or materials, e.g., superlattice, etc. (437/110) |
| FOR271 | Using preliminary or intermediate metal layer (437/111) |
| FOR272 | Growing by varying rates (437/112) |
| FOR273 | Using electric current, e.g., Peltier effect, glow discharge, etc. (437/ 113) |
| FOR274 | Using seed in liquid phase (437/114) |
| FOR277 | Liquid and vapor phase epitaxy in sequence (437/117) |
| FOR278 | Involving capillary action (437/118) |
| FOR279 | Sliding liquid phase epitaxy (437/119) |
| FOR280 | Modifying melt composition (437/120) |
| FOR281 | Controlling volume or thickness of growth (437/121) |
| FOR282 | Preliminary dissolving substrate surface (437/122) |
| FOR283 | With nonlinear slide movement (437/123) |
| FOR284 | One melt simultaneously contacting plural substrates (437/124) |
| FOR285 | Tipping liquid phase epitaxy (437/125) |
| FOR286 | Heteroepitaxy (437/126) |
| FOR287 | Multi-color light emitting diode (LED) (437/127) |
| FOR288 | Graded composition (437/128) |
| FOR289 | Forming laser (437/129) |
| FOR290 | By liquid phase epitaxy (437/130) |
| FOR291 | Si (Silicon on Ge (Germanium) or Ge (Germanium) on Si (Silicon) (437/131) |
| FOR292 | Either Si (Silicon) or Ge (Germanium) layered with or on compound formed from Group III and Group V elements (437/132) |
| FOR293 | Compound formed from Group III and Group V elements on diverse Group III and Group V including substituted Group III and Group V compounds (437/133) |
| FOR294 | By fusing dopant with substrate, e.g., alloying, etc. (437/134) |
| FOR295 | Using flux (437/135) |
| FOR296 | Passing electric current through material (437/136) |
| FOR297 | With application of pressure to material during fusing (437/137) |
| FOR298 | Including plural controlled heating or cooling steps (437/138) |
| FOR299 | Including diffusion after fusion step (437/139) |
| FOR300 | Including additional material to improve wettability or flow characteristics (437/140) |
| FOR301 | Diffusing a dopant (437/141) |
| FOR302 | To control carrier lifetime, i.e., deep level dopant Au (Gold), Cr (Chromium), Fe (Iron), Ni (Nickel), etc. (437/142) |
| FOR303 | Al (Aluminum) dopant (437/143) |
| FOR304 | Li (Lithium) dopant (437/144) |
| FOR305 | Including nonuniform heating (437/145) |
| FOR306 | To solid state solubility concentration (437/146) |
| FOR307 | Using multiple layered mask (437/147) |
| FOR309 | Forming partially overlapping regions (437/149) |
| FOR310 | Plural dopants in same region, e.g., through same mask opening, etc. (437/150) |
| FOR312 | Plural dopants simultaneously in plural region (437/152) |
| FOR313 | Single dopant forming plural diverse regions (437/153) |
| FOR315 | Using metal mask (437/155) |
| FOR316 | Outwardly (437/156) |
| FOR317 | Laterally under mask (437/157) |
| FOR318 | Edge diffusion by using edge portion of structure other than masking layer to mask (437/158) |
| FOR319 | From melt (437/159) |
| FOR320 | From solid dopant source in contact with substrate (437/160) |
| FOR321 | Using capping layer over dopant source to prevent outdiffusion of dopant (437/161) |
| FOR322 | Polycrystalline semiconductor source (437/162) |
| FOR323 | Organic source (437/163) |
| FOR324 | Glassy source or doped oxide (437/164) |
| FOR325 | From vapor phase (437/165) |
| FOR330 | DIRECTLY APPLYING ELECTRICAL CURRENT (437/170) |
| FOR333 | APPLYING CORPUSCULAR OR ELECTROMAGNETIC ENERGY (437/173) |
| FOR335 | FORMING SCHOTTKY CONTACT (437/175) |
| FOR336 | On semiconductor compound (437/176) |
| FOR338 | Using platinum group silicide, i.e., silicide of Pt (Platinum), Pd (Palladium), Rh (Rhodium), Ru (Ruthenium), Ir (Iridium), Os (Osmium) (437/178) |
| FOR339 | Using metal, i.e., Pt (Platinum), Pd (Palladium), Rh (Rhodium), Ru (Ruthenium), Ir (Iridium), Os (Osmium), Au (Gold), Ag (Silver) (437/179) |
| FOR340 | MAKING OR ATTACHING ELECTRODE ON OR TO SEMICONDUCTOR, OR SECURING COMPLETED SEMICONDUCTOR TO MOUNTING OR HOUSING (437/180) |