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| Class Numbers & Titles | Class Numbers Only | USPC Index | International | HELP |
| You are viewing a USPC Schedule. |
| Class 257 | ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES) |
| Click here for a printable version of this file | |
| When placing a mandatory classification in Class 257, a cross-reference classification is normally made in at least one of the appended E-subclasses. | ||
![]() | ![]() | 1 | BULK EFFECT DEVICE |
![]() | ![]() | 2 | Bulk effect switching in amorphous material |
![]() | ![]() | 3 | With means to localize region of conduction (e.g., "pore" structure) |
![]() | ![]() | 4 | With specified electrode composition or configuration |
![]() | ![]() | 5 | In array |
![]() | ![]() | 6 | Intervalley transfer (e.g., Gunn effect) |
![]() | ![]() | 9 | THIN ACTIVE PHYSICAL LAYER WHICH IS (1) AN ACTIVE POTENTIAL WELL LAYER THIN ENOUGH TO ESTABLISH DISCRETE QUANTUM ENERGY LEVELS OR (2) AN ACTIVE BARRIER LAYER THIN ENOUGH TO PERMIT QUANTUM MECHANICAL TUNNELING OR (3) AN ACTIVE LAYER THIN ENOUGH TO PERMIT CARRIER TRANSMISSION WITH SUBSTANTIALLY NO SCATTERING (E.G., SUPERLATTICE QUANTUM WELL, OR BALLISTIC TRANSPORT DEVICE) |
![]() | ![]() | 10 | Low workfunction layer for electron emission (e.g., photocathode electron emissive layer) |
![]() | ![]() | 12 | Heterojunction |
![]() | ![]() | 13 | Incoherent light emitter |
![]() | ![]() | 14 | Quantum well |
![]() | ![]() | 15 | Superlattice |
![]() | ![]() | 16 | Of amorphous semiconductor material |
![]() | ![]() | 17 | With particular barrier dimension |
![]() | ![]() | 18 | Strained layer superlattice |
![]() | ![]() | 20 | Field effect device |
![]() | ![]() | 21 | Light responsive structure |
![]() | ![]() | 22 | With specified semiconductor materials |
![]() | ![]() | 23 | Current flow across well |
![]() | ![]() | 24 | Field effect device |
![]() | ![]() | 25 | Employing resonant tunneling |
![]() | ![]() | 26 | Ballistic transport device |
![]() | ![]() | 28 | Non-heterojunction superlattice (e.g., doping superlattice or alternating metal and insulator layers) |
![]() | ![]() | 29 | Ballistic transport device (e.g., hot electron transistor) |
![]() | ![]() | 30 | Tunneling through region of reduced conductivity |
![]() | ![]() | 31 | Josephson |
![]() | ![]() | 32 | Particular electrode material |
![]() | ![]() | 34 | Weak link (e.g., narrowed portion of superconductive line) |
![]() | ![]() | 35 | Particular barrier material |
![]() | ![]() | 36 | With additional electrode to control conductive state of Josephson junction |
![]() | ![]() | 37 | At least one electrode layer of semiconductor material |
![]() | ![]() | 39 | Three or more electrode device |
![]() | ![]() | 40 | ORGANIC SEMICONDUCTOR MATERIAL |
![]() | ![]() | 41 | POINT CONTACT DEVICE |
![]() | ![]() | 42 | SEMICONDUCTOR IS SELENIUM OR TELLURIUM IN ELEMENTAL FORM |
![]() | ![]() | 43 | SEMICONDUCTOR IS AN OXIDE OF A METAL (E.G., CUO, ZNO) OR COPPER SULFIDE |
![]() | ![]() | 44 | WITH METAL CONTACT ALLOYED TO ELEMENTAL SEMICONDUCTOR TYPE PN JUNCTION IN NONREGENERATIVE STRUCTURE |
![]() | ![]() | 45 | Elongated alloyed region (e.g., thermal gradient zone melting, TGZM) |
![]() | ![]() | 46 | In pn junction tunnel diode (Esaki diode) |
![]() | ![]() | 47 | In bipolar transistor structure |
![]() | ![]() | 48 | TEST OR CALIBRATION STRUCTURE |
![]() | ![]() | 49 | NON-SINGLE CRYSTAL, OR RECRYSTALLIZED, SEMICONDUCTOR MATERIAL FORMS PART OF ACTIVE JUNCTION (INCLUDING FIELD-INDUCED ACTIVE JUNCTION) |
![]() | ![]() | 50 | Non-single crystal, or recrystallized, active junction adapted to be electrically shorted (e.g., "anti-fuse" element) |
![]() | ![]() | 51 | Non-single crystal, or recrystallized, material forms active junction with single crystal material (e.g., monocrystal to polycrystal pn junction or heterojunction) |
![]() | ![]() | 52 | Amorphous semiconductor material |
![]() | ![]() | 53 | Responsive to nonelectrical external signals (e.g., light) |
![]() | ![]() | 54 | With Schottky barrier to amorphous material |
![]() | ![]() | 55 | Amorphous semiconductor is alloy or contains material to change band gap (e.g., Si x Ge 1-x , SiN y ) |
![]() | ![]() | 56 | With impurity other than hydrogen to passivate dangling bonds (e.g., halide) |
![]() | ![]() | 57 | Field effect device in amorphous semiconductor material |
![]() | ![]() | 58 | With impurity other than hydrogen to passivate dangling bonds (e.g., halide) |
![]() | ![]() | 59 | In array having structure for use as imager or display, or with transparent electrode |
![]() | ![]() | 60 | With field electrode under or on a side edge of amorphous semiconductor material (e.g., vertical current path) |
![]() | ![]() | 61 | With heavily doped regions contacting amorphous semiconductor material (e.g., heavily doped source and drain) |
![]() | ![]() | 62 | With impurity other than hydrogen to passivate dangling bonds (e.g., halide) |
![]() | ![]() | 63 | Amorphous semiconductor is alloy or contains material to change band gap (e.g., Si x Ge 1-x , SiN y ) |
![]() | ![]() | 64 | Non-single crystal, or recrystallized, material with specified crystal structure (e.g., specified crystal size or orientation) |
![]() | ![]() | 65 | Non-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., Ge x Si 1- x, polycrystalline silicon with dangling bond modifier) |
![]() | ![]() | 66 | Field effect device in non-single crystal, or recrystallized, Semiconductor material |
![]() | ![]() | 67 | In combination with device formed in single crystal semiconductor material (e.g., stacked FETs) |
![]() | ![]() | 68 | Capacitor element in single crystal semiconductor (e.g., DRAM) |
![]() | ![]() | 69 | Field effect transistor in single crystal material, complementary to that in non-single crystal, or recrystallized, material (e.g., CMOS) |
![]() | ![]() | 70 | Recrystallized semiconductor material |
![]() | ![]() | 71 | In combination with capacitor element (e.g., DRAM) |
![]() | ![]() | 72 | In array having structure for use as imager or display, or with transparent electrode |
![]() | ![]() | 73 | Schottky barrier to polycrystalline semiconductor material |
![]() | ![]() | 74 | Plural recrystallized semiconductor layers (e.g., "3-dimensional integrated circuit") |
![]() | ![]() | 75 | Recrystallized semiconductor material |
![]() | ![]() | 76 | SPECIFIED WIDE BAND GAP (1.5EV) SEMICONDUCTOR MATERIAL OTHER THAN GAASP OR GAALAS |
![]() | ![]() | 79 | INCOHERENT LIGHT EMITTER STRUCTURE |
![]() | ![]() | 80 | In combination with or also constituting light responsive device |
![]() | ![]() | 81 | With specific housing or contact structure |
![]() | ![]() | 83 | Light coupled transistor structure |
![]() | ![]() | 84 | Combined in integrated structure |
![]() | ![]() | 86 | Active layer of indirect band gap semiconductor |
![]() | ![]() | 87 | With means to facilitate electron-hole recombination (e.g., isoelectronic traps such as nitrogen in GaP) |
![]() | ![]() | 88 | Plural light emitting devices (e.g., matrix, 7-segment array) |
![]() | ![]() | 89 | Multi-color emission |
![]() | ![]() | 91 | With shaped contacts or opaque masking |
![]() | ![]() | 92 | Alphanumeric segmented array |
![]() | ![]() | 93 | With electrical isolation means in integrated circuit structure |
![]() | ![]() | 94 | With heterojunction |
![]() | ![]() | 95 | With contoured external surface (e.g., dome shape to facilitate light emission) |
![]() | ![]() | 96 | Plural heterojunctions in same device |
![]() | ![]() | 99 | With housing or contact structure |
![]() | ![]() | 100 | Encapsulated |
![]() | ![]() | 101 | With particular dopant concentration or concentration profile (e.g., graded junction) |
![]() | ![]() | 102 | With particular dopant material (e.g., zinc as dopant in GaAs) |
![]() | ![]() | 103 | With particular semiconductor material |
![]() | ![]() | 104 | TUNNELING PN JUNCTION (E.G., ESAKI DIODE) DEVICE |
![]() | ![]() | 105 | In three or more terminal device |
![]() | ![]() | 106 | Reverse bias tunneling structure (e.g., "backward" diode, true Zener diode) |
![]() | ![]() | 107 | REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR, COMFET, THYRISTOR) |
![]() | ![]() | 108 | Controlled by nonelectrical, nonoptical external signal (e.g., magnetic field, pressure, thermal) |
![]() | ![]() | 109 | Having only two terminals and no control electrode (gate), e.g., Shockley diode |
![]() | ![]() | 110 | More than four semiconductor layers of alternating conductivity types (e.g., pnpnpn structure, 5 layer bidirectional diacs, etc.) |
![]() | ![]() | 111 | Triggered by V BO overvoltage means |
![]() | ![]() | 112 | With highly-doped breakdown diode trigger |
![]() | ![]() | 113 | With light activation |
![]() | ![]() | 114 | With separate light detector integrated on chip with regenerative switching device |
![]() | ![]() | 115 | With electrical trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.) |
![]() | ![]() | 116 | With light conductor means (e.g., light fiber or light pipe) integral with device or device enclosure or package |
![]() | ![]() | 118 | With groove or thinned light sensitive portion |
![]() | ![]() | 119 | Bidirectional rectifier with control electrode (gate) (e.g., Triac) |
![]() | ![]() | 120 | Six or more semiconductor layers of alternating conductivity types (e.g., npnpnpn structure) |
![]() | ![]() | 121 | With diode or transistor in reverse path |
![]() | ![]() | 122 | Lateral |
![]() | ![]() | 123 | With trigger signal amplification (e.g., amplified gate) |
![]() | ![]() | 124 | Combined with field effect transistor structure |
![]() | ![]() | 126 | With means to separate a device into sections having different conductive polarity |
![]() | ![]() | 128 | Having overlapping sections of different conductive polarity |
![]() | ![]() | 129 | With means to increase reverse breakdown voltage |
![]() | ![]() | 130 | Switching speed enhancement means |
![]() | ![]() | 132 | Five or more layer unidirectional structure |
![]() | ![]() | 133 | Combined with field effect transistor |
![]() | ![]() | 134 | J-FET (junction field effect transistor) |
![]() | ![]() | 137 | Having controllable emitter shunt |
![]() | ![]() | 139 | With extended latchup current level (e.g., COMFET device) |
![]() | ![]() | 140 | Combined with other solid-state active device in integrated structure |
![]() | ![]() | 141 | Lateral structure, i.e., current flow parallel to main device surface |
![]() | ![]() | 142 | Having impurity doping for gain reduction |
![]() | ![]() | 143 | Having anode shunt means |
![]() | ![]() | 144 | Cathode emitter or cathode electrode feature |
![]() | ![]() | 145 | Low impedance channel contact extends below surface |
![]() | ![]() | 146 | Combined with other solid-state active device in integrated structure |
![]() | ![]() | 147 | With extended latchup current level (e.g., gate turn off "GTO" device) |
![]() | ![]() | 148 | Having impurity doping for gain reduction |
![]() | ![]() | 149 | Having anode shunt means |
![]() | ![]() | 150 | With specified housing or external terminal |
![]() | ![]() | 152 | Cathode emitter or cathode electrode feature |
![]() | ![]() | 153 | Gate region or electrode feature |
![]() | ![]() | 154 | With resistive region connecting separate sections of device |
![]() | ![]() | 155 | With switching speed enhancement means (e.g., Schottky contact) |
![]() | ![]() | 157 | With integrated trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.) |
![]() | ![]() | 158 | Three or more amplification stages |
![]() | ![]() | 159 | Transistor as amplifier |
![]() | ![]() | 160 | With distributed amplified current |
![]() | ![]() | 161 | With a turn-off diode |
![]() | ![]() | 162 | Lateral structure |
![]() | ![]() | 163 | Emitter region feature |
![]() | ![]() | 167 | Having at least four external electrodes |
![]() | ![]() | 168 | With means to increase breakdown voltage |
![]() | ![]() | 172 | With means to lower "ON" voltage drop |
![]() | ![]() | 173 | Device protection (e.g., from overvoltage) |
![]() | ![]() | 175 | With means to control triggering (e.g., gate electrode configuration, Zener diode firing, dV/Dt control, transient control by ferrite bead, etc.) |
![]() | ![]() | 177 | With housing or external electrode |
![]() | ![]() | 178 | With means to avoid stress between electrode and active device (e.g., thermal expansion matching of electrode to semiconductor) |
![]() | ![]() | 180 | Stud mount |
![]() | ![]() | 181 | With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, (e.g., ring) |
![]() | ![]() | 183 | HETEROJUNCTION DEVICE |
![]() | ![]() | 183.1 | Charge transfer device |
![]() | ![]() | 184 | Light responsive structure |
![]() | ![]() | 185 | Staircase (including graded composition) device |
![]() | ![]() | 186 | Avalanche photodetection structure |
![]() | ![]() | 187 | Having transistor structure |
![]() | ![]() | 188 | Having narrow energy band gap (<<1eV) layer (e.g., PbSnTe, HgCdTe, etc.) |
![]() | ![]() | 190 | With lattice constant mismatch (e.g., with buffer layer to accommodate mismatch) |
![]() | ![]() | 191 | Having graded composition |
![]() | ![]() | 192 | Field effect transistor |
![]() | ![]() | 194 | Doping on side of heterojunction with lower carrier affinity (e.g., high electron mobility transistor (HEMT)) |
![]() | ![]() | 196 | Both semiconductors of the heterojunction are the same conductivity type (i.e., either n or p) |
![]() | ![]() | 197 | Bipolar transistor |
![]() | ![]() | 199 | Avalanche diode (e.g., so-called "Zener" diode having breakdown voltage greater than 6 volts, including heterojunction IMPATT type microwave diodes) |
![]() | ![]() | 201 | Between different group IV-VI or II-VI or III-V compounds other than GaAs/GaAlAs |
![]() | ![]() | 202 | GATE ARRAYS |
![]() | ![]() | 203 | With particular chip input/output means |
![]() | ![]() | 204 | Having specific type of active device (e.g., CMOS) |
![]() | ![]() | 205 | With bipolar transistors or with FETs of only one channel conductivity type (e.g., enhancement-depletion FETs) |
![]() | ![]() | 206 | Particular layout of complementary FETs with regard to each other |
![]() | ![]() | 207 | With particular power supply distribution means |
![]() | ![]() | 208 | With particular signal path connections |
![]() | ![]() | 212 | CONDUCTIVITY MODULATION DEVICE (E.G., UNIJUNCTION TRANSISTOR, DOUBLE-BASE DIODE, CONDUCTIVITY-MODULATED TRANSISTOR) |
![]() | ![]() | 213 | FIELD EFFECT DEVICE |
![]() | ![]() | 214 | Charge injection device |
![]() | ![]() | 215 | Charge transfer device |
![]() | ![]() | 216 | Majority signal carrier (e.g., buried or bulk channel, or peristaltic) |
![]() | ![]() | 217 | Having a conductive means in direct contact with channel (e.g., non-insulated gate) |
![]() | ![]() | 219 | Impurity concentration variation |
![]() | ![]() | 220 | Vertically within channel (e.g., profiled) |
![]() | ![]() | 221 | Along the length of the channel (e.g., doping variations for transfer directionality) |
![]() | ![]() | 222 | Responsive to non-electrical external signal (e.g., imager) |
![]() | ![]() | 224 | Channel confinement |
![]() | ![]() | 225 | Non-electrical input responsive (e.g., light responsive imager, input programmed by size of storage sites for use as a read-only memory, etc.) |
![]() | ![]() | 226 | Sensor element and charge transfer device are of different materials or on different substrates (e.g., "hybrid") |
![]() | ![]() | 227 | With specified dopant (e.g., photoionizable, "extrinsic" detectors for infrared) |
![]() | ![]() | 228 | Light responsive, back illuminated |
![]() | ![]() | 229 | Having structure to improve output signal (e.g., exposure control structure) |
![]() | ![]() | 231 | 2-dimensional area architecture |
![]() | ![]() | 232 | Having alternating strips of sensor structures and register structures (e.g., interline imager) |
![]() | ![]() | 233 | Sensors not overlaid by electrode (e.g., photodiodes) |
![]() | ![]() | 234 | Single strip of sensors (e.g., linear imager) |
![]() | ![]() | 235 | Electrical input |
![]() | ![]() | 236 | Signal applied to field effect electrode |
![]() | ![]() | 238 | Input signal responsive to signal charge in charge transfer device (e.g., regeneration or feedback) |
![]() | ![]() | 239 | Signal charge detection type (e.g., floating diffusion or floating gate non-destructive output) |
![]() | ![]() | 240 | Changing width or direction of channel (e.g., meandering channel) |
![]() | ![]() | 241 | Multiple channels (e.g., converging or diverging or parallel channels) |
![]() | ![]() | 242 | Vertical charge transfer |
![]() | ![]() | 243 | Channel confinement |
![]() | ![]() | 244 | Comprising a groove |
![]() | ![]() | 245 | Structure for applying electric field into device (e.g., resistive electrode, acoustic traveling wave in channel) |
![]() | ![]() | 246 | Phase structure (e.g., doping variations to provide asymmetry for 2-phase operation; more than four phases or "electrode per bit") |
![]() | ![]() | 249 | Electrode structures or materials |
![]() | ![]() | 251 | Substantially incomplete signal charge transfer (e.g., bucket brigade) |
![]() | ![]() | 252 | Responsive to non-optical, non-electrical signal |
![]() | ![]() | 253 | Chemical (e.g., ISFET, CHEMFET) |
![]() | ![]() | 254 | Physical deformation (e.g., strain sensor, acoustic wave detector) |
![]() | ![]() | 255 | With current flow along specified crystal axis (e.g., axis of maximum carrier mobility) |
![]() | ![]() | 256 | Junction field effect transistor (unipolar transistor) |
![]() | ![]() | 257 | Light responsive or combined with light responsive device |
![]() | ![]() | 259 | Elongated active region acts as transmission line or distributed active element (e.g., "transmission line" field effect transistor) |
![]() | ![]() | 260 | Same channel controlled by both junction and insulated gate electrodes, or by both Schottky barrier and pn junction gates (e.g., "taper isolated" memory cell) |
![]() | ![]() | 261 | Junction gate region free of direct electrical connection (e.g., floating junction gate memory cell structure) |
![]() | ![]() | 262 | Combined with insulated gate field effect transistor (IGFET) |
![]() | ![]() | 263 | Vertical controlled current path |
![]() | ![]() | 264 | Enhancement mode or with high resistivity channel (e.g., doping of 10 15 cm -3 or less) |
![]() | ![]() | 265 | In integrated circuit |
![]() | ![]() | 266 | With multiple parallel current paths (e.g., grid gate) |
![]() | ![]() | 268 | Enhancement mode |
![]() | ![]() | 270 | Plural, separately connected, gates control same channel region |
![]() | ![]() | 271 | Load element or constant current source (e.g., with source to gate connection) |
![]() | ![]() | 272 | Junction field effect transistor in integrated circuit |
![]() | ![]() | 273 | With bipolar device |
![]() | ![]() | 274 | Complementary junction field effect transistors |
![]() | ![]() | 275 | Microwave integrated circuit (e.g., microstrip type) |
![]() | ![]() | 276 | With contact or heat sink extending through hole in semiconductor substrate, or with electrode suspended over substrate (e.g., air bridge) |
![]() | ![]() | 277 | With capacitive or inductive elements |
![]() | ![]() | 278 | With devices vertically spaced in different layers of semiconductor material (e.g., "3-dimensional" integrated circuit) |
![]() | ![]() | 279 | Pn junction gate in compound semiconductor material (e.g., GaAs) |
![]() | ![]() | 280 | With Schottky gate |
![]() | ![]() | 281 | Schottky gate to silicon semiconductor |
![]() | ![]() | 282 | Gate closely aligned to source region |
![]() | ![]() | 284 | Schottky gate in groove |
![]() | ![]() | 285 | With profiled channel dopant concentration or profiled gate region dopant concentration (e.g., maximum dopant concentration below surface) |
![]() | ![]() | 286 | With non-uniform channel thickness or width |
![]() | ![]() | 287 | With multiple channels or channel segments connected in parallel, or with channel much wider than length between source and drain (e.g., power JFET) |
![]() | ![]() | 288 | Having insulated electrode (e.g., MOSFET, MOS diode) |
![]() | ![]() | 289 | Significant semiconductor chemical compound in bulk crystal (e.g., GaAs) |
![]() | ![]() | 290 | Light responsive or combined with light responsive device |
![]() | ![]() | 295 | With ferroelectric material layer |
![]() | ![]() | 296 | Insulated gate capacitor or insulated gate transistor combined with capacitor (e.g., dynamic memory cell) |
![]() | ![]() | 297 | With means for preventing charge leakage due to minority carrier generation (e.g., alpha generated soft error protection or "dark current" leakage protection) |
![]() | ![]() | 298 | Capacitor for signal storage in combination with non-volatile storage means |
![]() | ![]() | 299 | Structure configured for voltage converter (e.g., charge pump, substrate bias generator) |
![]() | ![]() | 300 | Capacitor coupled to, or forms gate of, insulated gate field effect transistor (e.g., non-destructive readout dynamic memory cell structure) |
![]() | ![]() | 301 | Capacitor in trench |
![]() | ![]() | 302 | Vertical transistor |
![]() | ![]() | 303 | Stacked capacitor |
![]() | ![]() | 304 | Storage node isolated by dielectric from semiconductor substrate |
![]() | ![]() | 305 | With means to insulate adjacent storage nodes (e.g., channel stops or field oxide) |
![]() | ![]() | 306 | Stacked capacitor |
![]() | ![]() | 307 | Parallel interleaved capacitor electrode pairs (e.g., interdigitized) |
![]() | ![]() | 308 | With capacitor electrodes connection portion located centrally thereof (e.g., fin electrodes with central post) |
![]() | ![]() | 309 | With increased effective electrode surface area (e.g., tortuous path, corrugated, or textured electrodes) |
![]() | ![]() | 310 | With high dielectric constant insulator (e.g., Ta 2 O 5 ) |
![]() | ![]() | 311 | Storage Node isolated by dielectric from semiconductor substrate |
![]() | ![]() | 312 | Voltage variable capacitor (i. e., capacitance varies with applied voltage) |
![]() | ![]() | 313 | Inversion layer capacitor |
![]() | ![]() | 314 | Variable threshold (e.g., floating gate memory device) |
![]() | ![]() | 315 | With floating gate electrode |
![]() | ![]() | 316 | With additional contacted control electrode |
![]() | ![]() | 317 | With irregularities on electrode to facilitate charging or discharging of floating electrode |
![]() | ![]() | 318 | Additional control electrode is doped region in semiconductor substrate |
![]() | ![]() | 319 | Plural additional contacted control electrodes |
![]() | ![]() | 321 | With thin insulator region for charging or discharging floating electrode by quantum mechanical tunneling |
![]() | ![]() | 322 | With charging or discharging by control voltage applied to source or drain region (e.g., by avalanche breakdown of drain junction) |
![]() | ![]() | 323 | With means to facilitate light erasure |
![]() | ![]() | 324 | Multiple insulator layers (e.g., MNOS structure) |
![]() | ![]() | 327 | Short channel insulated gate field effect transistor |
![]() | ![]() | 328 | Vertical channel or double diffused insulated gate field effect device provided with means to protect against excess voltage (e.g., gate protection diode) |
![]() | ![]() | 329 | Gate controls vertical charge flow portion of channel (e.g., VMOS device) |
![]() | ![]() | 335 | Active channel region has a graded dopant concentration decreasing with distance from source region (e.g., double diffused device, DMOS transistor) |
![]() | ![]() | 336 | With lightly doped portion of drain region adjacent channel (e.g., LDD structure) |
![]() | ![]() | 337 | In integrated circuit structure |
![]() | ![]() | 339 | With means to increase breakdown voltage |
![]() | ![]() | 340 | With means (other than self-alignment of the gate electrode) to decrease gate capacitance (e.g., shield electrode) |
![]() | ![]() | 341 | Plural sections connected in parallel (e.g., power MOSFET) |
![]() | ![]() | 343 | All contacts on same surface (e.g., lateral structure) |
![]() | ![]() | 344 | With lightly doped portion of drain region adjacent channel (e.g., LDD structure) |
![]() | ![]() | 345 | With means to prevent sub-surface currents, or with non-uniform channel doping |
![]() | ![]() | 346 | Gate electrode overlaps the source or drain by no more than depth of source or drain (e.g., self-aligned gate) |
![]() | ![]() | 347 | Single crystal semiconductor layer on insulating substrate (SOI) |
![]() | ![]() | 348 | Depletion mode field effect transistor |
![]() | ![]() | 349 | With means (e.g., a buried channel stop layer) to prevent leakage current along the interface of the semiconductor layer and the insulating substrate |
![]() | ![]() | 350 | Insulated electrode device is combined with diverse type device (e.g., complementary MOSFETs, FET with resistor, etc.) |
![]() | ![]() | 351 | Complementary field effect transistor structures only (i.e., not including bipolar transistors, resistors, or other components) |
![]() | ![]() | 352 | Substrate is single crystal insulator (e.g., sapphire or spinel) |
![]() | ![]() | 355 | With overvoltage protective means |
![]() | ![]() | 356 | For protecting against gate insulator breakdown |
![]() | ![]() | 364 | With resistive gate electrode |
![]() | ![]() | 365 | With plural, separately connected, gate electrodes in same device |
![]() | ![]() | 367 | Insulated gate controlled breakdown of pn junction (e.g., field plate diode) |
![]() | ![]() | 368 | Insulated gate field effect transistor in integrated circuit |
![]() | ![]() | 369 | Complementary insulated gate field effect transistors |
![]() | ![]() | 370 | Combined with bipolar transistor |
![]() | ![]() | 371 | Complementary transistors in wells of opposite conductivity types more heavily doped than the substrate region in which they are formed, e.g., twin wells |
![]() | ![]() | 372 | With means to prevent latchup or parasitic conduction channels |
![]() | ![]() | 373 | With pn junction to collect injected minority carriers to prevent parasitic bipolar transistor action |
![]() | ![]() | 374 | Dielectric isolation means (e.g., dielectric layer in vertical grooves) |
![]() | ![]() | 375 | With means to reduce substrate spreading resistance (e.g., heavily doped substrate) |
![]() | ![]() | 377 | With polysilicon interconnections to source or drain regions (e.g., polysilicon laminated with silicide) |
![]() | ![]() | 378 | Combined with bipolar transistor |
![]() | ![]() | 379 | Combined with passive components (e.g., resistors) |
![]() | ![]() | 382 | With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide) |
![]() | ![]() | 383 | Contact of refractory or platinum group metal (e.g., molybdenum, tungsten, or titanium) |
![]() | ![]() | 384 | Including silicide |
![]() | ![]() | 385 | Multiple polysilicon layers |
![]() | ![]() | 386 | With means to reduce parasitic capacitance |
![]() | ![]() | 387 | Gate electrode overlaps at least one of source or drain by no more than depth of source or drain (e.g., self-aligned gate) |
![]() | ![]() | 389 | With thick insulator over source or drain region |
![]() | ![]() | 390 | Matrix or array of field effect transistors (e.g., array of FETs only some of which are completed, or structure for mask programmed read-only memory (ROM)) |
![]() | ![]() | 391 | Selected groups of complete field effect devices having different threshold voltages (e.g., different channel dopant concentrations) |
![]() | ![]() | 392 | Insulated gate field effect transistors of different threshold voltages in same integrated circuit (e.g., enhancement and depletion mode) |
![]() | ![]() | 393 | Insulated gate field effect transistor adapted to function as load element for switching insulated gate field effect transistor |
![]() | ![]() | 394 | With means to prevent parasitic conduction channels |
![]() | ![]() | 395 | Thick insulator portion |
![]() | ![]() | 400 | With heavily doped channel stop portion |
![]() | ![]() | 401 | With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET) |
![]() | ![]() | 402 | With permanent threshold adjustment (e.g., depletion mode) |
![]() | ![]() | 403 | With channel conductivity dopant same type as that of source and drain |
![]() | ![]() | 405 | With gate insulator containing specified permanent charge |
![]() | ![]() | 407 | With gate electrode of controlled workfunction material (e.g., low workfunction gate material) |
![]() | ![]() | 408 | Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, LDD device) |
![]() | ![]() | 409 | With means to increase breakdown voltage (e.g., field shield electrode, guard ring, etc.) |
![]() | ![]() | 410 | Gate insulator includes material (including air or vacuum) other than SiO 2 |
![]() | ![]() | 412 | Gate electrode of refractory material (e.g., polysilicon or a silicide of a refractory or platinum group metal) |
![]() | ![]() | 414 | RESPONSIVE TO NON-ELECTRICAL SIGNAL (E.G., CHEMICAL, STRESS, LIGHT, OR MAGNETIC FIELD SENSORS) |
![]() | ![]() | 415 | Physical deformation |
![]() | ![]() | 416 | Acoustic wave |
![]() | ![]() | 417 | Strain sensors |
![]() | ![]() | 420 | Means to reduce sensitivity to physical deformation |
![]() | ![]() | 421 | Magnetic field |
![]() | ![]() | 422 | With magnetic field directing means (e.g., shield, pole piece, etc.) |
![]() | ![]() | 423 | Bipolar transistor magnetic field sensor (e.g., lateral bipolar transistor) |
![]() | ![]() | 424 | Sensor with region of high carrier recombination (e.g., magnetodiode with carriers deflected to recombination region by magnetic field) |
![]() | ![]() | 425 | Magnetic field detector using compound semiconductor material (e.g., GaAs, InSb, etc.) |
![]() | ![]() | 426 | Differential output (e.g., with offset adjustment means or with means to reduce temperature sensitivity) |
![]() | ![]() | 427 | Magnetic field sensor in integrated circuit (e.g., in bipolar transistor integrated circuit) |
![]() | ![]() | 428 | Electromagnetic or particle radiation |
![]() | ![]() | 429 | Charged or elementary particles |
![]() | ![]() | 431 | Light |
![]() | ![]() | 432 | With optical element |
![]() | ![]() | 433 | With housing or encapsulation |
![]() | ![]() | 435 | With optical shield or mask means |
![]() | ![]() | 436 | With means for increasing light absorption (e.g., redirection of unabsorbed light) |
![]() | ![]() | 438 | Avalanche junction |
![]() | ![]() | 439 | Containing dopant adapted for photoionization |
![]() | ![]() | 440 | With different sensor portions responsive to different wavelengths (e.g., color imager) |
![]() | ![]() | 441 | Narrow band gap semiconductor (<<1eV) (e.g., PbSnTe) |
![]() | ![]() | 443 | Matrix or array (e.g., single line arrays) |
![]() | ![]() | 444 | Light sensor elements overlie active switching elements in integrated circuit (e.g., where the sensor elements are deposited on an integrated circuit) |
![]() | ![]() | 445 | With antiblooming means |
![]() | ![]() | 446 | With specific isolation means in integrated circuit |
![]() | ![]() | 447 | With backside illumination (e.g., having a thinned central area or a non-absorbing substrate) |
![]() | ![]() | 448 | With particular electrode configuration |
![]() | ![]() | 449 | Schottky barrier (e.g., a transparent Schottky metallic layer or a Schottky barrier containing at least one of indium or tin (e.g., SnO 2 , indium tin oxide)) |
![]() | ![]() | 450 | With doping profile to adjust barrier height |
![]() | ![]() | 451 | Responsive to light having lower energy (i.e., longer wavelength) than forbidden band gap energy of semiconductor (e.g., by excitation of carriers from metal into semiconductor) |
![]() | ![]() | 452 | With edge protection, e.g., doped guard ring or mesa structure |
![]() | ![]() | 453 | With specified Schottky metallic layer |
![]() | ![]() | 457 | With particular contact geometry (e.g., ring or grid) |
![]() | ![]() | 458 | PIN detector, including combinations with non-light responsive active devices |
![]() | ![]() | 459 | With particular contact geometry (e.g., ring or grid, or bonding pad arrangement) |
![]() | ![]() | 460 | With backside illumination (e.g., with a thinned central area or non-absorbing substrate) |
![]() | ![]() | 461 | Light responsive pn junction |
![]() | ![]() | 462 | Phototransistor |
![]() | ![]() | 463 | With particular doping concentration |
![]() | ![]() | 464 | With particular layer thickness (e.g., layer less than light absorption depth) |
![]() | ![]() | 465 | Geometric configuration of junction (e.g., fingers) |
![]() | ![]() | 466 | External physical configuration of semiconductor (e.g., mesas, grooves) |
![]() | ![]() | 467 | Temperature |
![]() | ![]() | 471 | SCHOTTKY BARRIER |
![]() | ![]() | 472 | To compound semiconductor |
![]() | ![]() | 474 | As active junction in bipolar transistor (e.g., Schottky collector) |
![]() | ![]() | 475 | With doping profile to adjust barrier height |
![]() | ![]() | 476 | In integrated structure |
![]() | ![]() | 480 | In voltage variable capacitance diode |
![]() | ![]() | 481 | Avalanche diode (e.g., so-called "Zener" diode having breakdown voltage greater than 6 volts) |
![]() | ![]() | 483 | With means to prevent edge breakdown |
![]() | ![]() | 485 | Specified materials |
![]() | ![]() | 487 | WITH MEANS TO INCREASE BREAKDOWN VOLTAGE THRESHOLD |
![]() | ![]() | 488 | Field relief electrode |
![]() | ![]() | 491 | In integrated circuit |
![]() | ![]() | 492 | With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices) |
![]() | ![]() | 493 | With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices) |
![]() | ![]() | 494 | Reverse-biased pn junction guard region |
![]() | ![]() | 495 | Floating pn junction guard region |
![]() | ![]() | 496 | With physical configuration of semiconductor surface to reduce electric field (e.g., reverse bevels, double bevels, stepped mesas, etc.) |
![]() | ![]() | 497 | PUNCHTHROUGH STRUCTURE DEVICE (E.G., PUNCHTHROUGH TRANSISTOR, CAMEL BARRIER DIODE) |
![]() | ![]() | 498 | Punchthrough region fully depleted at zero external applied bias voltage (e.g., camel barrier or planar doped barrier devices, or so-called "Bipolar SIT" devices) |
![]() | ![]() | 499 | INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS |
![]() | ![]() | 500 | Including high voltage or high power devices isolated from low voltage or low power devices in the same integrated circuit |
![]() | ![]() | 501 | Including dielectric isolation means |
![]() | ![]() | 502 | High power or high voltage device extends completely through semiconductor substrate (e.g., backside collector contact) |
![]() | ![]() | 503 | With contact or metallization configuration to reduce parasitic coupling (e.g., separate ground pads for different parts of integrated circuit) |
![]() | ![]() | 504 | Including means for establishing a depletion region throughout a semiconductor layer for isolating devices in different portions of the layer (e.g., "JFET" isolation) |
![]() | ![]() | 505 | With polycrystalline semiconductor isolation region in direct contact with single crystal active semiconductor material |
![]() | ![]() | 506 | Including dielectric isolation means |
![]() | ![]() | 507 | With single crystal insulating substrate (e.g., sapphire) |
![]() | ![]() | 508 | With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer) |
![]() | ![]() | 509 | Combined with pn junction isolation (e.g., isoplanar, LOCOS) |
![]() | ![]() | 510 | Dielectric in groove |
![]() | ![]() | 511 | With complementary (npn and pnp) bipolar transistor structures |
![]() | ![]() | 513 | Vertical walled groove |
![]() | ![]() | 515 | With active junction abutting groove (e.g., "walled emitter") |
![]() | ![]() | 516 | With passive component (e.g., resistor, capacitor, etc.) |
![]() | ![]() | 517 | With bipolar transistor structure |
![]() | ![]() | 519 | Including heavily doped channel stop region adjacent groove |
![]() | ![]() | 520 | Conductive filling in dielectric-lined groove (e.g., polysilicon backfill) |
![]() | ![]() | 521 | Sides of grooves along major crystal planes (e.g., (111), (100) planes, etc.) |
![]() | ![]() |