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Classification Resources
 
Class   716COMPUTER-AIDED DESIGN AND ANALYSIS OF CIRCUITS AND SEMICONDUCTOR MASKS
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 [List of Pre Grant Publications for class 716 subclass 30][List of Patents for class 716 subclass 30]30 NANOTECHNOLOGY RELATED INTEGRATED CIRCUIT DESIGN
[List of Pre Grant Publications for class 716 subclass 50][List of Patents for class 716 subclass 50]50 DESIGN OF SEMICONDUCTOR MASK OR RETICLE
[List of Pre Grant Publications for class 716 subclass 100][List of Patents for class 716 subclass 100]100 INTEGRATED CIRCUIT DESIGN PROCESSING
 
FOREIGN ART COLLECTIONS
 
      FOR000          CLASS-RELATED FOREIGN DOCUMENTS
Any foreign patents or non-patent literature from subclasses that have been reclassified have been transferred directly to FOR Collections listed below. These Collections contain ONLY foreign patents or non-patent literature. The parenthetical references in the Collection titles refer to the abolished subclasses from which these Collections were derived.
  FOR100          CIRCUIT DESIGN (716/1)
      FOR101          Subclass FOR101 indent level is 1 Optimization (e.g., redundancy, compaction) (716/2)
      FOR102          Subclass FOR102 indent level is 1 Translation (e.g., conversion, equivalence) (716/3)
  FOR103          Subclass FOR103 indent level is 1 Testing or evaluating (716/4)
      FOR106          Subclass FOR106 indent level is 1 Partitioning (e.g., function block, ordering constraint) (716/7)
  FOR107          Subclass FOR107 indent level is 1 Floorplanning (716/8)
  FOR111          Subclass FOR111 indent level is 1 Routing (e.g., routing map, netlisting) (716/12)
      FOR116          Subclass FOR116 indent level is 1 Programmable integrated circuit (e.g., basic cell, standard cell, macrocell) (716/17)
      FOR117          Subclass FOR117 indent level is 1 Logical circuit synthesizer (716/18)
  FOR118          DESIGN OF SEMICONDUCTOR MASK (716/19)
      FOR119          Subclass FOR119 indent level is 1 Mesh generation (716/20)
      FOR120          Subclass FOR120 indent level is 1 Pattern exposure (716/21)
     APPLICATIONS (364/400)
  FOR489          Subclass FOR489 indent level is 1 Circuit design and analysis (364/489)
  FOR490          Subclass FOR490 indent level is 2 Integrated (364/490)
      FOR491          Subclass FOR491 indent level is 3 Layout (364/491)