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 Class   438SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
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  1           HAVING BIOMATERIAL COMPONENT OR INTEGRATED WITH LIVING ORGANISM
  2           HAVING SUPERCONDUCTIVE COMPONENT
  3           HAVING MAGNETIC OR FERROELECTRIC COMPONENT
  4           REPAIR OR RESTORATION
  5           INCLUDING CONTROL RESPONSIVE TO SENSED CONDITION
  6           . (1 indent ) Interconnecting plural devices on semiconductor substrate
  7           . (1 indent ) Optical characteristic sensed
  8           .. (2 indent ) Chemical etching
  9           ... (3 indent ) Plasma etching
  10           . (1 indent ) Electrical characteristic sensed
  11           .. (2 indent ) Utilizing integral test element
  12           .. (2 indent ) And removal of defect
  13           .. (2 indent ) Altering electrical property by material removal
  14           WITH MEASURING OR TESTING
  15           . (1 indent ) Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor
  16           . (1 indent ) Optical characteristic sensed
  17           . (1 indent ) Electrical characteristic sensed
  18           .. (2 indent ) Utilizing integral test element
  19           HAVING INTEGRAL POWER SOURCE (E.G., BATTERY, ETC.)
  20           ELECTRON EMITTER MANUFACTURE
  21           MANUFACTURE OF ELECTRICAL DEVICE CONTROLLED PRINTHEAD
  22           MAKING DEVICE OR CIRCUIT EMISSIVE OF NONELECTRICAL SIGNAL
  23           . (1 indent ) Having diverse electrical device
  24           .. (2 indent ) Including device responsive to nonelectrical signal
  25           ... (3 indent ) Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor
  26           . (1 indent ) Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor
  27           .. (2 indent ) Having additional optical element (e.g., optical fiber, etc.)
  28           .. (2 indent ) Plural emissive devices
  29           . (1 indent ) Including integrally formed optical element (e.g., reflective layer, luminescent material, contoured surface, etc.)
  30           .. (2 indent ) Liquid crystal component
  31           .. (2 indent ) Optical waveguide structure
  32           .. (2 indent ) Optical grating structure
  33           . (1 indent ) Substrate dicing
  34           . (1 indent ) Making emissive array
  35           .. (2 indent ) Multiple wavelength emissive
  36           . (1 indent ) Ordered or disordered
  37           . (1 indent ) Graded composition
  38           . (1 indent ) Passivating of surface
  39           . (1 indent ) Mesa formation
  40           .. (2 indent ) Tapered etching
  41           .. (2 indent ) With epitaxial deposition of semiconductor adjacent mesa
  42           . (1 indent ) Groove formation
  43           .. (2 indent ) Tapered etching
  44           .. (2 indent ) With epitaxial deposition of semiconductor in groove
  45           . (1 indent ) Dopant introduction into semiconductor region
  46           . (1 indent ) Compound semiconductor
  47           .. (2 indent ) Heterojunction
  48           MAKING DEVICE OR CIRCUIT RESPONSIVE TO NONELECTRICAL SIGNAL
  49           . (1 indent ) Chemically responsive
  50           . (1 indent ) Physical stress responsive
  51           .. (2 indent ) Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor
  52           .. (2 indent ) Having cantilever element
  53           .. (2 indent ) Having diaphragm element
  54           . (1 indent ) Thermally responsive
  55           .. (2 indent ) Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor
  56           . (1 indent ) Responsive to corpuscular radiation (e.g., nuclear particle detector, etc.)
  57           . (1 indent ) Responsive to electromagnetic radiation
  58           .. (2 indent ) Gettering of substrate
  59           .. (2 indent ) Having diverse electrical device
  60           ... (3 indent ) Charge transfer device (e.g., CCD, etc.)
  61           .. (2 indent ) Continuous processing
  62           ... (3 indent ) Using running length substrate
  63           .. (2 indent ) Particulate semiconductor component
  64           .. (2 indent ) Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor
  65           ... (3 indent ) Having additional optical element (e.g., optical fiber, etc.)
  66           ... (3 indent ) Plural responsive devices (e.g., array, etc.)
  67           .... (4 indent ) Assembly of plural semiconductor substrates
  68           .. (2 indent ) Substrate dicing
  69           .. (2 indent ) Including integrally formed optical element (e.g., reflective layer, luminescent layer, etc.)
  70           ... (3 indent ) Color filter
  71           ... (3 indent ) Specific surface topography (e.g., textured surface, etc.)
  72           ... (3 indent ) Having reflective or antireflective component
  73           .. (2 indent ) Making electromagnetic responsive array
  74           ... (3 indent ) Vertically arranged (e.g., tandem, stacked, etc.)
  75           ... (3 indent ) Charge transfer device (e.g., CCD, etc.)
  76           .... (4 indent ) Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.)
  77           .... (4 indent ) Compound semiconductor
  78           .... (4 indent ) Having structure to improve output signal (e.g., exposure control structure, etc.)
  79           .... (5 indent ) Having blooming suppression structure (e.g., antiblooming drain, etc.)
  80           ... (3 indent ) Lateral series connected array
  81           .... (4 indent ) Specified shape junction barrier (e.g., V-grooved junction, etc.)
  82           .. (2 indent ) Having organic semiconductor component
  83           .. (2 indent ) Forming point contact
  84           .. (2 indent ) Having selenium or tellurium elemental semiconductor component
  85           .. (2 indent ) Having metal oxide or copper sulfide compound semiconductive component
  86           ... (3 indent ) And cadmium sulfide compound semiconductive component
  87           .. (2 indent ) Graded composition
  88           .. (2 indent ) Direct application of electric current
  89           .. (2 indent ) Fusion or solidification of semiconductor region
  90           .. (2 indent ) Including storage of electrical charge in substrate
  91           .. (2 indent ) Avalanche diode
  92           .. (2 indent ) Schottky barrier junction
  93           .. (2 indent ) Compound semiconductor
  94           ... (3 indent ) Heterojunction
  95           ... (3 indent ) Chalcogen (i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te)) containing
  96           .. (2 indent ) Amorphous semiconductor
  97           .. (2 indent ) Polycrystalline semiconductor
  98           .. (2 indent ) Contact formation (i.e., metallization)
  99           HAVING ORGANIC SEMICONDUCTIVE COMPONENT
  100           MAKING POINT CONTACT DEVICE
  101           . (1 indent ) Direct application of electrical current
  102           HAVING SELENIUM OR TELLURIUM ELEMENTAL SEMICONDUCTOR COMPONENT
  103           . (1 indent ) Direct application of electrical current
  104           HAVING METAL OXIDE OR COPPER SULFIDE COMPOUND SEMICONDUCTOR COMPONENT
  105           HAVING DIAMOND SEMICONDUCTOR COMPONENT
  106           PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR
  107           . (1 indent ) Assembly of plural semiconductive substrates each possessing electrical device
  108           .. (2 indent ) Flip-chip-type assembly
  109           .. (2 indent ) Stacked array (e.g., rectifier, etc.)
  110           . (1 indent ) Making plural separate devices
  111           .. (2 indent ) Using strip lead frame
  112           ... (3 indent ) And encapsulating
  113           .. (2 indent ) Substrate dicing
  114           ... (3 indent ) Utilizing a coating to perfect the dicing
  115           . (1 indent ) Including contaminant removal or mitigation
  116           . (1 indent ) Having light transmissive window
  117           . (1 indent ) Incorporating resilient component (e.g., spring, etc.)
  118           . (1 indent ) Including adhesive bonding step
  119           .. (2 indent ) Electrically conductive adhesive
  120           . (1 indent ) With vibration step
  121           . (1 indent ) Metallic housing or support
  122           .. (2 indent ) Possessing thermal dissipation structure (i.e., heat sink)
  123           .. (2 indent ) Lead frame
  124           .. (2 indent ) And encapsulating
  125           . (1 indent ) Insulative housing or support
  126           .. (2 indent ) And encapsulating
  127           . (1 indent ) Encapsulating
  128           MAKING DEVICE ARRAY AND SELECTIVELY INTERCONNECTING
  129           . (1 indent ) With electrical circuit layout
  130           . (1 indent ) Rendering selected devices operable or inoperable
  131           . (1 indent ) Using structure alterable to conductive state (i.e., antifuse)
  132           . (1 indent ) Using structure alterable to nonconductive state (i.e., fuse)
  133           MAKING REGENERATIVE-TYPE SWITCHING DEVICE (E.G., SCR, IGBT, THYRISTOR, ETC.)
  134           . (1 indent ) Bidirectional rectifier with control electrode (e.g., triac, diac, etc.)
  135           . (1 indent ) Having field effect structure
  136           .. (2 indent ) Junction gate
  137           ... (3 indent ) Vertical channel
  138           .. (2 indent ) Vertical channel
  139           . (1 indent ) Altering electrical characteristic
  140           . (1 indent ) Having structure increasing breakdown voltage (e.g., guard ring, field plate, etc.)
  141           MAKING CONDUCTIVITY MODULATION DEVICE (E.G., UNIJUNCTION TRANSISTOR, DOUBLE BASE DIODE, CONDUCTIVITY-MODULATED TRANSISTOR, ETC.)
  142           MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS
  143           . (1 indent ) Gettering of semiconductor substrate
  144           . (1 indent ) Charge transfer device (e.g., CCD, etc.)
  145           .. (2 indent ) Having additional electrical device
  146           .. (2 indent ) Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.)
  147           .. (2 indent ) Changing width or direction of channel (e.g., meandering channel, etc.)
  148           .. (2 indent ) Substantially incomplete signal charge transfer (e.g., bucket brigade, etc.)
  149           . (1 indent ) On insulating substrate or layer (e.g., TFT, etc.)
  150           .. (2 indent ) Specified crystallographic orientation
  151           .. (2 indent ) Having insulated gate
  152           ... (3 indent ) Combined with electrical device not on insulating substrate or layer
  153           .... (4 indent ) Complementary field effect transistors
  154           ... (3 indent ) Complementary field effect transistors
  155           ... (3 indent ) And additional electrical device on insulating substrate or layer
  156           ... (3 indent ) Vertical channel
  157           ... (3 indent ) Plural gate electrodes (e.g., dual gate, etc.)
  158           ... (3 indent ) Inverted transistor structure
  159           .... (4 indent ) Source-to-gate or drain-to-gate overlap
  160           .... (4 indent ) Utilizing backside irradiation
  161           ... (3 indent ) Including source or drain electrode formation prior to semiconductor layer formation (i.e., staggered electrodes)
  162           ... (3 indent ) Introduction of nondopant into semiconductor layer
  163           ... (3 indent ) Adjusting channel dimension (e.g., providing lightly doped source or drain region, etc.)
  164           ... (3 indent ) Semiconductor islands formed upon insulating substrate or layer (e.g., mesa formation, etc.)
  165           .... (4 indent ) Including differential oxidation
  166           ... (3 indent ) Including recrystallization step
  167           . (1 indent ) Having Schottky gate (e.g., MESFET, HEMT, etc.)
  168           .. (2 indent ) Specified crystallographic orientation
  169           .. (2 indent ) Complementary Schottky gate field effect transistors
  170           .. (2 indent ) And bipolar device
  171           .. (2 indent ) And passive electrical device (e.g., resistor, capacitor, etc.)
  172           .. (2 indent ) Having heterojunction (e.g., HEMT, MODFET, etc.)
  173           .. (2 indent ) Vertical channel
  174           .. (2 indent ) Doping of semiconductive channel region beneath gate (e.g., threshold voltage adjustment, etc.)
  175           .. (2 indent ) Buried channel
  176           .. (2 indent ) Plural gate electrodes (e.g., dual gate, etc.)
  177           .. (2 indent ) Closed or loop gate
  178           .. (2 indent ) Elemental semiconductor
  179           .. (2 indent ) Asymmetric
  180           .. (2 indent ) Self-aligned
  181           ... (3 indent ) Doping of semiconductive region
  182           .... (4 indent ) T-gate
  183           .... (4 indent ) Dummy gate
  184           .... (4 indent ) Utilizing gate sidewall structure
  185           .... (5 indent ) Multiple doping steps
  186           . (1 indent ) Having junction gate (e.g., JFET, SIT, etc.)
  187           .. (2 indent ) Specified crystallographic orientation
  188           .. (2 indent ) Complementary junction gate field effect transistors
  189           .. (2 indent ) And bipolar transistor
  190           .. (2 indent ) And passive device (e.g., resistor, capacitor, etc.)
  191           .. (2 indent ) Having heterojunction
  192           .. (2 indent ) Vertical channel
  193           ... (3 indent ) Multiple parallel current paths (e.g., grid gate, etc.)
  194           .. (2 indent ) Doping of semiconductive channel region beneath gate (e.g., threshold voltage adjustment, etc.)
  195           .. (2 indent ) Plural gate electrodes
  196           .. (2 indent ) Including isolation structure
  197           . (1 indent ) Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.)
  198           .. (2 indent ) Specified crystallographic orientation
  199           .. (2 indent ) Complementary insulated gate field effect transistors (i.e., CMOS)
  200           ... (3 indent ) And additional electrical device
  201           .... (4 indent ) Including insulated gate field effect transistor having gate surrounded by dielectric (i.e., floating gate)
  202           .... (4 indent ) Including bipolar transistor (i.e., BiCMOS)
  203           .... (5 indent ) Complementary bipolar transistors
  204           .... (5 indent ) Lateral bipolar transistor
  205           .... (5 indent ) Plural bipolar transistors of differing electrical characteristics
  206           .... (5 indent ) Vertical channel insulated gate field effect transistor
  207           .... (5 indent ) Including isolation structure
  208           ..... (6 indent ) Isolation by PN junction only
  209           .... (4 indent ) Including additional vertical channel insulated gate field effect transistor
  210           .... (4 indent ) Including passive device (e.g., resistor, capacitor, etc.)
  211           ... (3 indent ) Having gate surrounded by dielectric (i.e., floating gate)
  212           ... (3 indent ) Vertical channel
  213           ... (3 indent ) Common active region
  214           ... (3 indent ) Having underpass or crossunder
  215           ... (3 indent ) Having fuse or integral short
  216           ... (3 indent ) Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound
  217           ... (3 indent ) Doping of semiconductor channel region beneath gate insulator (e.g., threshold voltage adjustment, etc.)
  218           ... (3 indent ) Including isolation structure
  219           .... (4 indent ) Total dielectric isolation
  220           .... (4 indent ) Isolation by PN junction only
  221           .... (4 indent ) Dielectric isolation formed by grooving and refilling with dielectric material
  222           .... (5 indent ) With epitaxial semiconductor layer formation
  223           .... (5 indent ) Having well structure of opposite conductivity type
  224           ..... (6 indent ) Plural wells
  225           .... (4 indent ) Recessed oxide formed by localized oxidation (i.e., LOCOS)
  226           .... (5 indent ) With epitaxial semiconductor layer formation
  227           .... (5 indent ) Having well structure of opposite conductivity type
  228           ..... (6 indent ) Plural wells
  229           ... (3 indent ) Self-aligned
  230           .... (4 indent ) Utilizing gate sidewall structure
  231           .... (5 indent ) Plural doping steps
  232           .... (4 indent ) Plural doping steps
  233           ... (3 indent ) And contact formation
  234           .. (2 indent ) Including bipolar transistor (i.e., BiMOS)
  235           ... (3 indent ) Heterojunction bipolar transistor
  236           ... (3 indent ) Lateral bipolar transistor
  237           .. (2 indent ) Including diode
  238           .. (2 indent ) Including passive device (e.g., resistor, capacitor, etc.)
  239           ... (3 indent ) Capacitor
  240           .... (4 indent ) Having high dielectric constant insulator (e.g., Ta2O5, etc.)
  241           .... (4 indent ) And additional field effect transistor (e.g., sense or access transistor, etc.)
  242           .... (5 indent ) Including transistor formed on trench sidewalls
  243           .... (4 indent ) Trench capacitor
  244           .... (5 indent ) Utilizing stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.)
  245           .... (5 indent ) With epitaxial layer formed over the trench
  246           .... (5 indent ) Including doping of trench surfaces
  247           ..... (6 indent ) Multiple doping steps
  248           ..... (6 indent ) Including isolation means formed in trench
  249           ..... (6 indent ) Doping by outdiffusion from a dopant source layer (e.g., doped oxide, etc.)
  250           .... (4 indent ) Planar capacitor
  251           .... (5 indent ) Including doping of semiconductive region
  252           ..... (6 indent ) Multiple doping steps
  253           .... (4 indent ) Stacked capacitor
  254           .... (5 indent ) Including selectively removing material to undercut and expose storage node layer
  255           .... (5 indent ) Including texturizing storage node layer
  256           .... (5 indent ) Contacts formed by selective growth or deposition
  257           .. (2 indent ) Having additional gate electrode surrounded by dielectric (i.e., floating gate)
  258           ... (3 indent ) Including additional field effect transistor (e.g., sense or access transistor, etc.)
  259           ... (3 indent ) Including forming gate electrode in trench or recess in substrate
  260           ... (3 indent ) Textured surface of gate insulator or gate electrode
  261           ... (3 indent ) Multiple interelectrode dielectrics or nonsilicon compound gate insulator
  262           ... (3 indent ) Including elongated source or drain region disposed under thick oxide regions (e.g., buried or diffused bitline, etc.)
  263           .... (4 indent ) Tunneling insulator
  264           ... (3 indent ) Tunneling insulator
  265           ... (3 indent ) Oxidizing sidewall of gate electrode
  266           ... (3 indent ) Having additional, nonmemory control electrode or channel portion (e.g., for accessing field effect transistor structure, etc.)
  267           .... (4 indent ) Including forming gate electrode as conductive sidewall spacer to another electrode
  268           .. (2 indent ) Vertical channel
  269           ... (3 indent ) Utilizing epitaxial semiconductor layer grown through an opening in an insulating layer
  270           ... (3 indent ) Gate electrode in trench or recess in semiconductor substrate
  271           .... (4 indent ) V-gate
  272           .... (4 indent ) Totally embedded in semiconductive layers
  273           ... (3 indent ) Having integral short of source and base regions
  274           .... (4 indent ) Short formed in recess in substrate
  275           .. (2 indent ) Making plural insulated gate field effect transistors of differing electrical characteristics
  276           ... (3 indent ) Introducing a dopant into the channel region of selected transistors
  277           .... (4 indent ) Including forming overlapping gate electrodes
  278           .... (4 indent ) After formation of source or drain regions and gate electrode (e.g., late programming, encoding, etc.)
  279           .. (2 indent ) Making plural insulated gate field effect transistors having common active region
  280           .. (2 indent ) Having underpass or crossunder
  281           .. (2 indent ) Having fuse or integral short
  282           .. (2 indent ) Buried channel
  283           .. (2 indent ) Plural gate electrodes (e.g., dual gate, etc.)
  284           .. (2 indent ) Closed or loop gate
  285           .. (2 indent ) Utilizing compound semiconductor
  286           .. (2 indent ) Asymmetric
  287           .. (2 indent ) Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound
  288           .. (2 indent ) Having step of storing electrical charge in gate dielectric
  289           .. (2 indent ) Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.)
  290           ... (3 indent ) After formation of source or drain regions and gate electrode
  291           ... (3 indent ) Using channel conductivity dopant of opposite type as that of source and drain
  292           .. (2 indent ) Direct application of electrical current
  293           .. (2 indent ) Fusion or solidification of semiconductor region
  294           .. (2 indent ) Including isolation structure
  295           ... (3 indent ) Total dielectric isolation
  296           ... (3 indent ) Dielectric isolation formed by grooving and refilling with dielectric material
  297           ... (3 indent ) Recessed oxide formed by localized oxidation (i.e., LOCOS)
  298           .... (4 indent ) Doping region beneath recessed oxide (e.g., to form chanstop, etc.)
  299           .. (2 indent ) Self-aligned
  300           ... (3 indent ) Having elevated source or drain (e.g., epitaxially formed source or drain, etc.)
  301           ... (3 indent ) Source or drain doping
  302           .... (4 indent ) Oblique implantation
  303           .... (4 indent ) Utilizing gate sidewall structure
  304           .... (5 indent ) Conductive sidewall component
  305           .... (5 indent ) Plural doping steps
  306           .... (4 indent ) Plural doping steps
  307           .... (5 indent ) Using same conductivity-type dopant
  308           .. (2 indent ) Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.)
  309           FORMING BIPOLAR TRANSISTOR BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS
  310           . (1 indent ) Gettering of semiconductor substrate
  311           . (1 indent ) On insulating substrate or layer (i.e., SOI type)
  312           . (1 indent ) Having heterojunction
  313           .. (2 indent ) Complementary bipolar transistors
  314           .. (2 indent ) And additional electrical device
  315           .. (2 indent ) Forming inverted transistor structure
  316           .. (2 indent ) Forming lateral transistor structure
  317           .. (2 indent ) Wide bandgap emitter
  318           .. (2 indent ) Including isolation structure
  319           ... (3 indent ) Air isolation (e.g., mesa, etc.)
  320           .. (2 indent ) Self-aligned
  321           ... (3 indent ) Utilizing dummy emitter
  322           . (1 indent ) Complementary bipolar transistors
  323           .. (2 indent ) Having common active region (i.e., integrated injection logic (I2L), etc.)
  324           ... (3 indent ) Including additional electrical device
  325           ... (3 indent ) Having lateral bipolar transistor
  326           .. (2 indent ) Including additional electrical device
  327           .. (2 indent ) Having lateral bipolar transistor
  328           . (1 indent ) Including diode
  329           . (1 indent ) Including passive device (e.g., resistor, capacitor, etc.)
  330           .. (2 indent ) Resistor
  331           ... (3 indent ) Having same doping as emitter or collector
  332           ... (3 indent ) Lightly doped junction isolated resistor
  333           . (1 indent ) Having fuse or integral short
  334           . (1 indent ) Forming inverted transistor structure
  335           . (1 indent ) Forming lateral transistor structure
  336           .. (2 indent ) Combined with vertical bipolar transistor
  337           .. (2 indent ) Active region formed along groove or exposed edge in semiconductor
  338           .. (2 indent ) Having multiple emitter or collector structure
  339           .. (2 indent ) Self-aligned
  340           . (1 indent ) Making plural bipolar transistors of differing electrical characteristics
  341           . (1 indent ) Using epitaxial lateral overgrowth
  342           . (1 indent ) Having multiple emitter or collector structure
  343           . (1 indent ) Mesa or stacked emitter
  344           . (1 indent ) Washed emitter
  345           . (1 indent ) Walled emitter
  346           . (1 indent ) Emitter dip prevention or utilization
  347           . (1 indent ) Permeable or metal base
  348           . (1 indent ) Sidewall base contact
  349           . (1 indent ) Pedestal base
  350           . (1 indent ) Forming base region of specified dopant concentration profile (e.g., inactive base region more heavily doped than active base region, etc.)
  351           . (1 indent ) Direct application of electrical current
  352           . (1 indent ) Fusion or solidification of semiconductor region
  353           . (1 indent ) Including isolation structure
  354           .. (2 indent ) Having semi-insulative region
  355           .. (2 indent ) Total dielectrical isolation
  356           .. (2 indent ) Isolation by PN junction only
  357           ... (3 indent ) Including epitaxial semiconductor layer formation
  358           .... (4 indent ) Up diffusion of dopant from substrate into epitaxial layer
  359           .. (2 indent ) Dielectric isolation formed by grooving and refilling with dielectrical material
  360           ... (3 indent ) With epitaxial semiconductor formation in groove
  361           ... (3 indent ) Including deposition of polysilicon or noninsulative material into groove
  362           .. (2 indent ) Recessed oxide by localized oxidation (i.e., LOCOS)
  363           ... (3 indent ) With epitaxial semiconductor layer formation
  364           . (1 indent ) Self-aligned
  365           .. (2 indent ) Forming active region from adjacent doped polycrystalline or amorphous semiconductor
  366           ... (3 indent ) Having sidewall
  367           .... (4 indent ) Including conductive component
  368           ... (3 indent ) Simultaneously outdiffusing plural dopants from polysilicon or amorphous semiconductor
  369           .. (2 indent ) Dopant implantation or diffusion
  370           ... (3 indent ) Forming buried region (e.g., implanting through insulating layer, etc.)
  371           ... (3 indent ) Simultaneous introduction of plural dopants
  372           .... (4 indent ) Plural doping steps
  373           .... (5 indent ) Multiple ion implantation steps
  374           ..... (6 indent ) Using same conductivity-type dopant
  375           .... (5 indent ) Forming partially overlapping regions
  376           .... (5 indent ) Single dopant forming regions of different depth or concentrations
  377           .... (5 indent ) Through same mask opening
  378           . (1 indent ) Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.)
  379           VOLTAGE VARIABLE CAPACITANCE DEVICE MANUFACTURE (E.G., VARACTOR, ETC.)
  380           AVALANCHE DIODE MANUFACTURE (E.G., IMPATT, TRAPPAT, ETC.)
  381           MAKING PASSIVE DEVICE (E.G., RESISTOR, CAPACITOR, ETC.)
  382           . (1 indent ) Resistor
  383           .. (2 indent ) Lightly doped junction isolated resistor
  384           .. (2 indent ) Deposited thin film resistor
  385           ... (3 indent ) Altering resistivity of conductor
  386           . (1 indent ) Trench capacitor
  387           .. (2 indent ) Having stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.)
  388           .. (2 indent ) With epitaxial layer formed over the trench
  389           .. (2 indent ) Including doping of trench surfaces
  390           ... (3 indent ) Multiple doping steps
  391           ... (3 indent ) Including isolation means formed in trench
  392           ... (3 indent ) Doping by outdiffusion from a dopant source layer (e.g., doped oxide)
  393           . (1 indent ) Planar capacitor
  394           .. (2 indent ) Including doping of semiconductive region
  395           ... (3 indent ) Multiple doping steps
  396           . (1 indent ) Stacked capacitor
  397           .. (2 indent ) Including selectively removing material to undercut and expose storage node layer
  398           .. (2 indent ) Including texturizing storage node layer
  399           .. (2 indent ) Having contacts formed by selective growth or deposition
  400           FORMATION OF ELECTRICALLY ISOLATED LATERAL SEMICONDUCTIVE STRUCTURE
  401           . (1 indent ) Having substrate registration feature (e.g., alignment mark)
  402           . (1 indent ) And gettering of substrate
  403           . (1 indent ) Having semi-insulating component
  404           . (1 indent ) Total dielectric isolation
  405           .. (2 indent ) And separate partially isolated semiconductor regions
  406           .. (2 indent ) Bonding of plural semiconductive substrates
  407           .. (2 indent ) Nondopant implantation
  408           .. (2 indent ) With electrolytic treatment step
  409           ... (3 indent ) Porous semiconductor formation
  410           .. (2 indent ) Encroachment of separate locally oxidized regions
  411           .. (2 indent ) Air isolation (e.g., beam lead supported semiconductor islands, etc.)
  412           ... (3 indent ) Semiconductor islands formed upon insulating substrate or layer (e.g., mesa isolation, etc.)
  413           .. (2 indent ) With epitaxial semiconductor formation
  414           . (1 indent ) Isolation by PN junction only
  415           .. (2 indent ) Thermomigration
  416           .. (2 indent ) With epitaxial semiconductor formation
  417           ... (3 indent ) And simultaneous polycrystalline growth
  418           ... (3 indent ) Dopant addition
  419           .... (4 indent ) Plural doping steps
  420           .. (2 indent ) Plural doping steps
  421           . (1 indent ) Having air-gap dielectric (e.g., groove, etc.)
  422           .. (2 indent ) Enclosed cavity
  423           . (1 indent ) Implanting to form insulator
  424           . (1 indent ) Grooved and refilled with deposited dielectric material
  425           .. (2 indent ) Combined with formation of recessed oxide by localized oxidation
  426           ... (3 indent ) Recessed oxide laterally extending from groove
  427           .. (2 indent ) Refilling multiple grooves of different widths or depths
  428           ... (3 indent ) Reflow of insulator
  429           .. (2 indent ) And epitaxial semiconductor formation in groove
  430           .. (2 indent ) And deposition of polysilicon or noninsulative material into groove
  431           ... (3 indent ) Oxidation of deposited material
  432           .... (4 indent ) Nonoxidized portions remaining in groove after oxidation
  433           .. (2 indent ) Dopant addition
  434           ... (3 indent ) From doped insulator in groove
  435           .. (2 indent ) Multiple insulative layers in groove
  436           ... (3 indent ) Reflow of insulator
  437           ... (3 indent ) Conformal insulator formation
  438           .. (2 indent ) Reflow of insulator
  439           . (1 indent ) Recessed oxide by localized oxidation (i.e., LOCOS)
  440           .. (2 indent ) Including nondopant implantation
  441           .. (2 indent ) With electrolytic treatment step
  442           .. (2 indent ) With epitaxial semiconductor layer formation
  443           .. (2 indent ) Etchback of recessed oxide
  444           .. (2 indent ) Preliminary etching of groove
  445           ... (3 indent ) Masking of groove sidewall
  446           .... (4 indent ) Polysilicon containing sidewall
  447           .... (4 indent ) Dopant addition
  448           .. (2 indent ) Utilizing oxidation mask having polysilicon component
  449           .. (2 indent ) Dopant addition
  450           ... (3 indent ) Implanting through recessed oxide
  451           ... (3 indent ) Plural doping steps
  452           .. (2 indent ) Plural oxidation steps to form recessed oxide
  453           .. (2 indent ) And electrical conductor formation (i.e., metallization)
  454           . (1 indent ) Field plate electrode
  455           BONDING OF PLURAL SEMICONDUCTOR SUBSTRATES
  456           . (1 indent ) Having enclosed cavity
  457           . (1 indent ) Warping of semiconductor substrate
  458           . (1 indent ) Subsequent separation into plural bodies (e.g., delaminating, dicing, etc.)
  459           . (1 indent ) Thinning of semiconductor substrate
  460           SEMICONDUCTOR SUBSTRATE DICING
  461           . (1 indent ) Beam lead formation
  462           . (1 indent ) Having specified scribe region structure (e.g., alignment mark, plural grooves, etc.)
  463           . (1 indent ) By electromagnetic irradiation (e.g., electron, laser, etc.)
  464           . (1 indent ) With attachment to temporary support or carrier
  465           . (1 indent ) Having a perfecting coating
  466           DIRECT APPLICATION OF ELECTRICAL CURRENT
  467           . (1 indent ) To alter conductivity of fuse or antifuse element
  468           . (1 indent ) Electromigration
  469           . (1 indent ) Utilizing pulsed current
  470           . (1 indent ) Fusion of semiconductor region
  471           GETTERING OF SUBSTRATE
  472           . (1 indent ) By vibrating or impacting
  473           . (1 indent ) By implanting or irradiating
  474           .. (2 indent ) Ionized radiation (e.g., corpuscular or plasma treatment, etc.)
  475           ... (3 indent ) Hydrogen plasma (i.e., hydrogenization)
  476           . (1 indent ) By layers which are coated, contacted, or diffused
  477           . (1 indent ) By vapor phase surface reaction
  478           FORMATION OF SEMICONDUCTIVE ACTIVE REGION ON ANY SUBSTRATE (E.G., FLUID GROWTH, DEPOSITION)
  479           . (1 indent ) On insulating substrate or layer
  480           .. (2 indent ) Including implantation of ion which reacts with semiconductor substrate to form insulating layer
  481           .. (2 indent ) Utilizing epitaxial lateral overgrowth
  482           . (1 indent ) Amorphous semiconductor
  483           .. (2 indent ) Compound semiconductor
  484           .. (2 indent ) Running length (e.g., sheet, strip, etc.)
  485           .. (2 indent ) Deposition utilizing plasma (e.g., glow discharge, etc.)
  486           .. (2 indent ) And subsequent crystallization
  487           ... (3 indent ) Utilizing wave energy (e.g., laser, electron beam, etc.)
  488           . (1 indent ) Polycrystalline semiconductor
  489           .. (2 indent ) Simultaneous single crystal formation
  490           .. (2 indent ) Running length (e.g., sheet, strip, etc.)
  491           .. (2 indent ) And subsequent doping of polycrystalline semiconductor
  492           . (1 indent ) Fluid growth step with preceding and subsequent diverse operation
  493           . (1 indent ) Plural fluid growth steps with intervening diverse operation
  494           .. (2 indent ) Differential etching
  495           .. (2 indent ) Doping of semiconductor
  496           .. (2 indent ) Coating of semiconductive substrate with nonsemiconductive material
  497           . (1 indent ) Fluid growth from liquid combined with preceding diverse operation
  498           .. (2 indent ) Differential etching
  499           .. (2 indent ) Doping of semiconductor
  500           . (1 indent ) Fluid growth from liquid combined with subsequent diverse operation
  501           .. (2 indent ) Doping of semiconductor
  502           .. (2 indent ) Heat treatment
  503           . (1 indent ) Fluid growth from gaseous state combined with preceding diverse operation
  504           .. (2 indent ) Differential etching
  505           .. (2 indent ) Doping of semiconductor
  506           ... (3 indent ) Ion implantation
  507           . (1 indent ) Fluid growth from gaseous state combined with subsequent diverse operation
  508           .. (2 indent ) Doping of semiconductor
  509           .. (2 indent ) Heat treatment
  510           INTRODUCTION OF CONDUCTIVITY MODIFYING DOPANT INTO SEMICONDUCTIVE MATERIAL
  511           . (1 indent ) Ordering or disordering
  512           . (1 indent ) Involving nuclear transmutation doping
  513           . (1 indent ) Plasma (e.g., glow discharge, etc.)
  514           . (1 indent ) Ion implantation of dopant into semiconductor region
  515           .. (2 indent ) Ionized molecules
  516           .. (2 indent ) Including charge neutralization
  517           .. (2 indent ) Of semiconductor layer on insulating substrate or layer
  518           .. (2 indent ) Of compound semiconductor
  519           ... (3 indent ) Including multiple implantation steps
  520           .... (4 indent ) Providing nondopant ion (e.g., proton, etc.)
  521           .... (4 indent ) Using same conductivity-type dopant
  522           ... (3 indent ) Including heat treatment
  523           ... (3 indent ) And contact formation (i.e., metallization)
  524           .. (2 indent ) Into grooved semiconductor substrate region
  525           .. (2 indent ) Using oblique beam
  526           .. (2 indent ) Forming buried region
  527           .. (2 indent ) Including multiple implantation steps
  528           ... (3 indent ) Providing nondopant ion (e.g., proton, etc.)
  529           ... (3 indent ) Using same conductivity-type dopant
  530           .. (2 indent ) Including heat treatment
  531           .. (2 indent ) Using shadow mask
  532           .. (2 indent ) Into polycrystalline region
  533           .. (2 indent ) And contact formation (i.e., metallization)
  534           ... (3 indent ) Rectifying contact (i.e., Schottky contact)
  535           . (1 indent ) By application of corpuscular or electromagnetic radiation (e.g., electron, laser, etc.)
  536           .. (2 indent ) Recoil implantation
  537           . (1 indent ) Fusing dopant with substrate (i.e., alloy junction)
  538           .. (2 indent ) Using additional material to improve wettability or flow characteristics (e.g., flux, etc.)
  539           .. (2 indent ) Application of pressure to material during fusion
  540           .. (2 indent ) Including plural controlled heating or cooling steps or nonuniform heating
  541           ... (3 indent ) Including diffusion after fusing step
  542           . (1 indent ) Diffusing a dopant
  543           .. (2 indent ) To control carrier lifetime (i.e., deep level dopant)
  544           .. (2 indent ) To solid-state solubility concentration
  545           .. (2 indent ) Forming partially overlapping regions
  546           .. (2 indent ) Plural dopants in same region (e.g., through same mask opening, etc.)
  547           ... (3 indent ) Simultaneously
  548           .. (2 indent ) Plural dopants simultaneously in plural regions
  549           .. (2 indent ) Single dopant forming plural diverse regions (e.g., forming regions of different concentrations or of different depths, etc.)
  550           .. (2 indent ) Nonuniform heating
  551           .. (2 indent ) Using multiple layered mask
  552           ... (3 indent ) Having plural predetermined openings in master mask
  553           .. (2 indent ) Using metal mask
  554           .. (2 indent ) Outwardly
  555           .. (2 indent ) Laterally under mask opening
  556           .. (2 indent ) Edge diffusion by using edge portion of structure other than masking layer to mask
  557           .. (2 indent ) From melt
  558           .. (2 indent ) From solid dopant source in contact with semiconductor region
  559           ... (3 indent ) Using capping layer over dopant source to prevent out-diffusion of dopant
  560           ... (3 indent ) Plural diffusion stages
  561           ... (3 indent ) Dopant source within trench or groove
  562           ... (3 indent ) Organic source
  563           ... (3 indent ) Glassy source or doped oxide
  564           ... (3 indent ) Polycrystalline semiconductor source
  565           .. (2 indent ) From vapor phase
  566           ... (3 indent ) Plural diffusion stages
  567           ... (3 indent ) Solid source in operative relation with semiconductor region
  568           .... (4 indent ) In capsule-type enclosure
  569           ... (3 indent ) Into compound semiconductor region
  570           FORMING SCHOTTKY JUNCTION (I.E., SEMICONDUCTOR-CONDUCTOR RECTIFYING JUNCTION CONTACT)
  571           . (1 indent ) Combined with formation of ohmic contact to semiconductor region
  572           . (1 indent ) Compound semiconductor
  573           .. (2 indent ) Multilayer electrode
  574           ... (3 indent ) T-shaped electrode
  575           ... (3 indent ) Using platinum group metal (i.e., platinum (Pt), palladium (Pd), rodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof)
  576           .. (2 indent ) Into grooved or recessed semiconductor region
  577           ... (3 indent ) Utilizing lift-off
  578           ... (3 indent ) Forming electrode of specified shape (e.g., slanted, etc.)
  579           .... (4 indent ) T-shaped electrode
  580           . (1 indent ) Using platinum group metal (i.e., platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof)
  581           .. (2 indent ) Silicide
  582           . (1 indent ) Using refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)
  583           .. (2 indent ) Silicide
  584           COATING WITH ELECTRICALLY OR THERMALLY CONDUCTIVE MATERIAL
  585           . (1 indent ) Insulated gate formation
  586           .. (2 indent ) Combined with formation of ohmic contact to semiconductor region
  587           .. (2 indent ) Forming array of gate electrodes
  588           ... (3 indent ) Plural gate levels
  589           .. (2 indent ) Recessed into semiconductor substrate
  590           .. (2 indent ) Compound semiconductor
  591           .. (2 indent ) Gate insulator structure constructed of plural layers or nonsilicon containing compound
  592           .. (2 indent ) Possessing plural conductive layers (e.g., polycide)
  593           ... (3 indent ) Separated by insulator (i.e., floating gate)
  594           .... (4 indent ) Tunnelling dielectric layer
  595           .. (2 indent ) Having sidewall structure
  596           ... (3 indent ) Portion of sidewall structure is conductive
  597           . (1 indent ) To form ohmic contact to semiconductive material
  598           .. (2 indent ) Selectively interconnecting (e.g., customization, wafer scale integration, etc.)
  599           ... (3 indent ) With electrical circuit layout
  600           ... (3 indent ) Using structure alterable to conductive state (i.e., antifuse)
  601           ... (3 indent ) Using structure alterable to nonconductive state (i.e., fuse)
  602           .. (2 indent ) To compound semiconductor
  603           ... (3 indent ) II-VI compound semiconductor
  604           ... (3 indent ) III-V compound semiconductor
  605           .... (4 indent ) Multilayer electrode
  606           .... (4 indent ) Ga and As containing semiconductor
  607           .. (2 indent ) With epitaxial conductor formation
  608           .. (2 indent ) Oxidic conductor (e.g., indium tin oxide, etc.)
  609           ... (3 indent ) Transparent conductor
  610           .. (2 indent ) Conductive macromolecular conductor (including metal powder filled composition)
  611           .. (2 indent ) Beam lead formation
  612           .. (2 indent ) Forming solder contact or bonding pad
  613           ... (3 indent ) Bump electrode
  614           .... (4 indent ) Plural conductive layers
  615           .... (4 indent ) Including fusion of conductor
  616           .... (5 indent ) By transcription from auxiliary substrate
  617           .... (5 indent ) By wire bonding
  618           .. (2 indent ) Contacting multiple semiconductive regions (i.e., interconnects)
  619           ... (3 indent ) Air bridge structure
  620           ... (3 indent ) Forming contacts of differing depths into semiconductor substrate
  621           ... (3 indent ) Contacting diversely doped semiconductive regions (e.g., p-type and n-type regions, etc.)
  622           ... (3 indent ) Multiple metal levels, separated by insulating layer (i.e., multiple level metallization)
  623           .... (4 indent ) Including organic insulating material between metal levels
  624           .... (4 indent ) Separating insulating layer is laminate or composite of plural insulating materials
  625           .... (4 indent ) At least one metallization level formed of diverse conductive layers
  626           .... (5 indent ) Planarization
  627           .... (5 indent ) At least one layer forms a diffusion barrier
  628           .... (5 indent ) Having adhesion promoting layer
  629           .... (5 indent ) Diverse conductive layers limited to viahole/plug
  630           ..... (6 indent ) Silicide formation
  631           .... (4 indent ) Having planarization step
  632           .... (5 indent ) Utilizing reflow
  633           .... (5 indent ) Simultaneously by chemical and mechanical means
  634           .... (5 indent ) Utilizing etch-stop layer
  635           .... (4 indent ) Insulator formed by reaction with conductor (e.g., oxidation, etc.)
  636           .... (4 indent ) Including use of antireflective layer
  637           .... (4 indent ) With formation of opening (i.e., viahole) in insulative layer
  638           .... (5 indent ) Having viaholes of diverse width
  639           .... (5 indent ) Having viahole with sidewall component
  640           .... (5 indent ) Having viahole of tapered shape
  641           .... (4 indent ) Selective deposition
  642           ... (3 indent ) Diverse conductors
  643           .... (4 indent ) At least one layer forms a diffusion barrier
  644           .... (4 indent ) Having adhesion promoting layer
  645           .... (4 indent ) Having planarization step
  646           .... (5 indent ) Utilizing reflow
  647           .... (4 indent ) Having electrically conductive polysilicon component
  648           .... (4 indent ) Having refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)
  649           .... (5 indent ) Silicide
  650           .... (4 indent ) Having noble group metal (i.e., silver (Ag), gold (Au), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof)
  651           .... (5 indent ) Silicide
  652           .. (2 indent ) Plural layered electrode or conductor
  653           ... (3 indent ) At least one layer forms a diffusion barrier
  654           ... (3 indent ) Having adhesion promoting layer
  655           ... (3 indent ) Silicide
  656           ... (3 indent ) Having refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)
  657           ... (3 indent ) Having electrically conductive polysilicon component
  658           .. (2 indent ) Altering composition of conductor
  659           ... (3 indent ) Implantation of ion into conductor
  660           .. (2 indent ) Including heat treatment of conductive layer
  661           ... (3 indent ) Subsequent fusing conductive layer
  662           .... (4 indent ) Utilizing laser
  663           ... (3 indent ) Rapid thermal anneal
  664           .... (4 indent ) Forming silicide
  665           .. (2 indent ) Utilizing textured surface
  666           .. (2 indent ) Specified configuration of electrode or contact
  667           ... (3 indent ) Conductive feedthrough or through-hole in substrate
  668           ... (3 indent ) Specified aspect ratio of conductor or viahole
  669           .. (2 indent ) And patterning of conductive layer
  670           ... (3 indent ) Utilizing lift-off
  671           ... (3 indent ) Utilizing multilayered mask
  672           ... (3 indent ) Plug formation (i.e., in viahole)
  673           ... (3 indent ) Tapered etching
  674           .. (2 indent ) Selective deposition of conductive layer
  675           ... (3 indent ) Plug formation (i.e., in viahole)
  676           ... (3 indent ) Utilizing electromagnetic or wave energy
  677           ... (3 indent ) Pretreatment of surface to enhance or retard deposition
  678           .. (2 indent ) Electroless deposition of conductive layer
  679           .. (2 indent ) Evaporative coating of conductive layer
  680           .. (2 indent ) Utilizing chemical vapor deposition (i.e., CVD)
  681           ... (3 indent ) Of organo-metallic precursor (i.e., MOCVD)
  682           .. (2 indent ) Silicide
  683           ... (3 indent ) Of refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)
  684           .. (2 indent ) Electrically conductive polysilicon
  685           .. (2 indent ) Refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)
  686           .. (2 indent ) Noble group metal (i.e., silver (Ag), gold (Au), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof)
  687           .. (2 indent ) Copper of copper alloy conductor
  688           .. (2 indent ) Aluminum or aluminum alloy conductor
  689           CHEMICAL ETCHING
  690           . (1 indent ) Combined with the removal of material by nonchemical means (e.g., ablating, abrading, etc.)
  691           .. (2 indent ) Combined mechanical and chemical material removal
  692           ... (3 indent ) Simultaneous (e.g., chemical-mechanical polishing, etc.)
  693           .... (4 indent ) Utilizing particulate abradant
  694           . (1 indent ) Combined with coating step
  695           .. (2 indent ) Simultaneous etching and coating
  696           .. (2 indent ) Coating of sidewall
  697           .. (2 indent ) Planarization by etching and coating
  698           ... (3 indent ) Utilizing reflow
  699           ... (3 indent ) Plural coating steps
  700           .. (2 indent ) Formation of groove or trench
  701           ... (3 indent ) Tapered configuration
  702           ... (3 indent ) Plural coating steps
  703           .. (2 indent ) Plural coating steps
  704           . (1 indent ) Having liquid and vapor etching steps
  705           . (1 indent ) Altering etchability of substrate region by compositional or crystalline modification
  706           . (1 indent ) Vapor phase etching (i.e., dry etching)
  707           .. (2 indent ) Utilizing electromagnetic or wave energy
  708           ... (3 indent ) Photo-induced etching
  709           .... (4 indent ) Photo-induced plasma etching
  710           ... (3 indent ) By creating electric field (e.g., plasma, glow discharge, etc.)
  711           .... (4 indent ) Utilizing multiple gas energizing means
  712           .... (4 indent ) Reactive ion beam etching (i.e., RIBE)
  713           .... (4 indent ) Forming tapered profile (e.g., tapered etching, etc.)
  714           .... (4 indent ) Including change in etch influencing parameter (e.g., energizing power, etchant composition, temperature, etc.)
  715           .... (4 indent ) With substrate heating or cooling
  716           .... (4 indent ) With substrate handling (e.g., conveying, etc.)
  717           .... (4 indent ) Utilizing multilayered mask
  718           .... (4 indent ) Compound semiconductor
  719           .... (4 indent ) Silicon
  720           .... (4 indent ) Electrically conductive material (e.g., metal, conductive oxide, etc.)
  721           .... (5 indent ) Silicide
  722           .... (4 indent ) Metal oxide
  723           .... (4 indent ) Silicon oxide or glass
  724           .... (4 indent ) Silicon nitride
  725           .... (4 indent ) Organic material (e.g., resist, etc.)
  726           .... (4 indent ) Having microwave gas energizing
  727           .... (5 indent ) Producing energized gas remotely located from substrate
  728           ..... (6 indent ) Using magnet (e.g., electron cyclotron resonance, etc.)
  729           .... (4 indent ) Using specified electrode/susceptor configuration (e.g., of multiple substrates using barrel-type susceptor, planar reactor configuration, etc.) to generate plasma
  730           .... (5 indent ) Producing energized gas remotely located from substrate
  731           ..... (6 indent ) Using intervening shield structure
  732           .... (4 indent ) Using magnet (e.g., electron cyclotron resonance, etc.)
  733           ... (3 indent ) Using or orientation dependent etchant (i.e., anisotropic etchant)
  734           .. (2 indent ) Sequential etching steps on a single layer
  735           .. (2 indent ) Differential etching of semiconductor substrate
  736           ... (3 indent ) Utilizing multilayered mask
  737           ... (3 indent ) Substrate possessing multiple layers
  738           .... (4 indent ) Selectively etching substrate possessing multiple layers of differing etch characteristics
  739           .... (5 indent ) Lateral etching of intermediate layer (i.e., undercutting)
  740           .... (5 indent ) Utilizing etch stop layer
  741           ..... (6 indent ) PN junction functions as etch stop
  742           .... (4 indent ) Electrically conductive material (e.g., metal, conductive oxide, etc.)
  743           .... (4 indent ) Silicon oxide or glass
  744           .... (4 indent ) Silicon nitride
  745           . (1 indent ) Liquid phase etching
  746           .. (2 indent ) Utilizing electromagnetic or wave energy
  747           .. (2 indent ) With relative movement between substrate and confined pool of etchant
  748           .. (2 indent ) Projection of etchant against a moving substrate or controlling the angle or pattern of projected etchant
  749           .. (2 indent ) Sequential application of etchant
  750           ... (3 indent ) To same side of substrate
  751           .... (4 indent ) Each etch step exposes surface of an adjacent layer
  752           .. (2 indent ) Germanium
  753           .. (2 indent ) Silicon
  754           .. (2 indent ) Electrically conductive material (e.g., metal, conductive oxide, etc.)
  755           ... (3 indent ) Silicide
  756           .. (2 indent ) Silicon oxide
  757           .. (2 indent ) Silicon nitride
  758           COATING OF SUBSTRATE CONTAINING SEMICONDUCTOR REGION OR OF SEMICONDUCTOR SUBSTRATE
  759           . (1 indent ) Combined with the removal of material by nonchemical means
  760           . (1 indent ) Utilizing reflow (e.g., planarization, etc.)
  761           . (1 indent ) Multiple layers
  762           .. (2 indent ) At least one layer formed by reaction with substrate
  763           .. (2 indent ) Layers formed of diverse composition or by diverse coating processes
  764           . (1 indent ) Formation of semi-insulative polycrystalline silicon
  765           . (1 indent ) By reaction with substrate
  766           .. (2 indent ) Implantation of ion (e.g., to form ion amorphousized region prior to selective oxidation, reacting with substrate to form insulative region, etc.)
  767           .. (2 indent ) Compound semiconductor substrate
  768           .. (2 indent ) Reaction with conductive region
  769           .. (2 indent ) Reaction with silicon semiconductive region (e.g., oxynitride formation, etc.)
  770           ... (3 indent ) Oxidation
  771           .... (4 indent ) Using electromagnetic or wave energy
  772           .... (5 indent ) Microwave gas energizing
  773           .... (4 indent ) In atmosphere containing water vapor (i.e., wet oxidation)
  774           .... (4 indent ) In atmosphere containing halogen
  775           ... (3 indent ) Nitridation
  776           .... (4 indent ) Using electromagnetic or wave energy
  777           .... (5 indent ) Microwave gas energizing
  778           . (1 indent ) Insulative material deposited upon semiconductive substrate
  779           .. (2 indent ) Compound semiconductor substrate
  780           .. (2 indent ) Depositing organic material (e.g., polymer, etc.)
  781           ... (3 indent ) Subsequent heating modifying organic coating composition
  782           .. (2 indent ) With substrate handling during coating (e.g., immersion, spinning, etc.)
  783           .. (2 indent ) Insulative material having impurity (e.g., for altering physical characteristics, etc.)
  784           ... (3 indent ) Introduction simultaneous with deposition
  785           .. (2 indent ) Insulative material is compound of refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)
  786           .. (2 indent ) Tertiary silicon containing compound formation (e.g., oxynitride formation, etc.)
  787           .. (2 indent ) Silicon oxide formation
  788           ... (3 indent ) Using electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.)
  789           .... (4 indent ) Organic reactant
  790           ... (3 indent ) Organic reactant
  791           .. (2 indent ) Silicon nitride formation
  792           ... (3 indent ) Utilizing electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.)
  793           .... (4 indent ) Organic reactant
  794           ... (3 indent ) Organic reactant
  795           RADIATION OR ENERGY TREATMENT MODIFYING PROPERTIES OF SEMICONDUCTOR REGION OF SUBSTRATE (E.G., THERMAL, CORPUSCULAR, ELECTROMAGNETIC, ETC.)
  796           . (1 indent ) Compound semiconductor
  797           .. (2 indent ) Ordering or disordering
  798           . (1 indent ) Ionized irradiation (e.g., corpuscular or plasma treatment, etc.)
  799           . (1 indent ) By differential heating
  800           MISCELLANEOUS
 
 CROSS-REFERENCE ART COLLECTIONS
 
  900           BULK EFFECT DEVICE MAKING
  901           CAPACITIVE JUNCTION
  902           CAPPING LAYER
  903           CATALYST AIDED DEPOSITION
  904           CHARGE CARRIER LIFETIME CONTROL
  905           CLEANING OF REACTION CHAMBER
  906           CLEANING OF WAFER AS INTERIM STEP
  907           CONTINUOUS PROCESSING
  908           . (1 indent ) Utilizing cluster apparatus
  909           CONTROLLED ATMOSPHERE
  910           CONTROLLING CHARGING STATE AT SEMICONDUCTOR-INSULATOR INTERFACE
  911           DIFFERENTIAL OXIDATION AND ETCHING
  912           DISPLACING PN JUNCTION
  913           DIVERSE TREATMENTS PERFORMED IN UNITARY CHAMBER
  914           DOPING
  915           . (1 indent ) Amphoteric doping
  916           . (1 indent ) Autodoping control or utilization
  917           . (1 indent ) Deep level dopants (e.g., gold (Au), chromium (Cr), iron (Fe), nickel (Ni), etc.)
  918           . (1 indent ) Special or nonstandard dopant
  919           . (1 indent ) Compensation doping
  920           . (1 indent ) Controlling diffusion profile by oxidation
  921           . (1 indent ) Nonselective diffusion
  922           . (1 indent ) Diffusion along grain boundaries
  923           . (1 indent ) Diffusion through a layer
  924           . (1 indent ) To facilitate selective etching
  925           . (1 indent ) Fluid growth doping control (e.g., delta doping, etc.)
  926           DUMMY METALLIZATION
  927           ELECTROMIGRATION RESISTANT METALLIZATION
  928           FRONT AND REAR SURFACE PROCESSING
  929           EUTECTIC SEMICONDUCTOR
  930           TERNARY OR QUATERNARY SEMICONDUCTOR COMPRISED OF ELEMENTS FROM THREE DIFFERENT GROUPS (E.G., I-III-V, ETC.)
  931           SILICON CARBIDE SEMICONDUCTOR
  932           BORON NITRIDE SEMICONDUCTOR
  933           GERMANIUM OR SILICON OR GE-SI ON III-V
  934           SHEET RESISTANCE (I.E., DOPANT PARAMETERS)
  935           GAS FLOW CONTROL
  936           GRADED ENERGY GAP
  937           HILLOCK PREVENTION
  938           LATTICE STRAIN CONTROL OR UTILIZATION
  939           LANGMUIR-BLODGETT FILM UTILIZATION
  940           LASER ABLATIVE MATERIAL REMOVAL
  941           LOADING EFFECT MITIGATION
  942           MASKING
  943           . (1 indent ) Movable
  944           . (1 indent ) Shadow
  945           . (1 indent ) Special (e.g., metal, etc.)
  946           . (1 indent ) Step and repeat
  947           . (1 indent ) Subphotolithographic processing
  948           . (1 indent ) Radiation resist
  949           .. (2 indent ) Energy beam treating radiation resist on semiconductor
  950           .. (2 indent ) Multilayer mask including nonradiation sensitive layer
  951           .. (2 indent ) Lift-off
  952           .. (2 indent ) Utilizing antireflective layer
  953           MAKING RADIATION RESISTANT DEVICE
  954           MAKING OXIDE-NITRIDE-OXIDE DEVICE
  955           MELT-BACK
  956           MAKING MULTIPLE WAVELENGTH EMISSIVE DEVICE
  957           MAKING METAL-INSULATOR-METAL DEVICE
  958           PASSIVATION LAYER
  959           MECHANICAL POLISHING OF WAFER
  960           POROUS SEMICONDUCTOR
  961           ION BEAM SOURCE AND GENERATION
  962           QUANTUM DOTS AND LINES
  963           REMOVING PROCESS RESIDUES FROM VERTICAL SUBSTRATE SURFACES
  964           ROUGHENED SURFACE
  965           SHAPED JUNCTION FORMATION
  966           SELECTIVE OXIDATION OF ION-AMORPHOUSIZED LAYER
  967           SEMICONDUCTOR ON SPECIFIED INSULATOR
  968           SEMICONDUCTOR-METAL-SEMICONDUCTOR
  969           SIMULTANEOUS FORMATION OF MONOCRYSTALLINE AND POLYCRYSTALLINE REGIONS
  970           SPECIFIED ETCH STOP MATERIAL
  971           STOICHIOMETRIC CONTROL OF HOST SUBSTRATE COMPOSITION
  972           STORED CHARGE ERASURE
  973           SUBSTRATE ORIENTATION
  974           SUBSTRATE SURFACE PREPARATION
  975           SUBSTRATE OR MASK ALIGNING FEATURE
  976           TEMPORARY PROTECTIVE LAYER
  977           THINNING OR REMOVAL OF SUBSTRATE
  978           FORMING TAPERED EDGES ON SUBSTRATE OR ADJACENT LAYERS
  979           TUNNEL DIODES
  980           UTILIZING PROCESS EQUIVALENTS OR OPTIONS
  981           UTILIZING VARYING DIELECTRIC THICKNESS
  982           VARYING ORIENTATION OF DEVICES IN ARRAY
  983           ZENER DIODES
 
 FOREIGN ART COLLECTIONS
 
  FOR000           CLASS-RELATED FOREIGN DOCUMENTS
 Any foreign patents or non-patent literature from subclasses that have been reclassified have been transferred directly to FOR Collections listed below. These Collections contain ONLY foreign patents or non-patent literature. The parenthetical references in the Collection titles refer to the abolished subclasses from which these Collections were derived.
 
             METHODS (156/1)
  FOR100           . (1 indent ) Etching of semiconductor precursor, substrates, and devices used in an electrical function (156/625.1)
  FOR101           .. (2 indent ) Measuring, testing, or inspecting (156/626.1)
  FOR102           ... (3 indent ) By electrical means or of electrical property (156/627.1)
  FOR103           .. (2 indent ) Altering the etchability of a substrate by alloying, diffusing, or chemical reacting (156/628.1)
  FOR104           .. (2 indent ) With uniting of preforms (e.g., laminating, etc.) (156/629.1)
  FOR105           ... (3 indent ) Prior to etching (156/630.1)
  FOR106           .... (4 indent ) Delamination subsequent to etching (156/631.1)
  FOR107           .... (4 indent ) With coating (156/632.1)
  FOR108           ... (3 indent ) Differential etching (156/633.1)
  FOR109           .... (4 indent ) Metal layer etched (156/634.1)
  FOR110           .. (2 indent ) With in situ activation or combining of etching components on surface (156/635.1)
  FOR111           .. (2 indent ) With thin film of etchant between relatively moving substrate and conforming surface (e.g., chemical lapping, etc.) (156/636.1)
  FOR112           .. (2 indent ) With relative movement between the substrate and a confined pool of etchant (156/637.1)
  FOR113           ... (3 indent ) With removal of adhered reaction product from substrate (156/638.1)
  FOR114           ... (3 indent ) With substrate rotation, repeated dipping, or advanced movement (156/639.1)
  FOR115           .. (2 indent ) Projection of etchant against a moving substrate or controlling the angle or pattern of projected etchant (156/640.1)
  FOR116           .. (2 indent ) Recycling or regenerating etchant (156/642.1)
  FOR117           .. (2 indent ) With treatment by high energy radiation or plasma (e.g., ion beam, etc.) (156/643.1)
  FOR118           .. (2 indent ) Forming or increasing the size of an aperture (156/644.1)
  FOR119           .. (2 indent ) With mechanical deformation, severing, or abrading of a substrate (156/ 645.1)
  FOR120           .. (2 indent ) Etchant is a gas (156/646.1)
  FOR121           .. (2 indent ) Etching according to crystalline planes (156/647.1)
  FOR122           .. (2 indent ) Etching isolates or modifies a junction in a barrier layer (156/648.1)
  FOR123           ... (3 indent ) Discrete junction isolated (e.g., mesa formation, etc.) (156/649.1)
  FOR124           .. (2 indent ) Sequential application of etchant material (156/650.1)
  FOR125           ... (3 indent ) Sequentially etching the same surface of a substrate (156/651.1)
  FOR126           .... (4 indent ) Each etching exposes surface of an adjacent layer (156/652.1)
  FOR127           .... (5 indent ) Etched layer contains silicon (e.g., oxide, nitride, etc.) (156/653.1)
  FOR128           .. (2 indent ) Differential etching of a substrate (156/654.1)
  FOR129           ... (3 indent ) Composite substrate (156/655.1)
  FOR130           .... (4 indent ) Substrate contains metallic element or compound (156/656.1)
  FOR131           .... (4 indent ) Substrate contains silicon or silicon compound (156/657.1)
  FOR132           ... (3 indent ) Resist coating (156/659.11)
  FOR133           .... (4 indent ) Plural resist coating (156/661.11)
  FOR134           .. (2 indent ) Silicon, germanium, or gallium containing substrate (156/662.1)
  FOR135           MAKING DEVICE HAVING ORGANIC SEMICONDUCTOR COMPONENT (437/1)
  FOR136           MAKING DEVICE RESPONSIVE TO RADIATION (437/2)
  FOR137           . (1 indent ) Radiation detectors, e.g., infrared, etc. (437/3)
  FOR138           . (1 indent ) Composed of polycrystalline material (437/4)
  FOR139           . (1 indent ) Having semiconductor compound (437/5)
  FOR140           MAKING THYRISTOR, E.G., DIAC, TRIAC, ETC. (437/6)
  FOR141           INCLUDING CONTROL RESPONSIVE TO SENSED CONDITION (437/7)
  FOR142           INCLUDING TESTING OR MEASURING (437/8)
  FOR143           INCLUDING APPLICATION OF VIBRATORY FORCE (437/9)
  FOR144           INCLUDING GETTERING (437/10)
  FOR145           . (1 indent ) By ion implanting or irradiating (437/11)
  FOR146           . (1 indent ) By layers which are coated, contacted, or diffused (437/12)
  FOR147           . (1 indent ) By vapor phase surface reaction (437/13)
  FOR148           THERMOMIGRATION (437/14)
  FOR149           INCLUDING FORMING A SEMICONDUCTOR JUNCTION (437/15)
  FOR150           . (1 indent ) Using energy beam to introduce dopant or modify dopant distribution (437/ 16)
  FOR151           .. (2 indent ) Neutron, gamma ray or electron beam (437/17)
  FOR152           .. (2 indent ) Ionized molecules (437/18)
  FOR153           .. (2 indent ) Coherent light beam (437/19)
  FOR154           .. (2 indent ) Ion beam implantation (437/20)
  FOR155           .. (2 indent ) Of semiconductor on insulating substrate (437/21)
  FOR156           ... (3 indent ) Of semiconductor compound (437/22)
  FOR157           .... (4 indent ) Light emitting diode (LED) (437/23)
  FOR158           ... (3 indent ) Providing nondopant ion including proton (437/24)
  FOR159           ... (3 indent ) Providing auxiliary heating (437/25)
  FOR160           ... (3 indent ) Forming buried region (437/26)
  FOR161           ... (3 indent ) Including multiple implantations of same region (437/27)
  FOR162           .... (4 indent ) Through insulating layer (437/28)
  FOR163           .... (5 indent ) Forming field effect transistor (FET) type device (437/29)
  FOR164           .... (4 indent ) Using same conductivity type dopant (437/30)
  FOR165           .... (4 indent ) Forming bipolar transistor (NPN/PNP) (437/31)
  FOR166           .... (5 indent ) Lateral bipolar transistor (437/32)
  FOR167           .... (5 indent ) Having dielectric isolation (437/33)
  FOR168           .... (4 indent ) Forming complementary MOS (metal oxide semiconductor) (437/34)
  FOR169           ... (3 indent ) Using oblique beam (437/35)
  FOR170           ... (3 indent ) Using shadow mask (437/36)
  FOR171           ... (3 indent ) Having projected range less than thickness of dielectrics on substrate (437/37)
  FOR172           ... (3 indent ) Into shaped or grooved semiconductor substrate (437/38)
  FOR173           ... (3 indent ) Involving Schottky contact formation (437/39)
  FOR202           .... (4 indent ) Gate structure constructed of diverse dielectrics (437/42)
  FOR203           .... (5 indent ) Gate surrounded by dielectric layer, e.g., floating gate, etc. (437/43)
  FOR204           .... (5 indent ) Adjusting channel dimension (437/44)
  FOR205           .... (5 indent ) Active step for controlling threshold voltage (437/45)
  FOR185           .... (5 indent ) Self-aligned (437/41 R)
  FOR186           .... (5 indent ) With bipolar (437/41 RBP)
  FOR187           .... (5 indent ) CMOS (437/41 RCM)
  FOR188           .... (5 indent ) Lightly doped drain (437/41 RLD)
  FOR189           .... (5 indent ) Memory devices (437/41 RMM)
  FOR190           .... (5 indent ) Asymmetrical FET (437/41 AS)
  FOR191           .... (5 indent ) Channel specifics (437/41 CS)
  FOR192           .... (5 indent ) DMOS/vertical FET (437/41 DM)
  FOR193           .... (5 indent ) Gate specifics (437/41 GS)
  FOR194           .... (5 indent ) Junction FET/static induction transistor (437/41 JF)
  FOR195           .... (5 indent ) Layered channel (437/41 LC)
  FOR196           .... (5 indent ) Specifics of metallization/contact (437/41 SM)
  FOR197           .... (5 indent ) Recessed gate (Schottky falls below in SH) (437/41 RG)
  FOR198           .... (5 indent ) Schottky gate/MESFET (437/41 SH)
  FOR199           .... (5 indent ) Sidewall (437/41 SW)
  FOR200           .... (5 indent ) Thin film transistor, inverted (437/41 TFI)
  FOR201           .... (5 indent ) Thin film transistor (437/41 TFT)
  FOR174           .... (4 indent ) Forming pair of device regions separated by gate structure, i.e., FET (437/40 R)
  FOR175           .... (4 indent ) Asymmetrical FET (any asymmetry in S/D profile, gate spacing, etc.) (437/40 AS)
  FOR176           .... (4 indent ) DMOS/vertical FET (437/40 DM)
  FOR177           .... (4 indent ) Gate specific (specifics of gate insulator/structure/material/ contact) (437/40 GS)
  FOR178           .... (4 indent ) Junction FET/static induction transistor (437/40 JF)
  FOR179           .... (4 indent ) Layered channel (e.g., HEMT, MODFET, 2DEG, heterostructure FETS) (437/40 LC)
  FOR180           .... (4 indent ) Recessed gate (437/40 RG)
  FOR181           .... (4 indent ) Schottky gate/MESFET (controls over RG) (437/40 SH)
  FOR182           .... (4 indent ) Sidewall (not LDD`s) (437/40 SW)
  FOR183           .... (4 indent ) Thin film transistor inverted/staggered (437/40 TFI)
  FOR184           .... (4 indent ) Thin film transistor (437/40 TFT)
  FOR206           ... (3 indent ) Into polycrystalline or polyamorphous regions (437/46)
  FOR207           ... (3 indent ) Integrating active with passive devices (437/47)
  FOR208           ... (3 indent ) Forming plural active devices in grid/array, e.g., RAMS/ROMS, etc. (437/48)
  FOR209           .... (4 indent ) Having multiple-level electrodes (437/49)
  FOR210           ... (3 indent ) Forming electrodes in laterally spaced relationships (437/50)
  FOR211           . (1 indent ) Making assemblies of plural individual devices having community feature, e.g., integrated circuit, electrical connection, etc. (437/51)
  FOR212           .. (2 indent ) Memory devices (437/52)
  FOR213           .. (2 indent ) Charge coupled devices (CCD) (437/53)
  FOR214           .. (2 indent ) Diverse types (437/54)
  FOR215           ... (3 indent ) Integrated injection logic (I2L) circuits (437/55)
  FOR216           ... (3 indent ) Plural field effect transistors (CMOS) (437/56)
  FOR217           .... (4 indent ) Complementary metal oxide having diverse conductivity source and drain regions (437/57)
  FOR218           .... (4 indent ) Having like conductivity source and drain regions (437/58)
  FOR219           ... (3 indent ) Including field effect transistor (437/59)
  FOR220           ... (3 indent ) Including passive device (437/60)
  FOR221           . (1 indent ) Including isolation step (437/61)
  FOR222           .. (2 indent ) By forming total dielectric isolation (437/62)
  FOR223           .. (2 indent ) By forming vertical isolation combining dielectric and PN junction (437/63)
  FOR224           .. (2 indent ) Using vertical dielectric (air-gap/insulator) and horizontal PN junction (437/64)
  FOR225           ... (3 indent ) Grooved air-gap only (437/65)
  FOR226           .... (4 indent ) V-groove (437/66)
  FOR227           ... (3 indent ) Grooved and refilled with insulator (437/67)
  FOR228           .... (4 indent ) V-groove (437/68)
  FOR229           ... (3 indent ) Recessed oxide by localized oxidation (437/69)
  FOR230           .... (4 indent ) Preliminary formation of guard ring (437/70)
  FOR231           .... (4 indent ) Preliminary anodizing (437/71)
  FOR232           .... (4 indent ) Preliminary etching of groove (437/72)
  FOR233           .... (5 indent ) Using overhanging oxidation mask and pretreatment of recessed walls (437/ 73)
  FOR234           .. (2 indent ) Isolation by PN junction only (437/74)
  FOR235           ... (3 indent ) By diffusion from upper surface only (437/75)
  FOR236           ... (3 indent ) By up-diffusion from substrate region and down diffusion into upper surface layer (437/76)
  FOR237           .... (4 indent ) Substrate and epitaxial regions of same conductivity type, i.e., P or N (437/77)
  FOR238           ... (3 indent ) By etching and refilling with semiconductor material having diverse conductivity (437/78)
  FOR239           ... (3 indent ) Using polycrystalline region (437/79)
  FOR240           . (1 indent ) Shadow masking (437/80)
  FOR241           . (1 indent ) Doping during fluid growth of semiconductor material on substrate (437/81)
  FOR242           .. (2 indent ) Including heat to anneal (437/82)
  FOR243           .. (2 indent ) Growing single crystal on amorphous substrate (437/83)
  FOR244           .. (2 indent ) Growing single crystal on single crystal insulator (SOS) (437/84)
  FOR245           .. (2 indent ) Including purifying stage during growth (437/85)
  FOR246           .. (2 indent ) Using transitory substrate (437/86)
  FOR247           .. (2 indent ) Using inert atmosphere (437/87)
  FOR248           .. (2 indent ) Using catalyst to alter growth process (437/88)
  FOR249           .. (2 indent ) Growth through opening (437/89)
  FOR250           ... (3 indent ) Forming recess in substrate and refilling (437/90)
  FOR251           .... (4 indent ) By liquid phase epitaxy (437/91)
  FOR252           ... (3 indent ) By liquid phase epitaxy (437/92)
  FOR253           .. (2 indent ) Specified crystal orientation other than (100) or (111) planes (437/93)
  FOR254           .. (2 indent ) Introducing minority carrier life time reducing dopant during growth, i.e., deep level dopant Au (Gold), Cr (Cromium), Fe (Iron), Ni (Nickel), etc. (437/94)
  FOR255           .. (2 indent ) Autodoping control (437/95)
  FOR256           ... (3 indent ) Compound formed from Group III and Group V elements (437/96)
  FOR257           .. (2 indent ) Forming buried regions with outdiffusion control (437/97)
  FOR258           ... (3 indent ) Plural dopants simultaneously outdiffusioned (437/98)
  FOR259           .. (2 indent ) Growing mono and polycrystalline regions simultaneously (437/99)
  FOR260           .. (2 indent ) Growing silicon carbide (SiC) (437/100)
  FOR261           .. (2 indent ) Growing amorphous semiconductor material (437/101)
  FOR262           .. (2 indent ) Source and substrate in close-space relationship (437/102)
  FOR263           ... (3 indent ) Group IV elements (437/103)
  FOR264           ... (3 indent ) Compound formed from Group III and Group V elements (437/104)
  FOR265           .. (2 indent ) Vacuum growing using molecular beam, i.e., vacuum deposition (437/105)
  FOR266           ... (3 indent ) Group IV elements (437/106)
  FOR267           ... (3 indent ) Compound formed from Group III and Group V elements (437/107)
  FOR268           .. (2 indent ) Growing single layer in multi-steps (437/108)
  FOR269           ... (3 indent ) Polycrystalline layers (437/109)
  FOR270           ... (3 indent ) Using modulated dopants or materials, e.g., superlattice, etc. (437/110)
  FOR271           ... (3 indent ) Using preliminary or intermediate metal layer (437/111)
  FOR272           ... (3 indent ) Growing by varying rates (437/112)
  FOR273           .. (2 indent ) Using electric current, e.g., Peltier effect, glow discharge, etc. (437/ 113)
  FOR274           .. (2 indent ) Using seed in liquid phase (437/114)
  FOR275           ... (3 indent ) Pulling from melt (437/115)
  FOR276           .... (4 indent ) And diffusing (437/116)
  FOR277           .. (2 indent ) Liquid and vapor phase epitaxy in sequence (437/117)
  FOR278           .. (2 indent ) Involving capillary action (437/118)
  FOR279           .. (2 indent ) Sliding liquid phase epitaxy (437/119)
  FOR280           ... (3 indent ) Modifying melt composition (437/120)
  FOR281           ... (3 indent ) Controlling volume or thickness of growth (437/121)
  FOR282           ... (3 indent ) Preliminary dissolving substrate surface (437/122)
  FOR283           ... (3 indent ) With nonlinear slide movement (437/123)
  FOR284           ... (3 indent ) One melt simultaneously contacting plural substrates (437/124)
  FOR285           .. (2 indent ) Tipping liquid phase epitaxy (437/125)
  FOR286           .. (2 indent ) Heteroepitaxy (437/126)
  FOR287           ... (3 indent ) Multi-color light emitting diode (LED) (437/127)
  FOR288           ... (3 indent ) Graded composition (437/128)
  FOR289           ... (3 indent ) Forming laser (437/129)
  FOR290           ... (3 indent ) By liquid phase epitaxy (437/130)
  FOR291           ... (3 indent ) Si (Silicon on Ge (Germanium) or Ge (Germanium) on Si (Silicon) (437/131)
  FOR292           ... (3 indent ) Either Si (Silicon) or Ge (Germanium) layered with or on compound formed from Group III and Group V elements (437/132)
  FOR293           ... (3 indent ) Compound formed from Group III and Group V elements on diverse Group III and Group V including substituted Group III and Group V compounds (437/133)
  FOR294           . (1 indent ) By fusing dopant with substrate, e.g., alloying, etc. (437/134)
  FOR295           .. (2 indent ) Using flux (437/135)
  FOR296           .. (2 indent ) Passing electric current through material (437/136)
  FOR297           .. (2 indent ) With application of pressure to material during fusing (437/137)
  FOR298           .. (2 indent ) Including plural controlled heating or cooling steps (437/138)
  FOR299           .. (2 indent ) Including diffusion after fusion step (437/139)
  FOR300           .. (2 indent ) Including additional material to improve wettability or flow characteristics (437/140)
  FOR301           . (1 indent ) Diffusing a dopant (437/141)
  FOR302           .. (2 indent ) To control carrier lifetime, i.e., deep level dopant Au (Gold), Cr (Chromium), Fe (Iron), Ni (Nickel), etc. (437/142)
  FOR303           .. (2 indent ) Al (Aluminum) dopant (437/143)
  FOR304           .. (2 indent ) Li (Lithium) dopant (437/144)
  FOR305           .. (2 indent ) Including nonuniform heating (437/145)
  FOR306           .. (2 indent ) To solid state solubility concentration (437/146)
  FOR307           .. (2 indent ) Using multiple layered mask (437/147)
  FOR308           ... (3 indent ) Having plural predetermined openings in master mask (437/148)
  FOR309           .. (2 indent ) Forming partially overlapping regions (437/149)
  FOR310           .. (2 indent ) Plural dopants in same region, e.g., through same mask opening, etc. (437/150)
  FOR311           ... (3 indent ) Simultaneously (437/151)
  FOR312           .. (2 indent ) Plural dopants simultaneously in plural region (437/152)
  FOR313           .. (2 indent ) Single dopant forming plural diverse regions (437/153)
  FOR314           ... (3 indent ) Forming regions of different concentrations or different depths (437/154)
  FOR315           .. (2 indent ) Using metal mask (437/155)
  FOR316           .. (2 indent ) Outwardly (437/156)
  FOR317           .. (2 indent ) Laterally under mask (437/157)
  FOR318           .. (2 indent ) Edge diffusion by using edge portion of structure other than masking layer to mask (437/158)
  FOR319           .. (2 indent ) From melt (437/159)
  FOR320           .. (2 indent ) From solid dopant source in contact with substrate (437/160)
  FOR321           ... (3 indent ) Using capping layer over dopant source to prevent outdiffusion of dopant (437/161)
  FOR322           ... (3 indent ) Polycrystalline semiconductor source (437/162)
  FOR323           ... (3 indent ) Organic source (437/163)
  FOR324           ... (3 indent ) Glassy source or doped oxide (437/164)
  FOR325           .. (2 indent ) From vapor phase (437/165)
  FOR326           ... (3 indent ) In plural stages (437/166)
  FOR327           ... (3 indent ) Zn (Zinc) dopant (437/167)
  FOR328           ... (3 indent ) Solid source is operative relation with semiconductor material (437/168)
  FOR329           .... (4 indent ) In capsule type enclosure (437/169)
  FOR330           DIRECTLY APPLYING ELECTRICAL CURRENT (437/170)
  FOR331           . (1 indent ) And regulating temperature (437/171)
  FOR332           . (1 indent ) Alternating or pulsed current (437/172)
  FOR333           APPLYING CORPUSCULAR OR ELECTROMAGNETIC ENERGY (437/173)
  FOR334           . (1 indent ) To anneal (437/174)
  FOR335           FORMING SCHOTTKY CONTACT (437/175)
  FOR336           . (1 indent ) On semiconductor compound (437/176)
  FOR337           .. (2 indent ) Multi-layer electrode (437/177)
  FOR338           . (1 indent ) Using platinum group silicide, i.e., silicide of Pt (Platinum), Pd (Palladium), Rh (Rhodium), Ru (Ruthenium), Ir (Iridium), Os (Osmium) (437/178)
  FOR339           . (1 indent ) Using metal, i.e., Pt (Platinum), Pd (Palladium), Rh (Rhodium), Ru (Ruthenium), Ir (Iridium), Os (Osmium), Au (Gold), Ag (Silver) (437/179)
  FOR340           MAKING OR ATTACHING ELECTRODE ON OR TO SEMICONDUCTOR, OR SECURING COMPLETED SEMICONDUCTOR TO MOUNTING OR HOUSING (437/180)
  FOR341           . (1 indent ) Forming transparent electrode (437/181)
  FOR342           . (1 indent ) Forming beam electrode (437/182)
  FOR343           . (1 indent ) Forming bump electrode (437/183)
  FOR344           . (1 indent ) Electrode formed on substrate composed of elements of Group III and Group V semiconductor compound (437/184)
  FOR345           . (1 indent ) Electrode formed on substrate composed of elements of Group II and Group VI semiconductor compound (437/185)
  FOR346           . (1 indent ) Single polycrystalline electrode layer on substrate (437/186)
  FOR347           . (1 indent ) Single metal layer electrode on substrate (437/187)
  FOR348           .. (2 indent ) Subsequently fusing, e.g., alloying, sintering, etc. (437/188)
  FOR349           . (1 indent ) Forming plural layered electrode (437/189)
  FOR350           .. (2 indent ) Including central layer acting as barrier between outer layers (437/190)
  FOR351           .. (2 indent ) Of polysilicon only (437/191)
  FOR352           .. (2 indent ) Including refractory metal layer of Ti (Titanium), Zr (Zirconium), Hf (Hafnium), V (Vanadium), Nb (Niobium), Ta (Tantalum), Cr (Chromium), Mo (Molybdenum), W (Tungsten) (437/192)
  FOR353           .. (2 indent ) Including polycrystalline silicon layer (437/193)
  FOR354           .. (2 indent ) Including Al (Aluminum) layer (437/194)
  FOR355           .. (2 indent ) Including layer separated by insulator (437/195)
  FOR356           . (1 indent ) Forming electrode of alloy or electrode of a compound of Si (Silicon) (437/196)
  FOR357           .. (2 indent ) Al (Aluminum) alloy (437/197)
  FOR358           ... (3 indent ) Including Cu (Copper) (437/198)
  FOR359           ... (3 indent ) Including Si (Silicon) (437/199)
  FOR360           .. (2 indent ) Silicide of Ti (Titanium), Zr (Zirconium), Hf (Hafnium), V (Vanadium), Nb (Niobium), Ta (Tantalum), Cr (Chromium), Mo (Molybdenum), W (Tungsten), (437/200)
  FOR361           .. (2 indent ) Of plantinum metal group Ru (Ruthenium), Rh (Rhodium), Pd (Palladium), Os (Osmium), Ir (Iridium), Pt (Platinum) (437/201)
  FOR362           .. (2 indent ) By fusing metal with semiconductor (alloying) (437/202)
  FOR363           . (1 indent ) Depositing electrode in preformed recess in substrate (437/203)
  FOR364           . (1 indent ) Including positioning of point contact (437/204)
  FOR365           . (1 indent ) Making plural devices (437/205)
  FOR366           .. (2 indent ) Using strip lead frame (437/206)
  FOR367           ... (3 indent ) And encapsulating (437/207)
  FOR368           .. (2 indent ) Stacked array, e.g., rectifier, etc. (437/208)
  FOR369           . (1 indent ) Securing completed semiconductor to mounting, housing or external lead (437/209)
  FOR370           .. (2 indent ) Including contaminant removal (437/210)
  FOR371           .. (2 indent ) Utilizing potting or encapsulating material only to surround leads and device to maintain position, i.e. without housing (437/211)
  FOR372           ... (3 indent ) Including application of pressure (437/212)
  FOR373           ... (3 indent ) Glass material (437/213)
  FOR374           .. (2 indent ) Utilizing header (molding surface means) (437/214)
  FOR375           .. (2 indent ) Insulating housing (437/215)
  FOR376           ... (3 indent ) Including application of pressure (437/216)
  FOR377           ... (3 indent ) And lead frame (437/217)
  FOR378           ... (3 indent ) Ceramic housing (437/218)
  FOR379           ... (3 indent ) Including encapsulating (437/219)
  FOR380           .. (2 indent ) Lead frame (437/220)
  FOR381           .. (2 indent ) Metallic housing (437/221)
  FOR382           ... (3 indent ) Including application of pressure (437/222)
  FOR383           ... (3 indent ) Including glass support base (437/223)
  FOR384           ... (3 indent ) Including encapsulating (437/224)
  FOR385           INCLUDING COATING OR MATERIAL REMOVAL, E.G., ETCHING, GRINDING, ETC. (437/ 225)
  FOR386           . (1 indent ) Substrate dicing (437/226)
  FOR387           .. (2 indent ) With a perfecting coating (437/227)
  FOR388           . (1 indent ) Coating and etching (437/228)
  FOR389           . (1 indent ) Of radiation resist layer (437/229)
  FOR390           . (1 indent ) By immersion metal plating from solution, i.e., electroless plating (437/230)
  FOR391           . (1 indent ) By spinning (437/231)
  FOR392           . (1 indent ) Elemental Se (Selenium) substrate or coating (437/232)
  FOR393           . (1 indent ) Of polycrystalline semiconductor material on substrate (437/233)
  FOR394           .. (2 indent ) Semiconductor compound or mixed semiconductor material (437/234)
  FOR395           . (1 indent ) Of a dielectric or insulative material (437/235)
  FOR396           .. (2 indent ) Containing Group III atom (437/236)
  FOR397           ... (3 indent ) By reacting with substrate (437/237)
  FOR398           .. (2 indent ) Monoxide or dioxide or Ge (Germanium) or Si (Silicon) (437/238)
  FOR399           ... (3 indent ) By reacting with substrate (437/239)
  FOR400           ... (3 indent ) Doped with impurities (437/240)
  FOR401           .. (2 indent ) Si (Silicon) and N (Nitrogen) (437/241)
  FOR402           ... (3 indent ) By chemical reaction with substrate (437/242)
  FOR403           .. (2 indent ) Directly on semiconductor substrate (437/243)
  FOR404           ... (3 indent ) By chemical conversion of substrate (437/244)
  FOR405           . (1 indent ) Comprising metal layer (437/245)
  FOR406           .. (2 indent ) On metal (437/246)
  FOR407           TEMPERATURE TREATMENT MODIFYING PROPERTIES OF SEMICONDUCTOR, E.G., ANNEALING, SINTERING, ETC. (437/247)
  FOR408           . (1 indent ) Heating and cooling (437/248)
  FOR409           INCLUDING SHAPING (437/249)
  FOR410           MISCELLANEOUS (437/250)
  FOR411           UTILIZING PROCESS EQUIVALENTS OR OPTIONS (437/900)
  FOR412           MAKING PRESSURE SENSITIVE DEVICE (437/901)
  FOR413           MAKING DEVICE HAVING HEAT SINK (437/902)
  FOR414           MAKING THERMOPILE (437/903)
  FOR415           MAKING DIODE (437/904)
  FOR416           . (1 indent ) Light emmitting diode (437/905)
  FOR417           .. (2 indent ) Mounting and contact (437/906)
  FOR418           LASER PROCESSING OF FIELD EFFECT TRANSISTOR (FET) (437/907)
  FOR419           LASER PROCESSING OF TRANSISTOR (437/908)
  FOR420           MAKING TRANSISTOR ONLY (437/909)
  FOR421           MAKING JOSEPHSON JUNCTION DEVICE (437/910)
  FOR422           MAKING JUNCTION-FIELD EFFECT TRANSISTOR (J-FET) OR STATIC INDUCTION THYRSISTOR (SIT) DEVICE (437/911)
  FOR423           MAKING METAL SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MESFET) DEVICE ONLY (437/912)
  FOR424           MAKING METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) DEVICE (437/913)
  FOR425           MAKING NON-EPITAXIAL DEVICE (437/914)
  FOR426           MAKING VERTICALLY STACKED DEVICES (3-DIMENSIONAL STRUCTURE) (437/915)
  FOR427           MAKING PHOTOCATHODE OR VIDICON (437/916)
  FOR428           MAKING LATERAL TRANSISTOR (437/917)
  FOR429           MAKING RESISTOR (437/918)
  FOR430           MAKING CAPACITOR (437/919)
  FOR431           MAKING SILICON-OXIDE-NITRIDE-OXIDE ON SILICON (SONOS) DEVICE (437/920)
  FOR432           MAKING STRAIN GAGE (437/921)
  FOR433           MAKING FUSE OR FUSABLE DEVICE (437/922)
  FOR434           WITH REPAIR OR RECOVERY OF DEVICE (437/923)
  FOR435           HAVING SUBSTRATE OR MASK ALIGNING FEATURE (437/924)
  FOR436           SUBSTRATE SUPPORT OR CAPSULE CONSTRUCTION (437/925)
  FOR437           CONTINUOUS PROCESSING (437/926)
  FOR438           FORMING HOLLOW BODIES AND ENCLOSED CAVITIES (437/927)
  FOR439           ENERGY BEAM TREATING RADIATION RESIST ON SEMICONDUCTOR (437/928)
  FOR440           RADIATION ENHANCED DIFFUSION (R.E.D.) (437/929)
  FOR441           ION BEAM SOURCE AND GENERATION (437/930)
  FOR442           IMPLANTATION THROUGH MASK (437/931)
  FOR443           RECOIL IMPLANTATION (437/932)
  FOR444           DUAL SPECIES IMPLANTATION OF SEMICONDUCTOR (437/933)
  FOR445           DOPANT ACTIVATION PROCESS (437/934)
  FOR446           BEAM WRITING OF PATTERNS (437/935)
  FOR447           BEAM PROCESSING OF COMPOUND SEMICONDUCTOR DEVICE (437/936)
  FOR448           HYDROGEN PLASMA TREATMENT OF SEMICONDUCTOR DEVICE (437/937)
  FOR449           MAKING RADIATION RESISTANT DEVICE (437/938)
  FOR450           DEFECT CONTROL OF SEMICONDUCTOR WAFER (PRETREATMENT) (437/939)
  FOR451           SELECTIVE OXIDATION OF ION AMORPHOUSIZED LAYERS (437/940)
  FOR452           CONTROLLING CHARGING STATE AT SEMICONDUCTOR-INSULATOR INTERFACE (437/941)
  FOR453           INCOHERENT LIGHT PROCESSING (437/942)
  FOR454           THERMALLY ASSISTED BEAM PROCESSING (437/943)
  FOR455           UTILIZING LIFT OFF (437/944)
  FOR456           STOICHIOMETRIC CONTROL OF HOST SUBSTRATE COMPOSITION (437/945)
  FOR457           SUBSTRATE SURFACE PREPARATION (437/946)
  FOR458           FORMING TAPERED EDGES ON SUBSTRATE OR ADJACENT LAYERS (437/947)
  FOR459           MOVABLE MASK (437/948)
  FOR460           CONTROLLED ATMOSPHERE (437/949)
  FOR461           SHALLOW DIFFUSION (437/950)
  FOR462           AMPHOTERIC DOPING (437/951)
  FOR463           CONTROLLING DIFFUSION PROFILE BY OXIDATION (437/952)
  FOR464           DIFFUSION OF OVERLAPPING REGIONS (COMPENSATION) (437/953)
  FOR465           VERTICAL DIFFUSION THROUGH A LAYER (437/954)
  FOR466           NONSELECTIVE DIFFUSION (437/955)
  FOR467           DISPLACING P-N JUNCTION (437/956)
  FOR468           ELECTROMIGRATION (437/957)
  FOR469           SHAPED JUNCTION FORMATION (437/958)
  FOR470           USING NONSTANDARD DOPANT (437/959)
  FOR471           WASHED EMITTER PROCESS (437/960)
  FOR472           EMITTER DIP PREVENTION (OR UTILIZATION) (437/961)
  FOR473           UTILIZING SPECIAL MASKS (CARBON, ETC.) (437/962)
  FOR474           LOCALIZED HEATING CONTROL DURING FLUID GROWTH (437/963)
  FOR475           FLUID GROWTH INVOLVING VAPOR-LIQUID-SOLID STAGES (437/964)
  FOR476           FLUID GROWTH OF COMPOUNDS COMPOSED OF GROUPS II, IV, OR VI ELEMENTS (437/965)
  FOR477           FORMING THIN SHEETS (437/966)
  FOR478           PRODUCING POLYCRYSTALLINE SEMICONDUCTOR MATERIAL (437/967)
  FOR479           SELECTIVE OXIDATION OF POLYCRYSTALLINE LAYER (437/968)
  FOR480           FORMING GRADED ENERGY GAP LAYERS (437/969)
  FOR481           DIFFERENTIAL CRYSTAL GROWTH (437/970)
  FOR482           FLUID GROWTH DOPING CONTROL (437/971)
  FOR483           UTILIZING MELT-BACK (437/972)
  FOR484           SOLID PHASE EPITAXIAL GROWTH (437/973)
  FOR485           THINNING OR REMOVAL OF SUBSTRATE (437/974)
  FOR486           DIFFUSION ALONG GRAIN BOUNDARIES (437/975)
  FOR487           CONTROLLING LATTICE STRAIN (437/976)
  FOR488           UTILIZING ROUGHENED SURFACE (437/977)
  FOR489           UTILIZING MULTIPLE DIELECTRIC LAYERS (437/978)
  FOR490           UTILIZING THICK-THIN OXIDE FORMATION (437/979)
  FOR491           FORMING POLYCRYSTALLINE SEMICONDUCTOR PASSIVATION (437/980)
  FOR492           PRODUCING TAPERED ETCHING (437/981)
  FOR493           REFLOW OF INSULATOR (437/982)
  FOR494           OXIDATION OF GATE OR GATE CONTACT LAYER (437/983)
  FOR495           SELF-ALIGNING FEATURE (437/984)
  FOR496           DIFFERENTIAL OXIDATION AND ETCHING (437/985)
  FOR497           DIFFUSING LATERALLY AND ETCHING (437/986)
  FOR498           DIFFUSING DOPANTS IN COMPOUND SEMICONDUCTOR (437/987)


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