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[Search a list of Patent Appplications for class 257]  Class   257ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)
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When placing a mandatory classification in Class 257, a cross-reference classification is normally made in at least one of the appended E-subclasses.
[List of Patents for class 257 subclass 1]  1           BULK EFFECT DEVICE
[List of Patents for class 257 subclass 2]  2           Subclass 2 indent level is 1 Bulk effect switching in amorphous material
[List of Patents for class 257 subclass 3]  3           Subclass 3 indent level is 2 With means to localize region of conduction (e.g., "pore" structure)
[List of Patents for class 257 subclass 4]  4           Subclass 4 indent level is 2 With specified electrode composition or configuration
[List of Patents for class 257 subclass 5]  5           Subclass 5 indent level is 2 In array
[List of Patents for class 257 subclass 6]  6           Subclass 6 indent level is 1 Intervalley transfer (e.g., Gunn effect)
[List of Patents for class 257 subclass 7]  7           Subclass 7 indent level is 2 In monolithic integrated circuit
[List of Patents for class 257 subclass 8]  8           Subclass 8 indent level is 2 Three or more terminal device
[List of Patents for class 257 subclass 9]  9           THIN ACTIVE PHYSICAL LAYER WHICH IS (1) AN ACTIVE POTENTIAL WELL LAYER THIN ENOUGH TO ESTABLISH DISCRETE QUANTUM ENERGY LEVELS OR (2) AN ACTIVE BARRIER LAYER THIN ENOUGH TO PERMIT QUANTUM MECHANICAL TUNNELING OR (3) AN ACTIVE LAYER THIN ENOUGH TO PERMIT CARRIER TRANSMISSION WITH SUBSTANTIALLY NO SCATTERING (E.G., SUPERLATTICE QUANTUM WELL, OR BALLISTIC TRANSPORT DEVICE)
[List of Patents for class 257 subclass 10]  10           Subclass 10 indent level is 1 Low workfunction layer for electron emission (e.g., photocathode electron emissive layer)
[List of Patents for class 257 subclass 11]  11           Subclass 11 indent level is 2 Combined with a heterojunction involving a III-V compound
[List of Patents for class 257 subclass 12]  12           Subclass 12 indent level is 1 Heterojunction
[List of Patents for class 257 subclass 13]  13           Subclass 13 indent level is 2 Incoherent light emitter
[List of Patents for class 257 subclass 14]  14           Subclass 14 indent level is 2 Quantum well
[List of Patents for class 257 subclass 15]  15           Subclass 15 indent level is 3 Superlattice
[List of Patents for class 257 subclass 16]  16           Subclass 16 indent level is 4 Of amorphous semiconductor material
[List of Patents for class 257 subclass 17]  17           Subclass 17 indent level is 4 With particular barrier dimension
[List of Patents for class 257 subclass 18]  18           Subclass 18 indent level is 4 Strained layer superlattice
[List of Patents for class 257 subclass 19]  19           Subclass 19 indent level is 5 Si x Ge 1-x
[List of Patents for class 257 subclass 20]  20           Subclass 20 indent level is 4 Field effect device
[List of Patents for class 257 subclass 21]  21           Subclass 21 indent level is 4 Light responsive structure
[List of Patents for class 257 subclass 22]  22           Subclass 22 indent level is 4 With specified semiconductor materials
[List of Patents for class 257 subclass 23]  23           Subclass 23 indent level is 3 Current flow across well
[List of Patents for class 257 subclass 24]  24           Subclass 24 indent level is 3 Field effect device
[List of Patents for class 257 subclass 25]  25           Subclass 25 indent level is 3 Employing resonant tunneling
[List of Patents for class 257 subclass 26]  26           Subclass 26 indent level is 2 Ballistic transport device
[List of Patents for class 257 subclass 27]  27           Subclass 27 indent level is 3 Field effect transistor
[List of Patents for class 257 subclass 28]  28           Subclass 28 indent level is 1 Non-heterojunction superlattice (e.g., doping superlattice or alternating metal and insulator layers)
[List of Patents for class 257 subclass 29]  29           Subclass 29 indent level is 1 Ballistic transport device (e.g., hot electron transistor)
[List of Patents for class 257 subclass 30]  30           Subclass 30 indent level is 1 Tunneling through region of reduced conductivity
[List of Patents for class 257 subclass 31]  31           Subclass 31 indent level is 2 Josephson
[List of Patents for class 257 subclass 32]  32           Subclass 32 indent level is 3 Particular electrode material
[List of Patents for class 257 subclass 33]  33           Subclass 33 indent level is 4 High temperature (i.e., >30o Kelvin)
[List of Patents for class 257 subclass 34]  34           Subclass 34 indent level is 3 Weak link (e.g., narrowed portion of superconductive line)
[List of Patents for class 257 subclass 35]  35           Subclass 35 indent level is 3 Particular barrier material
[List of Patents for class 257 subclass 36]  36           Subclass 36 indent level is 3 With additional electrode to control conductive state of Josephson junction
[List of Patents for class 257 subclass 37]  37           Subclass 37 indent level is 2 At least one electrode layer of semiconductor material
[List of Patents for class 257 subclass 38]  38           Subclass 38 indent level is 3 Three or more electrode device
[List of Patents for class 257 subclass 39]  39           Subclass 39 indent level is 2 Three or more electrode device
[List of Patents for class 257 subclass 40]  40           ORGANIC SEMICONDUCTOR MATERIAL
[List of Patents for class 257 subclass 41]  41           POINT CONTACT DEVICE
[List of Patents for class 257 subclass 42]  42           SEMICONDUCTOR IS SELENIUM OR TELLURIUM IN ELEMENTAL FORM
[List of Patents for class 257 subclass 43]  43           SEMICONDUCTOR IS AN OXIDE OF A METAL (E.G., CUO, ZNO) OR COPPER SULFIDE
[List of Patents for class 257 subclass 44]  44           WITH METAL CONTACT ALLOYED TO ELEMENTAL SEMICONDUCTOR TYPE PN JUNCTION IN NONREGENERATIVE STRUCTURE
[List of Patents for class 257 subclass 45]  45           Subclass 45 indent level is 1 Elongated alloyed region (e.g., thermal gradient zone melting, TGZM)
[List of Patents for class 257 subclass 46]  46           Subclass 46 indent level is 1 In pn junction tunnel diode (Esaki diode)
[List of Patents for class 257 subclass 47]  47           Subclass 47 indent level is 1 In bipolar transistor structure
[List of Patents for class 257 subclass 48]  48           TEST OR CALIBRATION STRUCTURE
[List of Patents for class 257 subclass 49]  49           NON-SINGLE CRYSTAL, OR RECRYSTALLIZED, SEMICONDUCTOR MATERIAL FORMS PART OF ACTIVE JUNCTION (INCLUDING FIELD-INDUCED ACTIVE JUNCTION)
[List of Patents for class 257 subclass 50]  50           Subclass 50 indent level is 1 Non-single crystal, or recrystallized, active junction adapted to be electrically shorted (e.g., "anti-fuse" element)
[List of Patents for class 257 subclass 51]  51           Subclass 51 indent level is 1 Non-single crystal, or recrystallized, material forms active junction with single crystal material (e.g., monocrystal to polycrystal pn junction or heterojunction)
[List of Patents for class 257 subclass 52]  52           Subclass 52 indent level is 1 Amorphous semiconductor material
[List of Patents for class 257 subclass 53]  53           Subclass 53 indent level is 2 Responsive to nonelectrical external signals (e.g., light)
[List of Patents for class 257 subclass 54]  54           Subclass 54 indent level is 3 With Schottky barrier to amorphous material
[List of Patents for class 257 subclass 55]  55           Subclass 55 indent level is 3 Amorphous semiconductor is alloy or contains material to change band gap (e.g., Si x Ge 1-x , SiN y )
[List of Patents for class 257 subclass 56]  56           Subclass 56 indent level is 3 With impurity other than hydrogen to passivate dangling bonds (e.g., halide)
[List of Patents for class 257 subclass 57]  57           Subclass 57 indent level is 2 Field effect device in amorphous semiconductor material
[List of Patents for class 257 subclass 58]  58           Subclass 58 indent level is 3 With impurity other than hydrogen to passivate dangling bonds (e.g., halide)
[List of Patents for class 257 subclass 59]  59           Subclass 59 indent level is 3 In array having structure for use as imager or display, or with transparent electrode
[List of Patents for class 257 subclass 60]  60           Subclass 60 indent level is 3 With field electrode under or on a side edge of amorphous semiconductor material (e.g., vertical current path)
[List of Patents for class 257 subclass 61]  61           Subclass 61 indent level is 3 With heavily doped regions contacting amorphous semiconductor material (e.g., heavily doped source and drain)
[List of Patents for class 257 subclass 62]  62           Subclass 62 indent level is 2 With impurity other than hydrogen to passivate dangling bonds (e.g., halide)
[List of Patents for class 257 subclass 63]  63           Subclass 63 indent level is 2 Amorphous semiconductor is alloy or contains material to change band gap (e.g., Si x Ge 1-x , SiN y )
[List of Patents for class 257 subclass 64]  64           Subclass 64 indent level is 1 Non-single crystal, or recrystallized, material with specified crystal structure (e.g., specified crystal size or orientation)
[List of Patents for class 257 subclass 65]  65           Subclass 65 indent level is 1 Non-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., Ge x Si 1- x, polycrystalline silicon with dangling bond modifier)
[List of Patents for class 257 subclass 66]  66           Subclass 66 indent level is 1 Field effect device in non-single crystal, or recrystallized, Semiconductor material
[List of Patents for class 257 subclass 67]  67           Subclass 67 indent level is 2 In combination with device formed in single crystal semiconductor material (e.g., stacked FETs)
[List of Patents for class 257 subclass 68]  68           Subclass 68 indent level is 3 Capacitor element in single crystal semiconductor (e.g., DRAM)
[List of Patents for class 257 subclass 69]  69           Subclass 69 indent level is 3 Field effect transistor in single crystal material, complementary to that in non-single crystal, or recrystallized, material (e.g., CMOS)
[List of Patents for class 257 subclass 70]  70           Subclass 70 indent level is 3 Recrystallized semiconductor material
[List of Patents for class 257 subclass 71]  71           Subclass 71 indent level is 2 In combination with capacitor element (e.g., DRAM)
[List of Patents for class 257 subclass 72]  72           Subclass 72 indent level is 2 In array having structure for use as imager or display, or with transparent electrode
[List of Patents for class 257 subclass 73]  73           Subclass 73 indent level is 1 Schottky barrier to polycrystalline semiconductor material
[List of Patents for class 257 subclass 74]  74           Subclass 74 indent level is 1 Plural recrystallized semiconductor layers (e.g., "3-dimensional integrated circuit")
[List of Patents for class 257 subclass 75]  75           Subclass 75 indent level is 1 Recrystallized semiconductor material
[List of Patents for class 257 subclass 76]  76           SPECIFIED WIDE BAND GAP (1.5EV) SEMICONDUCTOR MATERIAL OTHER THAN GAASP OR GAALAS
[List of Patents for class 257 subclass 77]  77           Subclass 77 indent level is 1 Diamond or silicon carbide
[List of Patents for class 257 subclass 78]  78           Subclass 78 indent level is 1 II-VI compound
[List of Patents for class 257 subclass 79]  79           INCOHERENT LIGHT EMITTER STRUCTURE
[List of Patents for class 257 subclass 80]  80           Subclass 80 indent level is 1 In combination with or also constituting light responsive device
[List of Patents for class 257 subclass 81]  81           Subclass 81 indent level is 2 With specific housing or contact structure
[List of Patents for class 257 subclass 82]  82           Subclass 82 indent level is 3 Discrete light emitting and light responsive devices
[List of Patents for class 257 subclass 83]  83           Subclass 83 indent level is 2 Light coupled transistor structure
[List of Patents for class 257 subclass 84]  84           Subclass 84 indent level is 2 Combined in integrated structure
[List of Patents for class 257 subclass 85]  85           Subclass 85 indent level is 3 With heterojunction
[List of Patents for class 257 subclass 86]  86           Subclass 86 indent level is 1 Active layer of indirect band gap semiconductor
[List of Patents for class 257 subclass 87]  87           Subclass 87 indent level is 2 With means to facilitate electron-hole recombination (e.g., isoelectronic traps such as nitrogen in GaP)
[List of Patents for class 257 subclass 88]  88           Subclass 88 indent level is 1 Plural light emitting devices (e.g., matrix, 7-segment array)
[List of Patents for class 257 subclass 89]  89           Subclass 89 indent level is 2 Multi-color emission
[List of Patents for class 257 subclass 90]  90           Subclass 90 indent level is 3 With heterojunction
[List of Patents for class 257 subclass 91]  91           Subclass 91 indent level is 2 With shaped contacts or opaque masking
[List of Patents for class 257 subclass 92]  92           Subclass 92 indent level is 2 Alphanumeric segmented array
[List of Patents for class 257 subclass 93]  93           Subclass 93 indent level is 2 With electrical isolation means in integrated circuit structure
[List of Patents for class 257 subclass 94]  94           Subclass 94 indent level is 1 With heterojunction
[List of Patents for class 257 subclass 95]  95           Subclass 95 indent level is 2 With contoured external surface (e.g., dome shape to facilitate light emission)
[List of Patents for class 257 subclass 96]  96           Subclass 96 indent level is 2 Plural heterojunctions in same device
[List of Patents for class 257 subclass 97]  97           Subclass 97 indent level is 3 More than two heterojunctions in same device
[List of Patents for class 257 subclass 98]  98           Subclass 98 indent level is 1 With reflector, opaque mask, or optical element (e.g., lens, optical fiber, index of refraction matching layer, luminescent material layer, filter) integral with device or device enclosure or package
[List of Patents for class 257 subclass 99]  99           Subclass 99 indent level is 1 With housing or contact structure
[List of Patents for class 257 subclass 100]  100           Subclass 100 indent level is 1 Encapsulated
[List of Patents for class 257 subclass 101]  101           Subclass 101 indent level is 1 With particular dopant concentration or concentration profile (e.g., graded junction)
[List of Patents for class 257 subclass 102]  102           Subclass 102 indent level is 1 With particular dopant material (e.g., zinc as dopant in GaAs)
[List of Patents for class 257 subclass 103]  103           Subclass 103 indent level is 1 With particular semiconductor material
[List of Patents for class 257 subclass 104]  104           TUNNELING PN JUNCTION (E.G., ESAKI DIODE) DEVICE
[List of Patents for class 257 subclass 105]  105           Subclass 105 indent level is 1 In three or more terminal device
[List of Patents for class 257 subclass 106]  106           Subclass 106 indent level is 1 Reverse bias tunneling structure (e.g., "backward" diode, true Zener diode)
[List of Patents for class 257 subclass 107]  107           REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR, COMFET, THYRISTOR)
[List of Patents for class 257 subclass 108]  108           Subclass 108 indent level is 1 Controlled by nonelectrical, nonoptical external signal (e.g., magnetic field, pressure, thermal)
[List of Patents for class 257 subclass 109]  109           Subclass 109 indent level is 1 Having only two terminals and no control electrode (gate), e.g., Shockley diode
[List of Patents for class 257 subclass 110]  110           Subclass 110 indent level is 2 More than four semiconductor layers of alternating conductivity types (e.g., pnpnpn structure, 5 layer bidirectional diacs, etc.)
[List of Patents for class 257 subclass 111]  111           Subclass 111 indent level is 2 Triggered by V BO overvoltage means
[List of Patents for class 257 subclass 112]  112           Subclass 112 indent level is 2 With highly-doped breakdown diode trigger
[List of Patents for class 257 subclass 113]  113           Subclass 113 indent level is 1 With light activation
[List of Patents for class 257 subclass 114]  114           Subclass 114 indent level is 2 With separate light detector integrated on chip with regenerative switching device
[List of Patents for class 257 subclass 115]  115           Subclass 115 indent level is 2 With electrical trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.)
[List of Patents for class 257 subclass 116]  116           Subclass 116 indent level is 2 With light conductor means (e.g., light fiber or light pipe) integral with device or device enclosure or package
[List of Patents for class 257 subclass 117]  117           Subclass 117 indent level is 3 In groove or with thinned semiconductor portion
[List of Patents for class 257 subclass 118]  118           Subclass 118 indent level is 2 With groove or thinned light sensitive portion
[List of Patents for class 257 subclass 119]  119           Subclass 119 indent level is 1 Bidirectional rectifier with control electrode (gate) (e.g., Triac)
[List of Patents for class 257 subclass 120]  120           Subclass 120 indent level is 2 Six or more semiconductor layers of alternating conductivity types (e.g., npnpnpn structure)
[List of Patents for class 257 subclass 121]  121           Subclass 121 indent level is 2 With diode or transistor in reverse path
[List of Patents for class 257 subclass 122]  122           Subclass 122 indent level is 2 Lateral
[List of Patents for class 257 subclass 123]  123           Subclass 123 indent level is 2 With trigger signal amplification (e.g., amplified gate)
[List of Patents for class 257 subclass 124]  124           Subclass 124 indent level is 2 Combined with field effect transistor structure
[List of Patents for class 257 subclass 125]  125           Subclass 125 indent level is 3 Controllable emitter shunting
[List of Patents for class 257 subclass 126]  126           Subclass 126 indent level is 2 With means to separate a device into sections having different conductive polarity
[List of Patents for class 257 subclass 127]  127           Subclass 127 indent level is 3 Guard ring or groove
[List of Patents for class 257 subclass 128]  128           Subclass 128 indent level is 2 Having overlapping sections of different conductive polarity
[List of Patents for class 257 subclass 129]  129           Subclass 129 indent level is 2 With means to increase reverse breakdown voltage
[List of Patents for class 257 subclass 130]  130           Subclass 130 indent level is 2 Switching speed enhancement means
[List of Patents for class 257 subclass 131]  131           Subclass 131 indent level is 3 Recombination centers or deep level dopants
[List of Patents for class 257 subclass 132]  132           Subclass 132 indent level is 1 Five or more layer unidirectional structure
[List of Patents for class 257 subclass 133]  133           Subclass 133 indent level is 1 Combined with field effect transistor
[List of Patents for class 257 subclass 134]  134           Subclass 134 indent level is 2 J-FET (junction field effect transistor)
[List of Patents for class 257 subclass 135]  135           Subclass 135 indent level is 3 Vertical (i.e., where the source is located above the drain or vice versa)
[List of Patents for class 257 subclass 136]  136           Subclass 136 indent level is 4 Enhancement mode (e.g., so-called SITs)
[List of Patents for class 257 subclass 137]  137           Subclass 137 indent level is 2 Having controllable emitter shunt
[List of Patents for class 257 subclass 138]  138           Subclass 138 indent level is 3 Having gate turn off (GTO) feature
[List of Patents for class 257 subclass 139]  139           Subclass 139 indent level is 2 With extended latchup current level (e.g., COMFET device)
[List of Patents for class 257 subclass 140]  140           Subclass 140 indent level is 3 Combined with other solid-state active device in integrated structure
[List of Patents for class 257 subclass 141]  141           Subclass 141 indent level is 3 Lateral structure, i.e., current flow parallel to main device surface
[List of Patents for class 257 subclass 142]  142           Subclass 142 indent level is 3 Having impurity doping for gain reduction
[List of Patents for class 257 subclass 143]  143           Subclass 143 indent level is 3 Having anode shunt means
[List of Patents for class 257 subclass 144]  144           Subclass 144 indent level is 3 Cathode emitter or cathode electrode feature
[List of Patents for class 257 subclass 145]  145           Subclass 145 indent level is 3 Low impedance channel contact extends below surface
[List of Patents for class 257 subclass 146]  146           Subclass 146 indent level is 1 Combined with other solid-state active device in integrated structure
[List of Patents for class 257 subclass 147]  147           Subclass 147 indent level is 1 With extended latchup current level (e.g., gate turn off "GTO" device)
[List of Patents for class 257 subclass 148]  148           Subclass 148 indent level is 2 Having impurity doping for gain reduction
[List of Patents for class 257 subclass 149]  149           Subclass 149 indent level is 2 Having anode shunt means
[List of Patents for class 257 subclass 150]  150           Subclass 150 indent level is 2 With specified housing or external terminal
[List of Patents for class 257 subclass 151]  151           Subclass 151 indent level is 3 External gate terminal structure or composition
[List of Patents for class 257 subclass 152]  152           Subclass 152 indent level is 2 Cathode emitter or cathode electrode feature
[List of Patents for class 257 subclass 153]  153           Subclass 153 indent level is 2 Gate region or electrode feature
[List of Patents for class 257 subclass 154]  154           Subclass 154 indent level is 1 With resistive region connecting separate sections of device
[List of Patents for class 257 subclass 155]  155           Subclass 155 indent level is 1 With switching speed enhancement means (e.g., Schottky contact)
[List of Patents for class 257 subclass 156]  156           Subclass 156 indent level is 2 Having deep level dopants or recombination centers
[List of Patents for class 257 subclass 157]  157           Subclass 157 indent level is 1 With integrated trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.)
[List of Patents for class 257 subclass 158]  158           Subclass 158 indent level is 2 Three or more amplification stages
[List of Patents for class 257 subclass 159]  159           Subclass 159 indent level is 2 Transistor as amplifier
[List of Patents for class 257 subclass 160]  160           Subclass 160 indent level is 2 With distributed amplified current
[List of Patents for class 257 subclass 161]  161           Subclass 161 indent level is 2 With a turn-off diode
[List of Patents for class 257 subclass 162]  162           Subclass 162 indent level is 1 Lateral structure
[List of Patents for class 257 subclass 163]  163           Subclass 163 indent level is 1 Emitter region feature
[List of Patents for class 257 subclass 164]  164           Subclass 164 indent level is 2 Multi-emitter region (e.g., emitter geometry or emitter ballast resistor)
[List of Patents for class 257 subclass 165]  165           Subclass 165 indent level is 3 Laterally symmetric regions
[List of Patents for class 257 subclass 166]  166           Subclass 166 indent level is 3 Radially symmetric regions
[List of Patents for class 257 subclass 167]  167           Subclass 167 indent level is 1 Having at least four external electrodes
[List of Patents for class 257 subclass 168]  168           Subclass 168 indent level is 1 With means to increase breakdown voltage
[List of Patents for class 257 subclass 169]  169           Subclass 169 indent level is 2 High resistivity base layer
[List of Patents for class 257 subclass 170]  170           Subclass 170 indent level is 2 Surface feature (e.g., guard ring, groove, mesa, etc.)
[List of Patents for class 257 subclass 171]  171           Subclass 171 indent level is 3 Edge feature (e.g., beveled edge)
[List of Patents for class 257 subclass 172]  172           Subclass 172 indent level is 1 With means to lower "ON" voltage drop
[List of Patents for class 257 subclass 173]  173           Subclass 173 indent level is 1 Device protection (e.g., from overvoltage)
[List of Patents for class 257 subclass 174]  174           Subclass 174 indent level is 2 Rate of rise of current (e.g., dI/dt)
[List of Patents for class 257 subclass 175]  175           Subclass 175 indent level is 1 With means to control triggering (e.g., gate electrode configuration, Zener diode firing, dV/Dt control, transient control by ferrite bead, etc.)
[List of Patents for class 257 subclass 176]  176           Subclass 176 indent level is 2 Located in an emitter-gate region
[List of Patents for class 257 subclass 177]  177           Subclass 177 indent level is 1 With housing or external electrode
[List of Patents for class 257 subclass 178]  178           Subclass 178 indent level is 2 With means to avoid stress between electrode and active device (e.g., thermal expansion matching of electrode to semiconductor)
[List of Patents for class 257 subclass 179]  179           Subclass 179 indent level is 3 With malleable electrode (e.g., silver electrode layer)
[List of Patents for class 257 subclass 180]  180           Subclass 180 indent level is 2 Stud mount
[List of Patents for class 257 subclass 181]  181           Subclass 181 indent level is 2 With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, (e.g., ring)
[List of Patents for class 257 subclass 182]  182           Subclass 182 indent level is 3 With lead feedthrough means on side of housing
[List of Patents for class 257 subclass 183]  183           HETEROJUNCTION DEVICE
[List of Patents for class 257 subclass 183.1]  183.1           Subclass 183.1 indent level is 1 Charge transfer device
[List of Patents for class 257 subclass 184]  184           Subclass 184 indent level is 1 Light responsive structure
[List of Patents for class 257 subclass 185]  185           Subclass 185 indent level is 2 Staircase (including graded composition) device
[List of Patents for class 257 subclass 186]  186           Subclass 186 indent level is 2 Avalanche photodetection structure
[List of Patents for class 257 subclass 187]  187           Subclass 187 indent level is 2 Having transistor structure
[List of Patents for class 257 subclass 188]  188           Subclass 188 indent level is 2 Having narrow energy band gap (<<1eV) layer (e.g., PbSnTe, HgCdTe, etc.)
[List of Patents for class 257 subclass 189]  189           Subclass 189 indent level is 3 Layer is a group III-V semiconductor compound
[List of Patents for class 257 subclass 190]  190           Subclass 190 indent level is 1 With lattice constant mismatch (e.g., with buffer layer to accommodate mismatch)
[List of Patents for class 257 subclass 191]  191           Subclass 191 indent level is 1 Having graded composition
[List of Patents for class 257 subclass 192]  192           Subclass 192 indent level is 1 Field effect transistor
[List of Patents for class 257 subclass 194]  194           Subclass 194 indent level is 2 Doping on side of heterojunction with lower carrier affinity (e.g., high electron mobility transistor (HEMT))
[List of Patents for class 257 subclass 195]  195           Subclass 195 indent level is 3 Combined with diverse type device
[List of Patents for class 257 subclass 196]  196           Subclass 196 indent level is 1 Both semiconductors of the heterojunction are the same conductivity type (i.e., either n or p)
[List of Patents for class 257 subclass 197]  197           Subclass 197 indent level is 1 Bipolar transistor
[List of Patents for class 257 subclass 198]  198           Subclass 198 indent level is 2 Wide band gap emitter
[List of Patents for class 257 subclass 199]  199           Subclass 199 indent level is 1 Avalanche diode (e.g., so-called "Zener" diode having breakdown voltage greater than 6 volts, including heterojunction IMPATT type microwave diodes)
[List of Patents for class 257 subclass 200]  200           Subclass 200 indent level is 1 Heterojunction formed between semiconductor materials which differ in that they belong to different periodic table groups (e.g., Ge (group IV) - GaAs (group III-V) or InP (group III-V) - CdTe (group II-VI))
[List of Patents for class 257 subclass 201]  201           Subclass 201 indent level is 1 Between different group IV-VI or II-VI or III-V compounds other than GaAs/GaAlAs
[List of Patents for class 257 subclass 202]  202           GATE ARRAYS
[List of Patents for class 257 subclass 203]  203           Subclass 203 indent level is 1 With particular chip input/output means
[List of Patents for class 257 subclass 204]  204           Subclass 204 indent level is 1 Having specific type of active device (e.g., CMOS)
[List of Patents for class 257 subclass 205]  205           Subclass 205 indent level is 2 With bipolar transistors or with FETs of only one channel conductivity type (e.g., enhancement-depletion FETs)
[List of Patents for class 257 subclass 206]  206           Subclass 206 indent level is 2 Particular layout of complementary FETs with regard to each other
[List of Patents for class 257 subclass 207]  207           Subclass 207 indent level is 1 With particular power supply distribution means
[List of Patents for class 257 subclass 208]  208           Subclass 208 indent level is 1 With particular signal path connections
[List of Patents for class 257 subclass 209]  209           Subclass 209 indent level is 2 Programmable signal paths (e.g., with fuse elements, laser programmable, etc)
[List of Patents for class 257 subclass 210]  210           Subclass 210 indent level is 2 With wiring channel area
[List of Patents for class 257 subclass 211]  211           Subclass 211 indent level is 2 Multi-level metallization
[List of Patents for class 257 subclass 212]  212           CONDUCTIVITY MODULATION DEVICE (E.G., UNIJUNCTION TRANSISTOR, DOUBLE-BASE DIODE, CONDUCTIVITY-MODULATED TRANSISTOR)
[List of Patents for class 257 subclass 213]  213           FIELD EFFECT DEVICE
[List of Patents for class 257 subclass 214]  214           Subclass 214 indent level is 1 Charge injection device
[List of Patents for class 257 subclass 215]  215           Subclass 215 indent level is 1 Charge transfer device
[List of Patents for class 257 subclass 216]  216           Subclass 216 indent level is 2 Majority signal carrier (e.g., buried or bulk channel, or peristaltic)
[List of Patents for class 257 subclass 217]  217           Subclass 217 indent level is 3 Having a conductive means in direct contact with channel (e.g., non-insulated gate)
[List of Patents for class 257 subclass 218]  218           Subclass 218 indent level is 3 High resistivity channel (e.g., accumulation mode) or surface channel (e.g., transfer of signal charge occurs at the surface of the semiconductor) or minority carriers at input (i.e., surface channel input)
[List of Patents for class 257 subclass 219]  219           Subclass 219 indent level is 3 Impurity concentration variation
[List of Patents for class 257 subclass 220]  220           Subclass 220 indent level is 4 Vertically within channel (e.g., profiled)
[List of Patents for class 257 subclass 221]  221           Subclass 221 indent level is 4 Along the length of the channel (e.g., doping variations for transfer directionality)
[List of Patents for class 257 subclass 222]  222           Subclass 222 indent level is 3 Responsive to non-electrical external signal (e.g., imager)
[List of Patents for class 257 subclass 223]  223           Subclass 223 indent level is 4 Having structure to improve output signal (e.g., antiblooming drain)
[List of Patents for class 257 subclass 224]  224           Subclass 224 indent level is 3 Channel confinement
[List of Patents for class 257 subclass 225]  225           Subclass 225 indent level is 2 Non-electrical input responsive (e.g., light responsive imager, input programmed by size of storage sites for use as a read-only memory, etc.)
[List of Patents for class 257 subclass 226]  226           Subclass 226 indent level is 3 Sensor element and charge transfer device are of different materials or on different substrates (e.g., "hybrid")
[List of Patents for class 257 subclass 227]  227           Subclass 227 indent level is 3 With specified dopant (e.g., photoionizable, "extrinsic" detectors for infrared)
[List of Patents for class 257 subclass 228]  228           Subclass 228 indent level is 3 Light responsive, back illuminated
[List of Patents for class 257 subclass 229]  229           Subclass 229 indent level is 3 Having structure to improve output signal (e.g., exposure control structure)
[List of Patents for class 257 subclass 230]  230           Subclass 230 indent level is 4 With blooming suppression structure
[List of Patents for class 257 subclass 231]  231           Subclass 231 indent level is 3 2-dimensional area architecture
[List of Patents for class 257 subclass 232]  232           Subclass 232 indent level is 4 Having alternating strips of sensor structures and register structures (e.g., interline imager)
[List of Patents for class 257 subclass 233]  233           Subclass 233 indent level is 4 Sensors not overlaid by electrode (e.g., photodiodes)
[List of Patents for class 257 subclass 234]  234           Subclass 234 indent level is 3 Single strip of sensors (e.g., linear imager)
[List of Patents for class 257 subclass 235]  235           Subclass 235 indent level is 2 Electrical input
[List of Patents for class 257 subclass 236]  236           Subclass 236 indent level is 3 Signal applied to field effect electrode
[List of Patents for class 257 subclass 237]  237           Subclass 237 indent level is 4 Charge-presetting/linear input type (e.g., fill and spill)
[List of Patents for class 257 subclass 238]  238           Subclass 238 indent level is 3 Input signal responsive to signal charge in charge transfer device (e.g., regeneration or feedback)
[List of Patents for class 257 subclass 239]  239           Subclass 239 indent level is 2 Signal charge detection type (e.g., floating diffusion or floating gate non-destructive output)
[List of Patents for class 257 subclass 240]  240           Subclass 240 indent level is 2 Changing width or direction of channel (e.g., meandering channel)
[List of Patents for class 257 subclass 241]  241           Subclass 241 indent level is 2 Multiple channels (e.g., converging or diverging or parallel channels)
[List of Patents for class 257 subclass 242]  242           Subclass 242 indent level is 2 Vertical charge transfer
[List of Patents for class 257 subclass 243]  243           Subclass 243 indent level is 2 Channel confinement
[List of Patents for class 257 subclass 244]  244           Subclass 244 indent level is 2 Comprising a groove
[List of Patents for class 257 subclass 245]  245           Subclass 245 indent level is 2 Structure for applying electric field into device (e.g., resistive electrode, acoustic traveling wave in channel)
[List of Patents for class 257 subclass 246]  246           Subclass 246 indent level is 3 Phase structure (e.g., doping variations to provide asymmetry for 2-phase operation; more than four phases or "electrode per bit")
[List of Patents for class 257 subclass 247]  247           Subclass 247 indent level is 4 Uniphase or virtual phase structure
[List of Patents for class 257 subclass 248]  248           Subclass 248 indent level is 4 2-phase
[List of Patents for class 257 subclass 249]  249           Subclass 249 indent level is 3 Electrode structures or materials
[List of Patents for class 257 subclass 250]  250           Subclass 250 indent level is 4 Plural gate levels
[List of Patents for class 257 subclass 251]  251           Subclass 251 indent level is 2 Substantially incomplete signal charge transfer (e.g., bucket brigade)
[List of Patents for class 257 subclass 252]  252           Subclass 252 indent level is 1 Responsive to non-optical, non-electrical signal
[List of Patents for class 257 subclass 253]  253           Subclass 253 indent level is 2 Chemical (e.g., ISFET, CHEMFET)
[List of Patents for class 257 subclass 254]  254           Subclass 254 indent level is 2 Physical deformation (e.g., strain sensor, acoustic wave detector)
[List of Patents for class 257 subclass 255]  255           Subclass 255 indent level is 1 With current flow along specified crystal axis (e.g., axis of maximum carrier mobility)
[List of Patents for class 257 subclass 256]  256           Subclass 256 indent level is 1 Junction field effect transistor (unipolar transistor)
[List of Patents for class 257 subclass 257]  257           Subclass 257 indent level is 2 Light responsive or combined with light responsive device
[List of Patents for class 257 subclass 258]  258           Subclass 258 indent level is 3 In imaging array
[List of Patents for class 257 subclass 259]  259           Subclass 259 indent level is 2 Elongated active region acts as transmission line or distributed active element (e.g., "transmission line" field effect transistor)
[List of Patents for class 257 subclass 260]  260           Subclass 260 indent level is 2 Same channel controlled by both junction and insulated gate electrodes, or by both Schottky barrier and pn junction gates (e.g., "taper isolated" memory cell)
[List of Patents for class 257 subclass 261]  261           Subclass 261 indent level is 2 Junction gate region free of direct electrical connection (e.g., floating junction gate memory cell structure)
[List of Patents for class 257 subclass 262]  262           Subclass 262 indent level is 2 Combined with insulated gate field effect transistor (IGFET)
[List of Patents for class 257 subclass 263]  263           Subclass 263 indent level is 2 Vertical controlled current path
[List of Patents for class 257 subclass 264]  264           Subclass 264 indent level is 3 Enhancement mode or with high resistivity channel (e.g., doping of 10 15 cm -3 or less)
[List of Patents for class 257 subclass 265]  265           Subclass 265 indent level is 3 In integrated circuit
[List of Patents for class 257 subclass 266]  266           Subclass 266 indent level is 3 With multiple parallel current paths (e.g., grid gate)
[List of Patents for class 257 subclass 267]  267           Subclass 267 indent level is 4 With Schottky barrier gate
[List of Patents for class 257 subclass 268]  268           Subclass 268 indent level is 2 Enhancement mode
[List of Patents for class 257 subclass 269]  269           Subclass 269 indent level is 3 With means to adjust barrier height (e.g., doping profile)
[List of Patents for class 257 subclass 270]  270           Subclass 270 indent level is 2 Plural, separately connected, gates control same channel region
[List of Patents for class 257 subclass 271]  271           Subclass 271 indent level is 2 Load element or constant current source (e.g., with source to gate connection)
[List of Patents for class 257 subclass 272]  272           Subclass 272 indent level is 2 Junction field effect transistor in integrated circuit
[List of Patents for class 257 subclass 273]  273           Subclass 273 indent level is 3 With bipolar device
[List of Patents for class 257 subclass 274]  274           Subclass 274 indent level is 3 Complementary junction field effect transistors
[List of Patents for class 257 subclass 275]  275           Subclass 275 indent level is 3 Microwave integrated circuit (e.g., microstrip type)
[List of Patents for class 257 subclass 276]  276           Subclass 276 indent level is 4 With contact or heat sink extending through hole in semiconductor substrate, or with electrode suspended over substrate (e.g., air bridge)
[List of Patents for class 257 subclass 277]  277           Subclass 277 indent level is 4 With capacitive or inductive elements
[List of Patents for class 257 subclass 278]  278           Subclass 278 indent level is 3 With devices vertically spaced in different layers of semiconductor material (e.g., "3-dimensional" integrated circuit)
[List of Patents for class 257 subclass 279]  279           Subclass 279 indent level is 2 Pn junction gate in compound semiconductor material (e.g., GaAs)
[List of Patents for class 257 subclass 280]  280           Subclass 280 indent level is 2 With Schottky gate
[List of Patents for class 257 subclass 281]  281           Subclass 281 indent level is 3 Schottky gate to silicon semiconductor
[List of Patents for class 257 subclass 282]  282           Subclass 282 indent level is 3 Gate closely aligned to source region
[List of Patents for class 257 subclass 283]  283           Subclass 283 indent level is 4 With groove or overhang for alignment
[List of Patents for class 257 subclass 284]  284           Subclass 284 indent level is 3 Schottky gate in groove
[List of Patents for class 257 subclass 285]  285           Subclass 285 indent level is 2 With profiled channel dopant concentration or profiled gate region dopant concentration (e.g., maximum dopant concentration below surface)
[List of Patents for class 257 subclass 286]  286           Subclass 286 indent level is 2 With non-uniform channel thickness or width
[List of Patents for class 257 subclass 287]  287           Subclass 287 indent level is 2 With multiple channels or channel segments connected in parallel, or with channel much wider than length between source and drain (e.g., power JFET)
[List of Patents for class 257 subclass 288]  288           Subclass 288 indent level is 1 Having insulated electrode (e.g., MOSFET, MOS diode)
[List of Patents for class 257 subclass 289]  289           Subclass 289 indent level is 2 Significant semiconductor chemical compound in bulk crystal (e.g., GaAs)
[List of Patents for class 257 subclass 290]  290           Subclass 290 indent level is 2 Light responsive or combined with light responsive device
[List of Patents for class 257 subclass 291]  291           Subclass 291 indent level is 3 Imaging array
[List of Patents for class 257 subclass 292]  292           Subclass 292 indent level is 4 Photodiodes accessed by FETs
[List of Patents for class 257 subclass 293]  293           Subclass 293 indent level is 4 Photoresistors accessed by FETs, or photodetectors separate from FET chip
[List of Patents for class 257 subclass 294]  294           Subclass 294 indent level is 4 With shield, filter, or lens
[List of Patents for class 257 subclass 295]  295           Subclass 295 indent level is 2 With ferroelectric material layer
[List of Patents for class 257 subclass 296]  296           Subclass 296 indent level is 2 Insulated gate capacitor or insulated gate transistor combined with capacitor (e.g., dynamic memory cell)
[List of Patents for class 257 subclass 297]  297           Subclass 297 indent level is 3 With means for preventing charge leakage due to minority carrier generation (e.g., alpha generated soft error protection or "dark current" leakage protection)
[List of Patents for class 257 subclass 298]  298           Subclass 298 indent level is 3 Capacitor for signal storage in combination with non-volatile storage means
[List of Patents for class 257 subclass 299]  299           Subclass 299 indent level is 3 Structure configured for voltage converter (e.g., charge pump, substrate bias generator)
[List of Patents for class 257 subclass 300]  300           Subclass 300 indent level is 3 Capacitor coupled to, or forms gate of, insulated gate field effect transistor (e.g., non-destructive readout dynamic memory cell structure)
[List of Patents for class 257 subclass 301]  301           Subclass 301 indent level is 3 Capacitor in trench
[List of Patents for class 257 subclass 302]  302           Subclass 302 indent level is 4 Vertical transistor
[List of Patents for class 257 subclass 303]  303           Subclass 303 indent level is 4 Stacked capacitor
[List of Patents for class 257 subclass 304]  304           Subclass 304 indent level is 4 Storage node isolated by dielectric from semiconductor substrate
[List of Patents for class 257 subclass 305]  305           Subclass 305 indent level is 4 With means to insulate adjacent storage nodes (e.g., channel stops or field oxide)
[List of Patents for class 257 subclass 306]  306           Subclass 306 indent level is 3 Stacked capacitor
[List of Patents for class 257 subclass 307]  307           Subclass 307 indent level is 4 Parallel interleaved capacitor electrode pairs (e.g., interdigitized)
[List of Patents for class 257 subclass 308]  308           Subclass 308 indent level is 5 With capacitor electrodes connection portion located centrally thereof (e.g., fin electrodes with central post)
[List of Patents for class 257 subclass 309]  309           Subclass 309 indent level is 4 With increased effective electrode surface area (e.g., tortuous path, corrugated, or textured electrodes)
[List of Patents for class 257 subclass 310]  310           Subclass 310 indent level is 3 With high dielectric constant insulator (e.g., Ta 2 O 5 )
[List of Patents for class 257 subclass 311]  311           Subclass 311 indent level is 3 Storage Node isolated by dielectric from semiconductor substrate
[List of Patents for class 257 subclass 312]  312           Subclass 312 indent level is 3 Voltage variable capacitor (i. e., capacitance varies with applied voltage)
[List of Patents for class 257 subclass 313]  313           Subclass 313 indent level is 3 Inversion layer capacitor
[List of Patents for class 257 subclass 314]  314           Subclass 314 indent level is 2 Variable threshold (e.g., floating gate memory device)
[List of Patents for class 257 subclass 315]  315           Subclass 315 indent level is 3 With floating gate electrode
[List of Patents for class 257 subclass 316]  316           Subclass 316 indent level is 4 With additional contacted control electrode
[List of Patents for class 257 subclass 317]  317           Subclass 317 indent level is 5 With irregularities on electrode to facilitate charging or discharging of floating electrode
[List of Patents for class 257 subclass 318]  318           Subclass 318 indent level is 5 Additional control electrode is doped region in semiconductor substrate
[List of Patents for class 257 subclass 319]  319           Subclass 319 indent level is 5 Plural additional contacted control electrodes
[List of Patents for class 257 subclass 320]  320           Subclass 320 indent level is 6 Separate control electrodes for charging and for discharging floating electrode
[List of Patents for class 257 subclass 321]  321           Subclass 321 indent level is 5 With thin insulator region for charging or discharging floating electrode by quantum mechanical tunneling
[List of Patents for class 257 subclass 322]  322           Subclass 322 indent level is 5 With charging or discharging by control voltage applied to source or drain region (e.g., by avalanche breakdown of drain junction)
[List of Patents for class 257 subclass 323]  323           Subclass 323 indent level is 4 With means to facilitate light erasure
[List of Patents for class 257 subclass 324]  324           Subclass 324 indent level is 3 Multiple insulator layers (e.g., MNOS structure)
[List of Patents for class 257 subclass 325]  325           Subclass 325 indent level is 4 Non-homogeneous composition insulator layer (e.g., graded composition layer or layer with inclusions)
[List of Patents for class 257 subclass 326]  326           Subclass 326 indent level is 4 With additional, non-memory control electrode or channel portion (e.g., accessing field effect transistor structure)
[List of Patents for class 257 subclass 327]  327           Subclass 327 indent level is 2 Short channel insulated gate field effect transistor
[List of Patents for class 257 subclass 328]  328           Subclass 328 indent level is 3 Vertical channel or double diffused insulated gate field effect device provided with means to protect against excess voltage (e.g., gate protection diode)
[List of Patents for class 257 subclass 329]  329           Subclass 329 indent level is 3 Gate controls vertical charge flow portion of channel (e.g., VMOS device)
[List of Patents for class 257 subclass 330]  330           Subclass 330 indent level is 4 Gate electrode in groove
[List of Patents for class 257 subclass 331]  331           Subclass 331 indent level is 5 Plural gate electrodes or grid shaped gate electrode
[List of Patents for class 257 subclass 332]  332           Subclass 332 indent level is 5 Gate electrode self-aligned with groove
[List of Patents for class 257 subclass 333]  333           Subclass 333 indent level is 5 With thick insulator to reduce gate capacitance in non-channel areas (e.g., thick oxide over source or drain region)
[List of Patents for class 257 subclass 334]  334           Subclass 334 indent level is 5 In integrated circuit structure
[List of Patents for class 257 subclass 335]  335           Subclass 335 indent level is 3 Active channel region has a graded dopant concentration decreasing with distance from source region (e.g., double diffused device, DMOS transistor)
[List of Patents for class 257 subclass 336]  336           Subclass 336 indent level is 4 With lightly doped portion of drain region adjacent channel (e.g., LDD structure)
[List of Patents for class 257 subclass 337]  337           Subclass 337 indent level is 4 In integrated circuit structure
[List of Patents for class 257 subclass 338]  338           Subclass 338 indent level is 5 With complementary field effect transistor
[List of Patents for class 257 subclass 339]  339           Subclass 339 indent level is 4 With means to increase breakdown voltage
[List of Patents for class 257 subclass 340]  340           Subclass 340 indent level is 4 With means (other than self-alignment of the gate electrode) to decrease gate capacitance (e.g., shield electrode)
[List of Patents for class 257 subclass 341]  341           Subclass 341 indent level is 4 Plural sections connected in parallel (e.g., power MOSFET)
[List of Patents for class 257 subclass 342]  342           Subclass 342 indent level is 5 With means to reduce ON resistance
[List of Patents for class 257 subclass 343]  343           Subclass 343 indent level is 4 All contacts on same surface (e.g., lateral structure)
[List of Patents for class 257 subclass 344]  344           Subclass 344 indent level is 3 With lightly doped portion of drain region adjacent channel (e.g., LDD structure)
[List of Patents for class 257 subclass 345]  345           Subclass 345 indent level is 3 With means to prevent sub-surface currents, or with non-uniform channel doping
[List of Patents for class 257 subclass 346]  346           Subclass 346 indent level is 3 Gate electrode overlaps the source or drain by no more than depth of source or drain (e.g., self-aligned gate)
[List of Patents for class 257 subclass 347]  347           Subclass 347 indent level is 2 Single crystal semiconductor layer on insulating substrate (SOI)
[List of Patents for class 257 subclass 348]  348           Subclass 348 indent level is 3 Depletion mode field effect transistor
[List of Patents for class 257 subclass 349]  349           Subclass 349 indent level is 3 With means (e.g., a buried channel stop layer) to prevent leakage current along the interface of the semiconductor layer and the insulating substrate
[List of Patents for class 257 subclass 350]  350           Subclass 350 indent level is 3 Insulated electrode device is combined with diverse type device (e.g., complementary MOSFETs, FET with resistor, etc.)
[List of Patents for class 257 subclass 351]  351           Subclass 351 indent level is 4 Complementary field effect transistor structures only (i.e., not including bipolar transistors, resistors, or other components)
[List of Patents for class 257 subclass 352]  352           Subclass 352 indent level is 3 Substrate is single crystal insulator (e.g., sapphire or spinel)
[List of Patents for class 257 subclass 353]  353           Subclass 353 indent level is 4 Single crystal islands of semiconductor layer containing only one active device
[List of Patents for class 257 subclass 354]  354           Subclass 354 indent level is 5 Including means to eliminate island edge effects (e.g., insulating filling between islands, or ions in island edges)
[List of Patents for class 257 subclass 355]  355           Subclass 355 indent level is 2 With overvoltage protective means
[List of Patents for class 257 subclass 356]  356           Subclass 356 indent level is 3 For protecting against gate insulator breakdown
[List of Patents for class 257 subclass 357]  357           Subclass 357 indent level is 4 In complementary field effect transistor integrated circuit
[List of Patents for class 257 subclass 358]  358           Subclass 358 indent level is 5 Including resistor element
[List of Patents for class 257 subclass 359]  359           Subclass 359 indent level is 6 As thin film structure (e.g., polysilicon resistor)
[List of Patents for class 257 subclass 360]  360           Subclass 360 indent level is 4 Protection device includes insulated gate transistor structure (e.g., combined with resistor element)
[List of Patents for class 257 subclass 361]  361           Subclass 361 indent level is 5 For operation as bipolar or punchthrough element
[List of Patents for class 257 subclass 362]  362           Subclass 362 indent level is 4 Punchthrough or bipolar element
[List of Patents for class 257 subclass 363]  363           Subclass 363 indent level is 4 Including resistor element
[List of Patents for class 257 subclass 364]  364           Subclass 364 indent level is 2 With resistive gate electrode
[List of Patents for class 257 subclass 365]  365           Subclass 365 indent level is 2 With plural, separately connected, gate electrodes in same device
[List of Patents for class 257 subclass 366]  366           Subclass 366 indent level is 3 Overlapping gate electrodes
[List of Patents for class 257 subclass 367]  367           Subclass 367 indent level is 2 Insulated gate controlled breakdown of pn junction (e.g., field plate diode)
[List of Patents for class 257 subclass 368]  368           Subclass 368 indent level is 2 Insulated gate field effect transistor in integrated circuit
[List of Patents for class 257 subclass 369]  369           Subclass 369 indent level is 3 Complementary insulated gate field effect transistors
[List of Patents for class 257 subclass 370]  370           Subclass 370 indent level is 4 Combined with bipolar transistor
[List of Patents for class 257 subclass 371]  371           Subclass 371 indent level is 4 Complementary transistors in wells of opposite conductivity types more heavily doped than the substrate region in which they are formed, e.g., twin wells
[List of Patents for class 257 subclass 372]  372           Subclass 372 indent level is 4 With means to prevent latchup or parasitic conduction channels
[List of Patents for class 257 subclass 373]  373           Subclass 373 indent level is 4 With pn junction to collect injected minority carriers to prevent parasitic bipolar transistor action
[List of Patents for class 257 subclass 374]  374           Subclass 374 indent level is 5 Dielectric isolation means (e.g., dielectric layer in vertical grooves)
[List of Patents for class 257 subclass 375]  375           Subclass 375 indent level is 5 With means to reduce substrate spreading resistance (e.g., heavily doped substrate)
[List of Patents for class 257 subclass 376]  376           Subclass 376 indent level is 5 With barrier region of reduced minority carrier lifetime (e.g., heavily doped P+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region)
[List of Patents for class 257 subclass 377]  377           Subclass 377 indent level is 4 With polysilicon interconnections to source or drain regions (e.g., polysilicon laminated with silicide)
[List of Patents for class 257 subclass 378]  378           Subclass 378 indent level is 3 Combined with bipolar transistor
[List of Patents for class 257 subclass 379]  379           Subclass 379 indent level is 3 Combined with passive components (e.g., resistors)
[List of Patents for class 257 subclass 380]  380           Subclass 380 indent level is 4 Polysilicon resistor
[List of Patents for class 257 subclass 381]  381           Subclass 381 indent level is 4 With multiple levels of polycrystalline silicon
[List of Patents for class 257 subclass 382]  382           Subclass 382 indent level is 3 With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide)
[List of Patents for class 257 subclass 383]  383           Subclass 383 indent level is 4 Contact of refractory or platinum group metal (e.g., molybdenum, tungsten, or titanium)
[List of Patents for class 257 subclass 384]  384           Subclass 384 indent level is 4 Including silicide
[List of Patents for class 257 subclass 385]  385           Subclass 385 indent level is 4 Multiple polysilicon layers
[List of Patents for class 257 subclass 386]  386           Subclass 386 indent level is 3 With means to reduce parasitic capacitance
[List of Patents for class 257 subclass 387]  387           Subclass 387 indent level is 4 Gate electrode overlaps at least one of source or drain by no more than depth of source or drain (e.g., self-aligned gate)
[List of Patents for class 257 subclass 388]  388           Subclass 388 indent level is 5 Gate electrode consists of refractory or platinum group metal or silicide
[List of Patents for class 257 subclass 389]  389           Subclass 389 indent level is 4 With thick insulator over source or drain region
[List of Patents for class 257 subclass 390]  390           Subclass 390 indent level is 3 Matrix or array of field effect transistors (e.g., array of FETs only some of which are completed, or structure for mask programmed read-only memory (ROM))
[List of Patents for class 257 subclass 391]  391           Subclass 391 indent level is 4 Selected groups of complete field effect devices having different threshold voltages (e.g., different channel dopant concentrations)
[List of Patents for class 257 subclass 392]  392           Subclass 392 indent level is 3 Insulated gate field effect transistors of different threshold voltages in same integrated circuit (e.g., enhancement and depletion mode)
[List of Patents for class 257 subclass 393]  393           Subclass 393 indent level is 3 Insulated gate field effect transistor adapted to function as load element for switching insulated gate field effect transistor
[List of Patents for class 257 subclass 394]  394           Subclass 394 indent level is 3 With means to prevent parasitic conduction channels
[List of Patents for class 257 subclass 395]  395           Subclass 395 indent level is 4 Thick insulator portion
[List of Patents for class 257 subclass 396]  396           Subclass 396 indent level is 5 Recessed into semiconductor surface
[List of Patents for class 257 subclass 397]  397           Subclass 397 indent level is 6 In vertical-walled groove
[List of Patents for class 257 subclass 398]  398           Subclass 398 indent level is 6 Combined with heavily doped channel stop portion
[List of Patents for class 257 subclass 399]  399           Subclass 399 indent level is 5 Combined with heavily doped channel stop portion
[List of Patents for class 257 subclass 400]  400           Subclass 400 indent level is 4 With heavily doped channel stop portion
[List of Patents for class 257 subclass 401]  401           Subclass 401 indent level is 3 With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)
[List of Patents for class 257 subclass 402]  402           Subclass 402 indent level is 2 With permanent threshold adjustment (e.g., depletion mode)
[List of Patents for class 257 subclass 403]  403           Subclass 403 indent level is 3 With channel conductivity dopant same type as that of source and drain
[List of Patents for class 257 subclass 404]  404           Subclass 404 indent level is 4 Non-uniform channel doping
[List of Patents for class 257 subclass 405]  405           Subclass 405 indent level is 3 With gate insulator containing specified permanent charge
[List of Patents for class 257 subclass 406]  406           Subclass 406 indent level is 4 Plural gate insulator layers
[List of Patents for class 257 subclass 407]  407           Subclass 407 indent level is 3 With gate electrode of controlled workfunction material (e.g., low workfunction gate material)
[List of Patents for class 257 subclass 408]  408           Subclass 408 indent level is 2 Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, LDD device)
[List of Patents for class 257 subclass 409]  409           Subclass 409 indent level is 2 With means to increase breakdown voltage (e.g., field shield electrode, guard ring, etc.)
[List of Patents for class 257 subclass 410]  410           Subclass 410 indent level is 2 Gate insulator includes material (including air or vacuum) other than SiO 2
[List of Patents for class 257 subclass 411]  411           Subclass 411 indent level is 3 Composite or layered gate insulator (e.g., mixture such as silicon oxynitride)
[List of Patents for class 257 subclass 412]  412           Subclass 412 indent level is 2 Gate electrode of refractory material (e.g., polysilicon or a silicide of a refractory or platinum group metal)
[List of Patents for class 257 subclass 413]  413           Subclass 413 indent level is 3 Polysilicon laminated with silicide
[List of Patents for class 257 subclass 414]  414           RESPONSIVE TO NON-ELECTRICAL SIGNAL (E.G., CHEMICAL, STRESS, LIGHT, OR MAGNETIC FIELD SENSORS)
[List of Patents for class 257 subclass 415]  415           Subclass 415 indent level is 1 Physical deformation
[List of Patents for class 257 subclass 416]  416           Subclass 416 indent level is 2 Acoustic wave
[List of Patents for class 257 subclass 417]  417           Subclass 417 indent level is 2 Strain sensors
[List of Patents for class 257 subclass 418]  418           Subclass 418 indent level is 3 With means to concentrate stress
[List of Patents for class 257 subclass 419]  419           Subclass 419 indent level is 4 With thinned central active portion of semiconductor surrounded by thick insensitive portion (e.g. diaphragm type strain gauge)
[List of Patents for class 257 subclass 420]  420           Subclass 420 indent level is 2 Means to reduce sensitivity to physical deformation
[List of Patents for class 257 subclass 421]  421           Subclass 421 indent level is 1 Magnetic field
[List of Patents for class 257 subclass 422]  422           Subclass 422 indent level is 2 With magnetic field directing means (e.g., shield, pole piece, etc.)
[List of Patents for class 257 subclass 423]  423           Subclass 423 indent level is 2 Bipolar transistor magnetic field sensor (e.g., lateral bipolar transistor)
[List of Patents for class 257 subclass 424]  424           Subclass 424 indent level is 2 Sensor with region of high carrier recombination (e.g., magnetodiode with carriers deflected to recombination region by magnetic field)
[List of Patents for class 257 subclass 425]  425           Subclass 425 indent level is 2 Magnetic field detector using compound semiconductor material (e.g., GaAs, InSb, etc.)
[List of Patents for class 257 subclass 426]  426           Subclass 426 indent level is 2 Differential output (e.g., with offset adjustment means or with means to reduce temperature sensitivity)
[List of Patents for class 257 subclass 427]  427           Subclass 427 indent level is 2 Magnetic field sensor in integrated circuit (e.g., in bipolar transistor integrated circuit)
[List of Patents for class 257 subclass 428]  428           Subclass 428 indent level is 1 Electromagnetic or particle radiation
[List of Patents for class 257 subclass 429]  429           Subclass 429 indent level is 2 Charged or elementary particles
[List of Patents for class 257 subclass 430]  430           Subclass 430 indent level is 3 With active region having effective impurity concentration less than 10 12 atoms/cm 3
[List of Patents for class 257 subclass 431]  431           Subclass 431 indent level is 2 Light
[List of Patents for class 257 subclass 432]  432           Subclass 432 indent level is 3 With optical element
[List of Patents for class 257 subclass 433]  433           Subclass 433 indent level is 3 With housing or encapsulation
[List of Patents for class 257 subclass 434]  434           Subclass 434 indent level is 4 With window means
[List of Patents for class 257 subclass 435]  435           Subclass 435 indent level is 3 With optical shield or mask means
[List of Patents for class 257 subclass 436]  436           Subclass 436 indent level is 3 With means for increasing light absorption (e.g., redirection of unabsorbed light)
[List of Patents for class 257 subclass 437]  437           Subclass 437 indent level is 4 Antireflection coating
[List of Patents for class 257 subclass 438]  438           Subclass 438 indent level is 3 Avalanche junction
[List of Patents for class 257 subclass 439]  439           Subclass 439 indent level is 3 Containing dopant adapted for photoionization
[List of Patents for class 257 subclass 440]  440           Subclass 440 indent level is 3 With different sensor portions responsive to different wavelengths (e.g., color imager)
[List of Patents for class 257 subclass 441]  441           Subclass 441 indent level is 3 Narrow band gap semiconductor (<<1eV) (e.g., PbSnTe)
[List of Patents for class 257 subclass 442]  442           Subclass 442 indent level is 4 II-VI compound semiconductor (e.g., HgCdTe)
[List of Patents for class 257 subclass 443]  443           Subclass 443 indent level is 3 Matrix or array (e.g., single line arrays)
[List of Patents for class 257 subclass 444]  444           Subclass 444 indent level is 4 Light sensor elements overlie active switching elements in integrated circuit (e.g., where the sensor elements are deposited on an integrated circuit)
[List of Patents for class 257 subclass 445]  445           Subclass 445 indent level is 4 With antiblooming means
[List of Patents for class 257 subclass 446]  446           Subclass 446 indent level is 4 With specific isolation means in integrated circuit
[List of Patents for class 257 subclass 447]  447           Subclass 447 indent level is 4 With backside illumination (e.g., having a thinned central area or a non-absorbing substrate)
[List of Patents for class 257 subclass 448]  448           Subclass 448 indent level is 4 With particular electrode configuration
[List of Patents for class 257 subclass 449]  449           Subclass 449 indent level is 3 Schottky barrier (e.g., a transparent Schottky metallic layer or a Schottky barrier containing at least one of indium or tin (e.g., SnO 2 , indium tin oxide))
[List of Patents for class 257 subclass 450]  450           Subclass 450 indent level is 4 With doping profile to adjust barrier height
[List of Patents for class 257 subclass 451]  451           Subclass 451 indent level is 4 Responsive to light having lower energy (i.e., longer wavelength) than forbidden band gap energy of semiconductor (e.g., by excitation of carriers from metal into semiconductor)
[List of Patents for class 257 subclass 452]  452           Subclass 452 indent level is 4 With edge protection, e.g., doped guard ring or mesa structure
[List of Patents for class 257 subclass 453]  453           Subclass 453 indent level is 4 With specified Schottky metallic layer
[List of Patents for class 257 subclass 454]  454           Subclass 454 indent level is 5 Schottky metallic layer is a silicide
[List of Patents for class 257 subclass 455]  455           Subclass 455 indent level is 6 Silicide of Platinum group metal
[List of Patents for class 257 subclass 456]  456           Subclass 456 indent level is 6 Silicide of refractory metal
[List of Patents for class 257 subclass 457]  457           Subclass 457 indent level is 4 With particular contact geometry (e.g., ring or grid)
[List of Patents for class 257 subclass 458]  458           Subclass 458 indent level is 3 PIN detector, including combinations with non-light responsive active devices
[List of Patents for class 257 subclass 459]  459           Subclass 459 indent level is 3 With particular contact geometry (e.g., ring or grid, or bonding pad arrangement)
[List of Patents for class 257 subclass 460]  460           Subclass 460 indent level is 3 With backside illumination (e.g., with a thinned central area or non-absorbing substrate)
[List of Patents for class 257 subclass 461]  461           Subclass 461 indent level is 3 Light responsive pn junction
[List of Patents for class 257 subclass 462]  462           Subclass 462 indent level is 4 Phototransistor
[List of Patents for class 257 subclass 463]  463           Subclass 463 indent level is 4 With particular doping concentration
[List of Patents for class 257 subclass 464]  464           Subclass 464 indent level is 4 With particular layer thickness (e.g., layer less than light absorption depth)
[List of Patents for class 257 subclass 465]  465           Subclass 465 indent level is 4 Geometric configuration of junction (e.g., fingers)
[List of Patents for class 257 subclass 466]  466           Subclass 466 indent level is 3 External physical configuration of semiconductor (e.g., mesas, grooves)
[List of Patents for class 257 subclass 467]  467           Subclass 467 indent level is 1 Temperature
[List of Patents for class 257 subclass 468]  468           Subclass 468 indent level is 2 Semiconductor device operated at cryogenic temperature
[List of Patents for class 257 subclass 469]  469           Subclass 469 indent level is 2 With means to reduce temperature sensitivity (e.g., reduction of temperature sensitivity of junction breakdown voltage by using a compensating element)
[List of Patents for class 257 subclass 470]  470           Subclass 470 indent level is 2 Pn junction adapted as temperature sensor
[List of Patents for class 257 subclass 471]  471           SCHOTTKY BARRIER
[List of Patents for class 257 subclass 472]  472           Subclass 472 indent level is 1 To compound semiconductor
[List of Patents for class 257 subclass 473]  473           Subclass 473 indent level is 2 With specified Schottky metal
[List of Patents for class 257 subclass 474]  474           Subclass 474 indent level is 1 As active junction in bipolar transistor (e.g., Schottky collector)
[List of Patents for class 257 subclass 475]  475           Subclass 475 indent level is 1 With doping profile to adjust barrier height
[List of Patents for class 257 subclass 476]  476           Subclass 476 indent level is 1 In integrated structure
[List of Patents for class 257 subclass 477]  477           Subclass 477 indent level is 2 With bipolar transistor
[List of Patents for class 257 subclass 478]  478           Subclass 478 indent level is 3 Plural Schottky barriers with different barrier heights
[List of Patents for class 257 subclass 479]  479           Subclass 479 indent level is 3 Connected across base-collector junction of transistor (e.g., Baker clamp)
[List of Patents for class 257 subclass 480]  480           Subclass 480 indent level is 1 In voltage variable capacitance diode
[List of Patents for class 257 subclass 481]  481           Subclass 481 indent level is 1 Avalanche diode (e.g., so-called "Zener" diode having breakdown voltage greater than 6 volts)
[List of Patents for class 257 subclass 482]  482           Subclass 482 indent level is 2 Microwave transit time device (e.g., IMPATT diode)
[List of Patents for class 257 subclass 483]  483           Subclass 483 indent level is 1 With means to prevent edge breakdown
[List of Patents for class 257 subclass 484]  484           Subclass 484 indent level is 2 Guard ring
[List of Patents for class 257 subclass 485]  485           Subclass 485 indent level is 1 Specified materials
[List of Patents for class 257 subclass 486]  486           Subclass 486 indent level is 2 Layered (e.g., a diffusion barrier material layer or a silicide layer or a precious metal layer)
[List of Patents for class 257 subclass 487]  487           WITH MEANS TO INCREASE BREAKDOWN VOLTAGE THRESHOLD
[List of Patents for class 257 subclass 488]  488           Subclass 488 indent level is 1 Field relief electrode
[List of Patents for class 257 subclass 489]  489           Subclass 489 indent level is 2 Resistive
[List of Patents for class 257 subclass 490]  490           Subclass 490 indent level is 2 Combined with floating pn junction guard region
[List of Patents for class 257 subclass 491]  491           Subclass 491 indent level is 1 In integrated circuit
[List of Patents for class 257 subclass 492]  492           Subclass 492 indent level is 2 With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices)
[List of Patents for class 257 subclass 493]  493           Subclass 493 indent level is 1 With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices)
[List of Patents for class 257 subclass 494]  494           Subclass 494 indent level is 1 Reverse-biased pn junction guard region
[List of Patents for class 257 subclass 495]  495           Subclass 495 indent level is 1 Floating pn junction guard region
[List of Patents for class 257 subclass 496]  496           Subclass 496 indent level is 1 With physical configuration of semiconductor surface to reduce electric field (e.g., reverse bevels, double bevels, stepped mesas, etc.)
[List of Patents for class 257 subclass 497]  497           PUNCHTHROUGH STRUCTURE DEVICE (E.G., PUNCHTHROUGH TRANSISTOR, CAMEL BARRIER DIODE)
[List of Patents for class 257 subclass 498]  498           Subclass 498 indent level is 1 Punchthrough region fully depleted at zero external applied bias voltage (e.g., camel barrier or planar doped barrier devices, or so-called "Bipolar SIT" devices)
[List of Patents for class 257 subclass 499]  499           INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS
[List of Patents for class 257 subclass 500]  500           Subclass 500 indent level is 1 Including high voltage or high power devices isolated from low voltage or low power devices in the same integrated circuit
[List of Patents for class 257 subclass 501]  501           Subclass 501 indent level is 2 Including dielectric isolation means
[List of Patents for class 257 subclass 502]  502           Subclass 502 indent level is 2 High power or high voltage device extends completely through semiconductor substrate (e.g., backside collector contact)
[List of Patents for class 257 subclass 503]  503           Subclass 503 indent level is 1 With contact or metallization configuration to reduce parasitic coupling (e.g., separate ground pads for different parts of integrated circuit)
[List of Patents for class 257 subclass 504]  504           Subclass 504 indent level is 1 Including means for establishing a depletion region throughout a semiconductor layer for isolating devices in different portions of the layer (e.g., "JFET" isolation)
[List of Patents for class 257 subclass 505]  505           Subclass 505 indent level is 1 With polycrystalline semiconductor isolation region in direct contact with single crystal active semiconductor material
[List of Patents for class 257 subclass 506]  506           Subclass 506 indent level is 1 Including dielectric isolation means
[List of Patents for class 257 subclass 507]  507           Subclass 507 indent level is 2 With single crystal insulating substrate (e.g., sapphire)
[List of Patents for class 257 subclass 508]  508           Subclass 508 indent level is 2 With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)
[List of Patents for class 257 subclass 509]  509           Subclass 509 indent level is 2 Combined with pn junction isolation (e.g., isoplanar, LOCOS)
[List of Patents for class 257 subclass 510]  510           Subclass 510 indent level is 3 Dielectric in groove
[List of Patents for class 257 subclass 511]  511           Subclass 511 indent level is 4 With complementary (npn and pnp) bipolar transistor structures
[List of Patents for class 257 subclass 512]  512           Subclass 512 indent level is 5 Complementary devices share common active region (e.g., integrated injection logic, I 2 L)
[List of Patents for class 257 subclass 513]  513           Subclass 513 indent level is 4 Vertical walled groove
[List of Patents for class 257 subclass 514]  514           Subclass 514 indent level is 5 With active junction abutting groove (e.g., "walled emitter")
[List of Patents for class 257 subclass 515]  515           Subclass 515 indent level is 4 With active junction abutting groove (e.g., "walled emitter")
[List of Patents for class 257 subclass 516]  516           Subclass 516 indent level is 4 With passive component (e.g., resistor, capacitor, etc.)
[List of Patents for class 257 subclass 517]  517           Subclass 517 indent level is 4 With bipolar transistor structure
[List of Patents for class 257 subclass 518]  518           Subclass 518 indent level is 5 With polycrystalline connecting region (e.g., polysilicon base contact)
[List of Patents for class 257 subclass 519]  519           Subclass 519 indent level is 4 Including heavily doped channel stop region adjacent groove
[List of Patents for class 257 subclass 520]  520           Subclass 520 indent level is 4 Conductive filling in dielectric-lined groove (e.g., polysilicon backfill)
[List of Patents for class 257 subclass 521]  521           Subclass 521 indent level is 4 Sides of grooves along major crystal planes (e.g., (111), (100) planes, etc.)
[List of Patents for class 257 subclass 522]  522           Subclass 522 indent level is 2 Air isolation (e.g., beam lead supported semiconductor islands)
[List of Patents for class 257 subclass 523]  523           Subclass 523 indent level is 2 Isolation by region of intrinsic (undoped) semiconductor material (e.g., including region physically damaged by proton bombardment)
[List of Patents for class 257 subclass 524]  524           Subclass 524 indent level is 2 Full dielectric isolation with polycrystalline semiconductor substrate
[List of Patents for class 257 subclass 525]  525           Subclass 525 indent level is 3 With complementary (npn and pnp) bipolar transistor structures
[List of Patents for class 257 subclass 526]  526           Subclass 526 indent level is 2 With bipolar transistor structure
[List of Patents for class 257 subclass 527]  527           Subclass 527 indent level is 3 Sides of isolated semiconductor islands along major crystal planes (e.g., (111), (100) planes, etc.)
[List of Patents for class 257 subclass 528]  528           Subclass 528 indent level is 1 Passive components in ICs
[List of Patents for class 257 subclass 529]  529           Subclass 529 indent level is 2 Including programmable passive component (e.g., fuse)
[List of Patents for class 257 subclass 530]  530           Subclass 530 indent level is 3 Anti-fuse
[List of Patents for class 257 subclass 531]  531           Subclass 531 indent level is 2 Including inductive element
[List of Patents for class 257 subclass 532]  532           Subclass 532 indent level is 2 Including capacitor component
[List of Patents for class 257 subclass 533]  533           Subclass 533 indent level is 3 Combined with resistor to form RC filter structure
[List of Patents for class 257 subclass 534]  534           Subclass 534 indent level is 3 With means to increase surface area (e.g., grooves, ridges, etc.)
[List of Patents for class 257 subclass 535]  535           Subclass 535 indent level is 3 Both terminals of capacitor isolated from substrate
[List of Patents for class 257 subclass 536]  536           Subclass 536 indent level is 2 Including resistive element
[List of Patents for class 257 subclass 537]  537           Subclass 537 indent level is 3 Using specific resistive material
[List of Patents for class 257 subclass 538]  538           Subclass 538 indent level is 4 Polycrystalline silicon (doped or undoped)
[List of Patents for class 257 subclass 539]  539           Subclass 539 indent level is 3 Combined with bipolar transistor
[List of Patents for class 257 subclass 540]  540           Subclass 540 indent level is 4 With compensation for non-linearity (e.g., dynamic isolation pocket bias)
[List of Patents for class 257 subclass 541]  541           Subclass 541 indent level is 4 Pinch resistor
[List of Patents for class 257 subclass 542]  542           Subclass 542 indent level is 4 Resistor has same doping as emitter or collector of bipolar transistor
[List of Patents for class 257 subclass 543]  543           Subclass 543 indent level is 4 Lightly doped junction isolated resistor (e.g., ion implanted resistor)
[List of Patents for class 257 subclass 544]  544           Subclass 544 indent level is 1 With pn junction isolation
[List of Patents for class 257 subclass 545]  545           Subclass 545 indent level is 2 With means to control isolation junction capacitance (e.g., lightly doped layer at isolation junction to increase depletion layer width)
[List of Patents for class 257 subclass 546]  546           Subclass 546 indent level is 2 With structural means to protect against excess or reversed polarity voltage
[List of Patents for class 257 subclass 547]  547           Subclass 547 indent level is 2 With structural means to control parasitic transistor action or leakage current
[List of Patents for class 257 subclass 548]  548           Subclass 548 indent level is 2 At least three regions of alternating conductivity types with dopant concentration gradients decreasing from surface of semiconductor (e.g., "triple-diffused" integrated circuit)
[List of Patents for class 257 subclass 549]  549           Subclass 549 indent level is 2 With substrate and lightly doped surface layer of same conductivity type, separated by subsurface heavily doped region of opposite conductivity type (e.g., "collector diffused isolation" integrated circuit)
[List of Patents for class 257 subclass 550]  550           Subclass 550 indent level is 2 With lightly doped surface layer of one conductivity type on substrate of opposite conductivity type, having plural heavily doped portions of the one conductivity type between the layer and substrate, different ones of the heavily doped portions having differing depths or physical extent
[List of Patents for class 257 subclass 551]  551           Subclass 551 indent level is 2 Including voltage reference element (e.g., avalanche diode, so-called "Zener diode" with breakdown voltage greater than 6 volts or with positive temperature coefficient of breakdown voltage)
[List of Patents for class 257 subclass 552]  552           Subclass 552 indent level is 2 With bipolar transistor structure
[List of Patents for class 257 subclass 553]  553           Subclass 553 indent level is 3 Transistors of same conductivity type (e.g., npn) having different current gain or different operating voltage characteristics
[List of Patents for class 257 subclass 554]  554           Subclass 554 indent level is 3 With connecting region made of polycrystalline semiconductor material (e.g., polysilicon base contact)
[List of Patents for class 257 subclass 555]  555           Subclass 555 indent level is 3 Complementary bipolar transistor structures (e.g., integrated injection logic, I 2 L)
[List of Patents for class 257 subclass 556]  556           Subclass 556 indent level is 4 Including lateral bipolar transistor structure
[List of Patents for class 257 subclass 557]  557           Subclass 557 indent level is 1 Lateral bipolar transistor structure
[List of Patents for class 257 subclass 558]  558           Subclass 558 indent level is 2 With base region doping concentration step or gradient or with means to increase current gain
[List of Patents for class 257 subclass 559]  559           Subclass 559 indent level is 2 With active region formed along groove or exposed edge in semiconductor
[List of Patents for class 257 subclass 560]  560           Subclass 560 indent level is 2 With multiple collectors or emitters
[List of Patents for class 257 subclass 561]  561           Subclass 561 indent level is 3 With different emitter to collector spacings or facing areas
[List of Patents for class 257 subclass 562]  562           Subclass 562 indent level is 3 With auxiliary collector/re-emitter between emitter and output collector (e.g., "Current Hogging Logic" device)
[List of Patents for class 257 subclass 563]  563           Subclass 563 indent level is 1 With multiple separately connected emitter, collector, or base regions in same transistor structure
[List of Patents for class 257 subclass 564]  564           Subclass 564 indent level is 2 Multiple base or collector regions
[List of Patents for class 257 subclass 565]  565           BIPOLAR TRANSISTOR STRUCTURE
[List of Patents for class 257 subclass 566]  566           Subclass 566 indent level is 1 Plural non-isolated transistor structures in same structure
[List of Patents for class 257 subclass 567]  567           Subclass 567 indent level is 2 Darlington configuration (i.e., emitter to collector current of input transistor supplied to base region of output transistor)
[List of Patents for class 257 subclass 568]  568           Subclass 568 indent level is 3 More than two Darlington-connected transistors
[List of Patents for class 257 subclass 569]  569           Subclass 569 indent level is 3 Complementary Darlington-connected transistors
[List of Patents for class 257 subclass 570]  570           Subclass 570 indent level is 3 With active components in addition to Darlington transistors (e.g., antisaturation diode, bleeder diode connected antiparallel to input transistor base-emitter junction, etc.)
[List of Patents for class 257 subclass 571]  571           Subclass 571 indent level is 3 Non-planar structure (e.g., mesa emitter, or having a groove to define resistor)
[List of Patents for class 257 subclass 572]  572           Subclass 572 indent level is 3 With resistance means connected between transistor base regions
[List of Patents for class 257 subclass 573]  573           Subclass 573 indent level is 3 With housing or contact structure or configuration
[List of Patents for class 257 subclass 574]  574           Subclass 574 indent level is 2 Complementary transistors share common active region (e.g., integrated injection logic, I 2 L)
[List of Patents for class 257 subclass 575]  575           Subclass 575 indent level is 3 Including lateral bipolar transistor structure
[List of Patents for class 257 subclass 576]  576           Subclass 576 indent level is 4 With contacts of refractory material (e.g., polysilicon, silicide of refractory or platinum group metal)
[List of Patents for class 257 subclass 577]  577           Subclass 577 indent level is 1 Including additional component in same, non-isolated structure (e.g., transistor with diode, transistor with resistor, etc.)
[List of Patents for class 257 subclass 578]  578           Subclass 578 indent level is 1 With enlarged emitter area (e.g., power device)
[List of Patents for class 257 subclass 579]  579           Subclass 579 indent level is 2 With separate emitter areas connected in parallel
[List of Patents for class 257 subclass 580]  580           Subclass 580 indent level is 3 With current ballasting means (e.g., emitter ballasting resistors or base current ballasting means)
[List of Patents for class 257 subclass 581]  581           Subclass 581 indent level is 4 Thin film ballasting means (e.g., polysilicon resistor)
[List of Patents for class 257 subclass 582]  582           Subclass 582 indent level is 2 With current ballasting means (e.g., emitter ballasting resistors or base current ballasting resistors)
[List of Patents for class 257 subclass 583]  583           Subclass 583 indent level is 2 With means to reduce transistor action in selected portions of transistor (e.g., heavy base region doping under central web of emitter to prevent secondary breakdown)
[List of Patents for class 257 subclass 584]  584           Subclass 584 indent level is 2 With housing or contact (i.e., electrode) means
[List of Patents for class 257 subclass 585]  585           Subclass 585 indent level is 1 With means to increase inverse gain
[List of Patents for class 257 subclass 586]  586           Subclass 586 indent level is 1 With non-planar semiconductor surface (e.g., groove, mesa, bevel, etc.)
[List of Patents for class 257 subclass 587]  587           Subclass 587 indent level is 1 With specified electrode means
[List of Patents for class 257 subclass 588]  588           Subclass 588 indent level is 2 Including polycrystalline semiconductor as connection
[List of Patents for class 257 subclass 589]  589           Subclass 589 indent level is 1 Avalanche transistor
[List of Patents for class 257 subclass 590]  590           Subclass 590 indent level is 1 With means to reduce minority carrier lifetime (e.g., region of deep level dopant or region of crystal damage)
[List of Patents for class 257 subclass 591]  591           Subclass 591 indent level is 1 With emitter region having specified doping concentration profile (e.g., high-low concentration step)
[List of Patents for class 257 subclass 592]  592           Subclass 592 indent level is 1 With base region having specified doping concentration profile or specified configuration (e.g., inactive base more heavily doped than active base or base region has constant doping concentration portion (e.g., epitaxial base))
[List of Patents for class 257 subclass 593]  593           Subclass 593 indent level is 1 With means to increase current gain or operating frequency
[List of Patents for class 257 subclass 594]  594           WITH GROOVE TO DEFINE PLURAL DIODES
[List of Patents for class 257 subclass 595]  595           VOLTAGE VARIABLE CAPACITANCE DEVICE
[List of Patents for class 257 subclass 596]  596           Subclass 596 indent level is 1 With specified dopant profile
[List of Patents for class 257 subclass 597]  597           Subclass 597 indent level is 2 Retrograde dopant profile (e.g., dopant concentration decreases with distance from rectifying junction)
[List of Patents for class 257 subclass 598]  598           Subclass 598 indent level is 1 With plural junctions whose depletion regions merge to vary voltage dependence
[List of Patents for class 257 subclass 599]  599           Subclass 599 indent level is 1 With means to increase active junction area (e.g., grooved or convoluted surface)
[List of Patents for class 257 subclass 600]  600           Subclass 600 indent level is 1 With physical configuration to vary voltage dependence (e.g., mesa)
[List of Patents for class 257 subclass 601]  601           Subclass 601 indent level is 1 Plural diodes in same non-isolated structure, or device having three or more terminals
[List of Patents for class 257 subclass 602]  602           Subclass 602 indent level is 1 With specified housing or contact
[List of Patents for class 257 subclass 603]  603           AVALANCHE DIODE (E.G., SO-CALLED "ZENER" DIODE HAVING BREAKDOWN VOLTAGE GREATER THAN 6 VOLTS)
[List of Patents for class 257 subclass 604]  604           Subclass 604 indent level is 1 Microwave transit time device (e.g., IMPATT diode)
[List of Patents for class 257 subclass 605]  605           Subclass 605 indent level is 1 With means to limit area of breakdown (e.g., guard ring having higher breakdown voltage)
[List of Patents for class 257 subclass 606]  606           Subclass 606 indent level is 2 Subsurface breakdown
[List of Patents for class 257 subclass 607]  607           WITH SPECIFIED DOPANT (E.G., PLURAL DOPANTS OF SAME CONDUCTIVITY IN SAME REGION)
[List of Patents for class 257 subclass 608]  608           Subclass 608 indent level is 1 Switching device based on filling and emptying of deep energy levels
[List of Patents for class 257 subclass 609]  609           Subclass 609 indent level is 1 For compound semiconductor (e.g., deep level dopant)
[List of Patents for class 257 subclass 610]  610           Subclass 610 indent level is 1 Deep level dopant
[List of Patents for class 257 subclass 611]  611           Subclass 611 indent level is 2 With specified distribution (e.g., laterally localized, with specified concentration distribution or gradient)
[List of Patents for class 257 subclass 612]  612           Subclass 612 indent level is 2 Deep level dopant other than gold or platinum
[List of Patents for class 257 subclass 613]  613           INCLUDING SEMICONDUCTOR MATERIAL OTHER THAN SILICON OR GALLIUM ARSENIDE (GAAS) (E.G., PB X SN 1-X TE)
[List of Patents for class 257 subclass 614]  614           Subclass 614 indent level is 1 Group II-VI compound (e.g., CdTe, Hg x Cd 1-x Te)
[List of Patents for class 257 subclass 615]  615           Subclass 615 indent level is 1 Group III-V compound (e.g., InP)
[List of Patents for class 257 subclass 616]  616           Subclass 616 indent level is 1 Containing germanium, Ge
[List of Patents for class 257 subclass 617]  617           INCLUDING REGION CONTAINING CRYSTAL DAMAGE
[List of Patents for class 257 subclass 618]  618           PHYSICAL CONFIGURATION OF SEMICONDUCTOR (E.G., MESA, BEVEL, GROOVE, ETC.)
[List of Patents for class 257 subclass 619]  619           Subclass 619 indent level is 1 With thin active central semiconductor portion surrounded by thicker inactive shoulder (e.g., for mechanical support)
[List of Patents for class 257 subclass 620]  620           Subclass 620 indent level is 1 With peripheral feature due to separation of smaller semiconductor chip from larger wafer (e.g., scribe region, or means to prevent edge effects such as leakage current at peripheral chip separation area)
[List of Patents for class 257 subclass 621]  621           Subclass 621 indent level is 1 With electrical contact in hole in semiconductor (e.g., lead extends through semiconductor body)
[List of Patents for class 257 subclass 622]  622           Subclass 622 indent level is 1 Groove
[List of Patents for class 257 subclass 623]  623           Subclass 623 indent level is 1 Mesa structure (e.g., including undercut or stepped mesa configuration or having constant slope taper)
[List of Patents for class 257 subclass 624]  624           Subclass 624 indent level is 2 With low resistance ohmic connection means along exposed mesa edge (e.g., contact or heavily doped region along exposed mesa to reduce "skin effect" losses in microwave diode)
[List of Patents for class 257 subclass 625]  625           Subclass 625 indent level is 2 Semiconductor body including mesa is intimately bonded to thick electrical and/or thermal conductor member of larger lateral extent than semiconductor body (e.g., "plated heat sink" microwave diode)
[List of Patents for class 257 subclass 626]  626           Subclass 626 indent level is 2 Combined with passivating coating
[List of Patents for class 257 subclass 627]  627           Subclass 627 indent level is 1 With specified crystal plane or axis
[List of Patents for class 257 subclass 628]  628           Subclass 628 indent level is 2 Major crystal plane or axis other than (100), (110), or (111) (e.g., (731) axis, crystal plane several degrees from (100) toward (011), etc.)
[List of Patents for class 257 subclass 629]  629           WITH MEANS TO CONTROL SURFACE EFFECTS
[List of Patents for class 257 subclass 630]  630           Subclass 630 indent level is 1 With inversion-preventing shield electrode
[List of Patents for class 257 subclass 631]  631           Subclass 631 indent level is 1 In compound semiconductor material (e.g., GaAs)
[List of Patents for class 257 subclass 632]  632           Subclass 632 indent level is 1 Insulating coating
[List of Patents for class 257 subclass 633]  633           Subclass 633 indent level is 2 With thermal expansion compensation (e.g., thermal expansion of glass passivant matched to that of semiconductor)
[List of Patents for class 257 subclass 634]  634           Subclass 634 indent level is 2 Insulating coating of glass composition containing component to adjust melting or softening temperature (e.g., low melting point glass)
[List of Patents for class 257 subclass 635]  635           Subclass 635 indent level is 2 Multiple layers
[List of Patents for class 257 subclass 636]  636           Subclass 636 indent level is 3 At least one layer of semi-insulating material
[List of Patents for class 257 subclass 637]  637           Subclass 637 indent level is 3 Three or more insulating layers
[List of Patents for class 257 subclass 638]  638           Subclass 638 indent level is 3 With discontinuous or varying thickness layer (e.g., layer covers only selected portions of semiconductor)
[List of Patents for class 257 subclass 639]  639           Subclass 639 indent level is 3 At least one layer of silicon oxynitride
[List of Patents for class 257 subclass 640]  640           Subclass 640 indent level is 3 At least one layer of silicon nitride
[List of Patents for class 257 subclass 641]  641           Subclass 641 indent level is 4 Combined with glass layer
[List of Patents for class 257 subclass 642]  642           Subclass 642 indent level is 3 At least one layer of organic material
[List of Patents for class 257 subclass 643]  643           Subclass 643 indent level is 4 Polyimide or polyamide
[List of Patents for class 257 subclass 644]  644           Subclass 644 indent level is 3 At least one layer of glass
[List of Patents for class 257 subclass 645]  645           Subclass 645 indent level is 3 Insulating layer containing specified electrical charge (e.g., net negative electrical charge)
[List of Patents for class 257 subclass 646]  646           Subclass 646 indent level is 2 Coating of semi-insulating material (e.g., amorphous silicon or silicon-rich silicon oxide)
[List of Patents for class 257 subclass 647]  647           Subclass 647 indent level is 2 Insulating layer recessed into semiconductor surface (e.g., LOCOS oxide)
[List of Patents for class 257 subclass 648]  648           Subclass 648 indent level is 3 Combined with channel stop region in semiconductor
[List of Patents for class 257 subclass 649]  649           Subclass 649 indent level is 2 Insulating layer of silicon nitride or silicon oxynitride
[List of Patents for class 257 subclass 650]  650           Subclass 650 indent level is 2 Insulating layer of glass
[List of Patents for class 257 subclass 651]  651           Subclass 651 indent level is 2 Details of insulating layer electrical charge (e.g., negative insulator layer charge)
[List of Patents for class 257 subclass 652]  652           Subclass 652 indent level is 1 Channel stop layer
[List of Patents for class 257 subclass 653]  653           WITH SPECIFIED SHAPE OF PN JUNCTION
[List of Patents for class 257 subclass 654]  654           Subclass 654 indent level is 1 Interdigitated pn junction or more heavily doped side of junction is concave
[List of Patents for class 257 subclass 655]  655           WITH SPECIFIED IMPURITY CONCENTRATION GRADIENT
[List of Patents for class 257 subclass 656]  656           Subclass 656 indent level is 1 With high resistivity (e.g., "intrinsic") layer between P and N layers (e.g., PIN diode)
[List of Patents for class 257 subclass 657]  657           Subclass 657 indent level is 1 Stepped profile
[List of Patents for class 257 subclass 658]  658           PLATE TYPE RECTIFIER ARRAY
[List of Patents for class 257 subclass 659]  659           WITH SHIELDING (E.G., ELECTRICAL OR MAGNETIC SHIELDING, OR FROM ELECTROMAGNETIC RADIATION OR CHARGED PARTICLES)
[List of Patents for class 257 subclass 660]  660           Subclass 660 indent level is 1 With means to shield device contained in housing or package from charged particles (e.g., alpha particles) or highly ionizing radiation (i.e., hard X-rays or shorter wavelength)
[List of Patents for class 257 subclass 661]  661           SUPERCONDUCTIVE CONTACT OR LEAD
[List of Patents for class 257 subclass 662]  662           Subclass 662 indent level is 1 Transmission line or shielded
[List of Patents for class 257 subclass 663]  663           Subclass 663 indent level is 1 On integrated circuit
[List of Patents for class 257 subclass 664]  664           TRANSMISSION LINE LEAD (E.G., STRIPLINE, COAX, ETC.)
[List of Patents for class 257 subclass 665]  665           CONTACTS OR LEADS INCLUDING FUSIBLE LINK MEANS OR NOISE SUPPRESSION MEANS
[List of Patents for class 257 subclass 666]  666           LEAD FRAME
[List of Patents for class 257 subclass 667]  667           Subclass 667 indent level is 1 With dam or vent for encapsulant
[List of Patents for class 257 subclass 668]  668           Subclass 668 indent level is 1 On insulating carrier other than a printed circuit board
[List of Patents for class 257 subclass 669]  669           Subclass 669 indent level is 1 With stress relief
[List of Patents for class 257 subclass 670]  670           Subclass 670 indent level is 1 With separate tie bar element or plural tie bars
[List of Patents for class 257 subclass 671]  671           Subclass 671 indent level is 2 Of insulating material
[List of Patents for class 257 subclass 672]  672           Subclass 672 indent level is 1 Small lead frame (e.g., "spider" frame) for connecting a large lead frame to a semiconductor chip
[List of Patents for class 257 subclass 673]  673           Subclass 673 indent level is 1 With bumps on ends of lead fingers to connect to semiconductor
[List of Patents for class 257 subclass 674]  674           Subclass 674 indent level is 1 With means for controlling lead tension
[List of Patents for class 257 subclass 675]  675           Subclass 675 indent level is 1 With heat sink means
[List of Patents for class 257 subclass 676]  676           Subclass 676 indent level is 1 With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED)
[List of Patents for class 257 subclass 677]  677           Subclass 677 indent level is 1 Of specified material other than copper (e.g., Kovar (T.M.))
[List of Patents for class 257 subclass 678]  678           HOUSING OR PACKAGE
[List of Patents for class 257 subclass 679]  679           Subclass 679 indent level is 1 Smart (e.g., credit) card package
[List of Patents for class 257 subclass 680]  680           Subclass 680 indent level is 1 With window means
[List of Patents for class 257 subclass 681]  681           Subclass 681 indent level is 2 For erasing EPROM
[List of Patents for class 257 subclass 682]  682           Subclass 682 indent level is 1 With desiccant, getter, or gas filling
[List of Patents for class 257 subclass 683]  683           Subclass 683 indent level is 1 With means to prevent explosion of package
[List of Patents for class 257 subclass 684]  684           Subclass 684 indent level is 1 With semiconductor element forming part (e.g., base, of housing)
[List of Patents for class 257 subclass 685]  685           Subclass 685 indent level is 1 Multiple housings
[List of Patents for class 257 subclass 686]  686           Subclass 686 indent level is 2 Stacked arrangement
[List of Patents for class 257 subclass 687]  687           Subclass 687 indent level is 1 Housing or package filled with solid or liquid electrically insulating material
[List of Patents for class 257 subclass 688]  688           Subclass 688 indent level is 1 With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, e.g., ring
[List of Patents for class 257 subclass 689]  689           Subclass 689 indent level is 2 Rigid electrode portion
[List of Patents for class 257 subclass 690]  690           Subclass 690 indent level is 1 With contact or lead
[List of Patents for class 257 subclass 691]  691           Subclass 691 indent level is 2 Having power distribution means (e.g., bus structure)
[List of Patents for class 257 subclass 692]  692           Subclass 692 indent level is 2 With particular lead geometry
[List of Patents for class 257 subclass 693]  693           Subclass 693 indent level is 3 External connection to housing
[List of Patents for class 257 subclass 694]  694           Subclass 694 indent level is 4 Axial leads
[List of Patents for class 257 subclass 695]  695           Subclass 695 indent level is 4 Fanned/radial leads
[List of Patents for class 257 subclass 696]  696           Subclass 696 indent level is 4 Bent (e.g., J-shaped) lead
[List of Patents for class 257 subclass 697]  697           Subclass 697 indent level is 4 Pin grid type
[List of Patents for class 257 subclass 698]  698           Subclass 698 indent level is 2 With specific electrical feedthrough structure
[List of Patents for class 257 subclass 699]  699           Subclass 699 indent level is 3 Housing entirely of metal except for feedthrough structure
[List of Patents for class 257 subclass 700]  700           Subclass 700 indent level is 2 Multiple contact layers separated from each other by insulator means and forming part of a package or housing (e.g., plural ceramic layer package)
[List of Patents for class 257 subclass 701]  701           Subclass 701 indent level is 1 Insulating material
[List of Patents for class 257 subclass 702]  702           Subclass 702 indent level is 2 Of insulating material other than ceramic
[List of Patents for class 257 subclass 703]  703           Subclass 703 indent level is 2 Composite ceramic, or single ceramic with metal
[List of Patents for class 257 subclass 704]  704           Subclass 704 indent level is 2 Cap or lid
[List of Patents for class 257 subclass 705]  705           Subclass 705 indent level is 2 Of high thermal conductivity ceramic (e.g., BeO)
[List of Patents for class 257 subclass 706]  706           Subclass 706 indent level is 2 With heat sink
[List of Patents for class 257 subclass 707]  707           Subclass 707 indent level is 3 Directly attached to semiconductor device
[List of Patents for class 257 subclass 708]  708           Subclass 708 indent level is 1 Entirely of metal except for feedthrough
[List of Patents for class 257 subclass 709]  709           Subclass 709 indent level is 2 With specified insulator to isolate device from housing
[List of Patents for class 257 subclass 710]  710           Subclass 710 indent level is 2 With specified means (e.g., lip) to seal base to cap
[List of Patents for class 257 subclass 711]  711           Subclass 711 indent level is 2 With raised portion of base for mounting semiconductor chip
[List of Patents for class 257 subclass 712]  712           Subclass 712 indent level is 1 With provision for cooling the housing or its contents
[List of Patents for class 257 subclass 713]  713           Subclass 713 indent level is 2 For integrated circuit
[List of Patents for class 257 subclass 714]  714           Subclass 714 indent level is 2 Liquid coolant
[List of Patents for class 257 subclass 715]  715           Subclass 715 indent level is 3 Boiling (evaporative) liquid
[List of Patents for class 257 subclass 716]  716           Subclass 716 indent level is 3 Cryogenic liquid coolant
[List of Patents for class 257 subclass 717]  717           Subclass 717 indent level is 2 Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer)
[List of Patents for class 257 subclass 718]  718           Subclass 718 indent level is 2 Heat dissipating element held in place by clamping or spring means
[List of Patents for class 257 subclass 719]  719           Subclass 719 indent level is 3 Pressed against semiconductor element
[List of Patents for class 257 subclass 720]  720           Subclass 720 indent level is 2 Heat dissipating element has high thermal conductivity insert (e.g., copper slug in aluminum heat sink)
[List of Patents for class 257 subclass 721]  721           Subclass 721 indent level is 2 With gas coolant
[List of Patents for class 257 subclass 722]  722           Subclass 722 indent level is 3 With fins
[List of Patents for class 257 subclass 723]  723           Subclass 723 indent level is 1 For plural devices
[List of Patents for class 257 subclass 724]  724           Subclass 724 indent level is 2 With discrete components
[List of Patents for class 257 subclass 725]  725           Subclass 725 indent level is 2 With electrical isolation means
[List of Patents for class 257 subclass 726]  726           Subclass 726 indent level is 3 Devices held in place by clamping
[List of Patents for class 257 subclass 727]  727           Subclass 727 indent level is 1 Device held in place by clamping
[List of Patents for class 257 subclass 728]  728           Subclass 728 indent level is 1 For high frequency (e.g., microwave) device
[List of Patents for class 257 subclass 729]  729           Subclass 729 indent level is 1 Portion of housing of specific materials
[List of Patents for class 257 subclass 730]  730           Subclass 730 indent level is 1 Outside periphery of package having specified shape or configuration
[List of Patents for class 257 subclass 731]  731           Subclass 731 indent level is 1 With housing mount
[List of Patents for class 257 subclass 732]  732           Subclass 732 indent level is 2 Flanged mount
[List of Patents for class 257 subclass 733]  733           Subclass 733 indent level is 2 Stud mount
[List of Patents for class 257 subclass 734]  734           COMBINED WITH ELECTRICAL CONTACT OR LEAD
[List of Patents for class 257 subclass 735]  735           Subclass 735 indent level is 1 Beam leads (i.e., leads that extend beyond the ends or sides of a chip component)
[List of Patents for class 257 subclass 736]  736           Subclass 736 indent level is 2 Layered
[List of Patents for class 257 subclass 737]  737           Subclass 737 indent level is 1 Bump leads
[List of Patents for class 257 subclass 738]  738           Subclass 738 indent level is 2 Ball shaped
[List of Patents for class 257 subclass 739]  739           Subclass 739 indent level is 1 With textured surface
[List of Patents for class 257 subclass 740]  740           Subclass 740 indent level is 1 With means to prevent contact from penetrating shallow PN junction (e.g., prevention of aluminum "spiking")
[List of Patents for class 257 subclass 741]  741           Subclass 741 indent level is 1 Of specified material other than unalloyed aluminum
[List of Patents for class 257 subclass 742]  742           Subclass 742 indent level is 2 With a semiconductor conductivity substitution type dopant (e.g., germanium in the case of a gallium arsenide semiconductor) in a contact metal)
[List of Patents for class 257 subclass 743]  743           Subclass 743 indent level is 3 For compound semiconductor material
[List of Patents for class 257 subclass 744]  744           Subclass 744 indent level is 2 For compound semiconductor material
[List of Patents for class 257 subclass 745]  745           Subclass 745 indent level is 3 Contact for III-V material
[List of Patents for class 257 subclass 746]  746           Subclass 746 indent level is 2 Composite material (e.g., fibers or strands embedded in solid matrix)
[List of Patents for class 257 subclass 747]  747           Subclass 747 indent level is 2 With thermal expansion matching of contact or lead material to semiconductor active device
[List of Patents for class 257 subclass 748]  748           Subclass 748 indent level is 3 Plural layers of specified contact or lead material
[List of Patents for class 257 subclass 749]  749           Subclass 749 indent level is 2 At least portion of which is transparent to ultraviolet, visible or infrared light
[List of Patents for class 257 subclass 750]  750           Subclass 750 indent level is 2 Layered
[List of Patents for class 257 subclass 751]  751           Subclass 751 indent level is 3 At least one layer forms a diffusion barrier
[List of Patents for class 257 subclass 752]  752           Subclass 752 indent level is 3 Planarized to top of insulating layer
[List of Patents for class 257 subclass 753]  753           Subclass 753 indent level is 3 With adhesion promoting means (e.g., layer of material) to promote adhesion of contact to an insulating layer
[List of Patents for class 257 subclass 754]  754           Subclass 754 indent level is 3 At least one layer of silicide or polycrystalline silicon
[List of Patents for class 257 subclass 755]  755           Subclass 755 indent level is 4 Polysilicon laminated with silicide
[List of Patents for class 257 subclass 756]  756           Subclass 756 indent level is 4 Multiple polysilicon layers
[List of Patents for class 257 subclass 757]  757           Subclass 757 indent level is 4 Silicide of refractory or platinum group metal
[List of Patents for class 257 subclass 758]  758           Subclass 758 indent level is 3 Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit)
[List of Patents for class 257 subclass 759]  759           Subclass 759 indent level is 4 Including organic insulating material between metal levels
[List of Patents for class 257 subclass 760]  760           Subclass 760 indent level is 4 Separating insulating layer is laminate or composite of plural insulating materials (e.g., silicon oxide on silicon nitride, silicon oxynitride)
[List of Patents for class 257 subclass 761]  761           Subclass 761 indent level is 3 At least one layer containing vanadium, hafnium, niobium, zirconium, or tantalum
[List of Patents for class 257 subclass 762]  762           Subclass 762 indent level is 3 At least one layer containing silver or copper
[List of Patents for class 257 subclass 763]  763           Subclass 763 indent level is 3 At least one layer of molybdenum, titanium, or tungsten
[List of Patents for class 257 subclass 764]  764           Subclass 764 indent level is 4 Alloy containing molybdenum, titanium, or tungsten
[List of Patents for class 257 subclass 765]  765           Subclass 765 indent level is 3 At least one layer of an alloy containing aluminum
[List of Patents for class 257 subclass 766]  766           Subclass 766 indent level is 3 At least one layer containing chromium or nickel
[List of Patents for class 257 subclass 767]  767           Subclass 767 indent level is 2 Resistive to electromigration or diffusion of the contact or lead material
[List of Patents for class 257 subclass 768]  768           Subclass 768 indent level is 2 Refractory or platinum group metal or alloy or silicide thereof
[List of Patents for class 257 subclass 769]  769           Subclass 769 indent level is 3 Platinum group metal or silicide thereof
[List of Patents for class 257 subclass 770]  770           Subclass 770 indent level is 3 Molybdenum, tungsten, or titanium or their silicides
[List of Patents for class 257 subclass 771]  771           Subclass 771 indent level is 2 Alloy containing aluminum
[List of Patents for class 257 subclass 772]  772           Subclass 772 indent level is 2 Solder composition
[List of Patents for class 257 subclass 773]  773           Subclass 773 indent level is 1 Of specified configuration
[List of Patents for class 257 subclass 774]  774           Subclass 774 indent level is 2 Via (interconnection hole) shape
[List of Patents for class 257 subclass 775]  775           Subclass 775 indent level is 2 Varying width or thickness of conductor
[List of Patents for class 257 subclass 776]  776           Subclass 776 indent level is 2 Cross-over arrangement, component or structure
[List of Patents for class 257 subclass 777]  777           Subclass 777 indent level is 1 Chip mounted on chip
[List of Patents for class 257 subclass 778]  778           Subclass 778 indent level is 1 Flip chip
[List of Patents for class 257 subclass 779]  779           Subclass 779 indent level is 1 Solder wettable contact, lead, or bond
[List of Patents for class 257 subclass 780]  780           Subclass 780 indent level is 1 Ball or nail head type contact, lead, or bond
[List of Patents for class 257 subclass 781]  781           Subclass 781 indent level is 2 Layered contact, lead or bond
[List of Patents for class 257 subclass 782]  782           Subclass 782 indent level is 1 Die bond
[List of Patents for class 257 subclass 783]  783           Subclass 783 indent level is 2 With adhesive means
[List of Patents for class 257 subclass 784]  784           Subclass 784 indent level is 1 Wire contact, lead, or bond
[List of Patents for class 257 subclass 785]  785           Subclass 785 indent level is 1 By pressure alone
[List of Patents for class 257 subclass 786]  786           Subclass 786 indent level is 1 Configuration or pattern of bonds
[List of Patents for class 257 subclass 787]  787           ENCAPSULATED
[List of Patents for class 257 subclass 788]  788           Subclass 788 indent level is 1 With specified encapsulant
[List of Patents for class 257 subclass 789]  789           Subclass 789 indent level is 2 With specified filler material
[List of Patents for class 257 subclass 790]  790           Subclass 790 indent level is 2 Plural encapsulating layers
[List of Patents for class 257 subclass 791]  791           Subclass 791 indent level is 2 Including polysiloxane (e.g., silicone resin)
[List of Patents for class 257 subclass 792]  792           Subclass 792 indent level is 2 Including polyimide
[List of Patents for class 257 subclass 793]  793           Subclass 793 indent level is 2 Including epoxide
[List of Patents for class 257 subclass 794]  794           Subclass 794 indent level is 2 Including glass
[List of Patents for class 257 subclass 795]  795           Subclass 795 indent level is 1 With specified filler material
[List of Patents for class 257 subclass 796]  796           Subclass 796 indent level is 1 With heat sink embedded in encapsulant
[List of Patents for class 257 subclass 797]  797           ALIGNMENT MARKS
[List of Patents for class 257 subclass 798]  798           MISCELLANEOUS
 
E-SUBCLASSES
 
The following subclasses beginning with the letter E are E-subclasses. Each E-subclass corresponds to a classification in the European Classification system (ECLA). The ECLA classification is parenthesized at the end of the title. E-subclasses contain both U.S. and foreign documents. New U.S. documents are classified here by the USPTO, and European foreign by the EPO. E-subclasses may contain subject matter outside the scope of this class. Consult their definitions, or the documents themselves to clarify or interpret titles.
[List of Patents for class 257 subclass E47.001]  E47.001          BULK NEGATIVE RESISTANCE EFFECT DEVICES, E.G., GUNN-EFFECT DEVICES, PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)
[List of Patents for class 257 subclass E47.002]  E47.002          Subclass E47.002 indent level is 1 Gunn-effect devices or transferred electron devices (EPO)
[List of Patents for class 257 subclass E47.003]  E47.003          Subclass E47.003 indent level is 2 Controlled by electromagnetic radiation (EPO)
[List of Patents for class 257 subclass E47.004]  E47.004          Subclass E47.004 indent level is 2 Gunn diodes (EPO)
[List of Patents for class 257 subclass E47.005]  E47.005          Subclass E47.005 indent level is 1 Processes or apparatus peculiar to manufacture or treatment of these devices or of parts thereof (EPO)
[List of Patents for class 257 subclass E39.001]  E39.001          DEVICES USING SUPERCONDUCTIVITY, PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)
[List of Patents for class 257 subclass E39.002]  E39.002          Subclass E39.002 indent level is 1 Containers or mountings (EPO)
[List of Patents for class 257 subclass E39.003]  E39.003          Subclass E39.003 indent level is 2 For Josephson devices (EPO)
[List of Patents for class 257 subclass E39.004]  E39.004          Subclass E39.004 indent level is 1 Characterized by current path (EPO)
[List of Patents for class 257 subclass E39.005]  E39.005          Subclass E39.005 indent level is 1 Characterized by shape of element (EPO)
[List of Patents for class 257 subclass E39.006]  E39.006          Subclass E39.006 indent level is 1 Characterized by material (EPO)
[List of Patents for class 257 subclass E39.007]  E39.007          Subclass E39.007 indent level is 2 Organic materials (EPO)
[List of Patents for class 257 subclass E39.008]  E39.008          Subclass E39.008 indent level is 3 Fullerene superconductors, e.g., soccerball-shaped allotrope of carbon, e.g., C60, C94 (EPO)
[List of Patents for class 257 subclass E39.009]  E39.009          Subclass E39.009 indent level is 2 Ceramic materials (EPO)
[List of Patents for class 257 subclass E39.01]  E39.01          Subclass E39.01 indent level is 3 Comprising copper oxide (EPO)
[List of Patents for class 257 subclass E39.011]  E39.011          Subclass E39.011 indent level is 4 Multilayered structures, e.g., super lattices (EPO)
[List of Patents for class 257 subclass E39.012]  E39.012          Subclass E39.012 indent level is 1 Devices comprising junction of dissimilar materials, e.g., Josephson-effect devices (EPO)
[List of Patents for class 257 subclass E39.013]  E39.013          Subclass E39.013 indent level is 2 Single electron tunnelling devices (EPO)
[List of Patents for class 257 subclass E39.014]  E39.014          Subclass E39.014 indent level is 2 Josephson-effect devices (EPO)
[List of Patents for class 257 subclass E39.015]  E39.015          Subclass E39.015 indent level is 3 Comprising high Tc ceramic materials (EPO)
[List of Patents for class 257 subclass E39.016]  E39.016          Subclass E39.016 indent level is 2 Three or more electrode devices, e.g., transistor-like structures (EPO)
[List of Patents for class 257 subclass E39.017]  E39.017          Subclass E39.017 indent level is 1 Permanent superconductor devices (EPO)
[List of Patents for class 257 subclass E39.018]  E39.018          Subclass E39.018 indent level is 2 Comprising high Tc ceramic materials (EPO)
[List of Patents for class 257 subclass E39.019]  E39.019          Subclass E39.019 indent level is 2 Three or more electrode devices (EPO)
[List of Patents for class 257 subclass E39.02]  E39.02          Subclass E39.02 indent level is 3 Field-effect devices (EPO)
[List of Patents for class 257 subclass E51.001]  E51.001          ORGANIC SOLID STATE DEVICES, PROCESSES OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES OR OF PARTS THEREOF
[List of Patents for class 257 subclass E51.002]  E51.002          Subclass E51.002 indent level is 1 Structural detail of device (EPO)
[List of Patents for class 257 subclass E51.003]  E51.003          Subclass E51.003 indent level is 2 Organic solid-state device adapted for rectifying, amplifying, oscillating, or switching, or capacitors or resistors with potential or surface barrier (EPO)
[List of Patents for class 257 subclass E51.004]  E51.004          Subclass E51.004 indent level is 3 Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (EPO)
[List of Patents for class 257 subclass E51.005]  E51.005          Subclass E51.005 indent level is 4 Field-effect device (e.g., TFT, FET) (EPO)
[List of Patents for class 257 subclass E51.006]  E51.006          Subclass E51.006 indent level is 5 Insulated gate field-effect transistor (EPO)
[List of Patents for class 257 subclass E51.007]  E51.007          Subclass E51.007 indent level is 6 Comprising organic gate dielectric (EPO)
[List of Patents for class 257 subclass E51.008]  E51.008          Subclass E51.008 indent level is 3 Controllable only by variation of electric current supplied or only electric potential applied to electrode carrying current to be rectified, amplified, oscillated, or switched (e.g., two terminal device) (EPO)
[List of Patents for class 257 subclass E51.009]  E51.009          Subclass E51.009 indent level is 4 Comprising Schottky junction (EPO)
[List of Patents for class 257 subclass E51.01]  E51.01          Subclass E51.01 indent level is 4 Comprising organic/organic junction (e.g., heterojunction) (EPO)
[List of Patents for class 257 subclass E51.011]  E51.011          Subclass E51.011 indent level is 4 Comprising organic/inorganic heterojunction (EPO)
[List of Patents for class 257 subclass E51.012]  E51.012          Subclass E51.012 indent level is 2 Radiation-sensitive organic solid-state device (EPO)
[List of Patents for class 257 subclass E51.013]  E51.013          Subclass E51.013 indent level is 3 Metal-organic semiconductor-metal device (EPO)
[List of Patents for class 257 subclass E51.014]  E51.014          Subclass E51.014 indent level is 3 Comprising bulk heterojunction (EPO)
[List of Patents for class 257 subclass E51.015]  E51.015          Subclass E51.015 indent level is 3 Comprising organic/inorganic heterojunction (EPO)
[List of Patents for class 257 subclass E51.016]  E51.016          Subclass E51.016 indent level is 4 Majority carrier device using sensitization of wide band gap semiconductor (e.g., TiO 2 ) (EPO)
[List of Patents for class 257 subclass E51.017]  E51.017          Subclass E51.017 indent level is 3 Comprising organic semiconductor-organic semiconductor heterojunction (EPO)
[List of Patents for class 257 subclass E51.018]  E51.018          Subclass E51.018 indent level is 2 Light-emitting organic solid-state device with potential or surface barrier (EPO)
[List of Patents for class 257 subclass E51.019]  E51.019          Subclass E51.019 indent level is 3 Electrode (EPO)
[List of Patents for class 257 subclass E51.02]  E51.02          Subclass E51.02 indent level is 4 Encapsulation (EPO)
[List of Patents for class 257 subclass E51.021]  E51.021          Subclass E51.021 indent level is 4 Arrangements for extracting light from device (e.g., Bragg reflector pair) (EPO)
[List of Patents for class 257 subclass E51.022]  E51.022          Subclass E51.022 indent level is 3 Multicolor organic light-emitting device (OLED) (EPO)
[List of Patents for class 257 subclass E51.023]  E51.023          Subclass E51.023 indent level is 2 Molecular electronic device (EPO)
[List of Patents for class 257 subclass E51.024]  E51.024          Subclass E51.024 indent level is 1 Selection of material for organic solid-state device (EPO)
[List of Patents for class 257 subclass E51.025]  E51.025          Subclass E51.025 indent level is 2 For organic solid-state device adapted for rectifying, amplifying, oscillating, or switching, or capacitors or resistors with potential or surface barrier (EPO)
[List of Patents for class 257 subclass E51.026]  E51.026          Subclass E51.026 indent level is 2 For radiation-sensitive or light-emitting organic solid-state device with potential or surface barrier (EPO)
[List of Patents for class 257 subclass E51.027]  E51.027          Subclass E51.027 indent level is 2 Organic polymer or oligomer (EPO)
[List of Patents for class 257 subclass E51.028]  E51.028          Subclass E51.028 indent level is 3 Comprising aromatic, heteroaromatic, or arrylic chains (e.g., polyaniline, polyphenylene, polyphenylene vinylene) (EPO)
[List of Patents for class 257 subclass E51.029]  E51.029          Subclass E51.029 indent level is 4 Heteroaromatic compound comprising sulfur or selene (e.g., polythiophene) (EPO)
[List of Patents for class 257 subclass E51.03]  E51.03          Subclass E51.03 indent level is 5 Polyethylene dioxythiophene and derivative (EPO)
[List of Patents for class 257 subclass E51.031]  E51.031          Subclass E51.031 indent level is 4 Polyphenylenevinylene and derivatives (EPO)
[List of Patents for class 257 subclass E51.032]  E51.032          Subclass E51.032 indent level is 4 Polyflurorene and derivative (EPO)
[List of Patents for class 257 subclass E51.033]  E51.033          Subclass E51.033 indent level is 3 Comprising aliphatic or olefinic chains (e.g., polyN-vinylcarbazol, PVC, PTFE) (EPO)
[List of Patents for class 257 subclass E51.034]  E51.034          Subclass E51.034 indent level is 4 Polyacetylene or derivatives (EPO)
[List of Patents for class 257 subclass E51.035]  E51.035          Subclass E51.035 indent level is 4 PolyN-vinylcarbazol and derivative (EPO)
[List of Patents for class 257 subclass E51.036]  E51.036          Subclass E51.036 indent level is 3 Copolymers (EPO)
[List of Patents for class 257 subclass E51.037]  E51.037          Subclass E51.037 indent level is 3 Ladder-type polymer (EPO)
[List of Patents for class 257 subclass E51.038]  E51.038          Subclass E51.038 indent level is 2 Carbon-containing materials (EPO)
[List of Patents for class 257 subclass E51.039]  E51.039          Subclass E51.039 indent level is 3 Fullerenes (EPO)
[List of Patents for class 257 subclass E51.04]  E51.04          Subclass E51.04 indent level is 3 Carbon nanotubes (EPO)
[List of Patents for class 257 subclass E51.041]  E51.041          Subclass E51.041 indent level is 2 Coordination compound (e.g., porphyrin, phthalocyanine, metal(II) polypyridine complexes) (EPO)
[List of Patents for class 257 subclass E51.042]  E51.042          Subclass E51.042 indent level is 3 Phthalocyanine (EPO)
[List of Patents for class 257 subclass E51.043]  E51.043          Subclass E51.043 indent level is 3 Metal complexes comprising Group IIIB metal (Al, Ga, In, or Ti) (e.g., Tris (8-hydroxyquinoline) aluminium (Alq3)) (EPO)
[List of Patents for class 257 subclass E51.044]  E51.044          Subclass E51.044 indent level is 3 Transition metal complexes (e.g., Ru(II) polypyridine complexes) (EPO)
[List of Patents for class 257 subclass E51.045]  E51.045          Subclass E51.045 indent level is 2 Biomolecule or macromolecule (e.g., proteins, ATP, chlorophyl, beta-carotene, lipids, enzymes) (EPO)
[List of Patents for class 257 subclass E51.046]  E51.046          Subclass E51.046 indent level is 2 Silicon-containing organic semiconductor (EPO)
[List of Patents for class 257 subclass E51.047]  E51.047          Subclass E51.047 indent level is 2 Macromolecular system with low molecular weight (e.g., cyanine dyes, coumarine dyes, tetrathiafulvalene) (EPO)
[List of Patents for class 257 subclass E51.048]  E51.048          Subclass E51.048 indent level is 3 Charge transfer complexes (EPO)
[List of Patents for class 257 subclass E51.049]  E51.049          Subclass E51.049 indent level is 3 Polycondensed aromatic or heteroaromatic compound (e.g., pyrene, perylene, pentacene) (EPO)
[List of Patents for class 257 subclass E51.05]  E51.05          Subclass E51.05 indent level is 4 Aromatic compound containing heteroatom (e.g., perylenetetracarboxylic dianhydride, perylene tetracarboxylic diimide) (EPO)
[List of Patents for class 257 subclass E51.051]  E51.051          Subclass E51.051 indent level is 3 Amine compound having at least two aryl on amine-nitrogen atom (e.g., triphenylamine) (EPO)
[List of Patents for class 257 subclass E51.052]  E51.052          Subclass E51.052 indent level is 2 Langmuir Blodgett film (EPO)
[List of Patents for class 257 subclass E43.001]  E43.001          SEMICONDUCTOR OR SOLID-STATE DEVICES USING GALVANO-MAGNETIC OR SIMILAR MAGNETIC EFFECTS, PROCESSES OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)
[List of Patents for class 257 subclass E43.002]  E43.002          Subclass E43.002 indent level is 1 Hall-effect devices (EPO)
[List of Patents for class 257 subclass E43.003]  E43.003          Subclass E43.003 indent level is 2 Semiconductor Hall-effect devices (EPO)
[List of Patents for class 257 subclass E43.004]  E43.004          Subclass E43.004 indent level is 1 Magnetic-field-controlled resistors (EPO)
[List of Patents for class 257 subclass E43.005]  E43.005          Subclass E43.005 indent level is 1 Selection of materials (EPO)
[List of Patents for class 257 subclass E43.006]  E43.006          Subclass E43.006 indent level is 1 Processes or apparatus peculiar to manufacture or treatment of these devices or of parts thereof (EPO)
[List of Patents for class 257 subclass E43.007]  E43.007          Subclass E43.007 indent level is 2 For Hall-effect devices (EPO)
[List of Patents for class 257 subclass E33.001]  E33.001          LIGHT EMITTING SEMICONDUCTOR DEVICES HAVING A POTENTIAL OR A SURFACE BARRIER, PROCESSES OR APPARATUS PECULIAR TO THE MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF
[List of Patents for class 257 subclass E33.002]  E33.002          Subclass E33.002 indent level is 1 Device characterized by semiconductor body (EPO)
[List of Patents for class 257 subclass E33.003]  E33.003          Subclass E33.003 indent level is 2 Particular crystalline orientation or structure (EPO)
[List of Patents for class 257 subclass E33.004]  E33.004          Subclass E33.004 indent level is 3 Comprising amorphous semiconductor (EPO)
[List of Patents for class 257 subclass E33.005]  E33.005          Subclass E33.005 indent level is 2 Shape or structure (e.g., shape of epitaxial layer) (EPO)
[List of Patents for class 257 subclass E33.006]  E33.006          Subclass E33.006 indent level is 3 Shape of semiconductor body (EPO)
[List of Patents for class 257 subclass E33.007]  E33.007          Subclass E33.007 indent level is 3 Shape of potential barrier (EPO)
[List of Patents for class 257 subclass E33.008]  E33.008          Subclass E33.008 indent level is 3 Multiple quantum well structure (EPO)
[List of Patents for class 257 subclass E33.009]  E33.009          Subclass E33.009 indent level is 4 Including, apart from doping materials or other only impurities, Group IV element (e.g., Si-SiGe superlattice) (EPO)
[List of Patents for class 257 subclass E33.01]  E33.01          Subclass E33.01 indent level is 4 Doped superlattice (e.g., nipi superlattice) (EPO)
[List of Patents for class 257 subclass E33.011]  E33.011          Subclass E33.011 indent level is 3 For current confinement (EPO)
[List of Patents for class 257 subclass E33.012]  E33.012          Subclass E33.012 indent level is 3 Multiple active regions between two electrodes (e.g., stacks) (EPO)
[List of Patents for class 257 subclass E33.013]  E33.013          Subclass E33.013 indent level is 2 Material of active region (EPO)
[List of Patents for class 257 subclass E33.014]  E33.014          Subclass E33.014 indent level is 3 In different regions (EPO)
[List of Patents for class 257 subclass E33.015]  E33.015          Subclass E33.015 indent level is 3 Comprising only Group IV element (EPO)
[List of Patents for class 257 subclass E33.016]  E33.016          Subclass E33.016 indent level is 4 With heterojunction (EPO)
[List of Patents for class 257 subclass E33.017]  E33.017          Subclass E33.017 indent level is 4 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E33.018]  E33.018          Subclass E33.018 indent level is 4 Including porous Si (EPO)
[List of Patents for class 257 subclass E33.019]  E33.019          Subclass E33.019 indent level is 3 Comprising only Group II-VI compound (EPO)
[List of Patents for class 257 subclass E33.02]  E33.02          Subclass E33.02 indent level is 4 Ternary or quaternary compound (e.g., CdHgTe) (EPO)
[List of Patents for class 257 subclass E33.021]  E33.021          Subclass E33.021 indent level is 5 With heterojunction (EPO)
[List of Patents for class 257 subclass E33.022]  E33.022          Subclass E33.022 indent level is 4 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E33.023]  E33.023          Subclass E33.023 indent level is 3 Comprising only Group III-V compound (EPO)
[List of Patents for class 257 subclass E33.024]  E33.024          Subclass E33.024 indent level is 4 Binary compound (e.g., GaAs) (EPO)
[List of Patents for class 257 subclass E33.025]  E33.025          Subclass E33.025 indent level is 5 Including nitride (e.g., GaN) (EPO)
[List of Patents for class 257 subclass E33.026]  E33.026          Subclass E33.026 indent level is 4 Ternary or quaternary compound (e.g., AlGaAs) (EPO)
[List of Patents for class 257 subclass E33.027]  E33.027          Subclass E33.027 indent level is 5 With heterojunction (EPO)
[List of Patents for class 257 subclass E33.028]  E33.028          Subclass E33.028 indent level is 5 Including nitride (e.g., AlGaN) (EPO)
[List of Patents for class 257 subclass E33.029]  E33.029          Subclass E33.029 indent level is 4 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E33.03]  E33.03          Subclass E33.03 indent level is 5 Nitride compound (EPO)
[List of Patents for class 257 subclass E33.031]  E33.031          Subclass E33.031 indent level is 4 Including ternary or quaternary compound (e.g., AlGaAs) (EPO)
[List of Patents for class 257 subclass E33.032]  E33.032          Subclass E33.032 indent level is 5 With heterojunction (e.g., AlGaAs/GaAs) (EPO)
[List of Patents for class 257 subclass E33.033]  E33.033          Subclass E33.033 indent level is 5 Comprising nitride compound (e.g., AlGaN) (EPO)
[List of Patents for class 257 subclass E33.034]  E33.034          Subclass E33.034 indent level is 6 With heterojunction (e.g., AlGaN/GaN) (EPO)
[List of Patents for class 257 subclass E33.035]  E33.035          Subclass E33.035 indent level is 3 Comprising only Group IV compound (e.g., SiC) (EPO)
[List of Patents for class 257 subclass E33.036]  E33.036          Subclass E33.036 indent level is 4 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E33.037]  E33.037          Subclass E33.037 indent level is 3 Comprising compound other than Group II-VI, III-V, and IV compound (EPO)
[List of Patents for class 257 subclass E33.038]  E33.038          Subclass E33.038 indent level is 4 Comprising only Group IV-VI compound (EPO)
[List of Patents for class 257 subclass E33.039]  E33.039          Subclass E33.039 indent level is 4 Comprising only Group II-IV-VI compound (EPO)
[List of Patents for class 257 subclass E33.04]  E33.04          Subclass E33.04 indent level is 4 Comprising only Group I-III-VI compound (EPO)
[List of Patents for class 257 subclass E33.041]  E33.041          Subclass E33.041 indent level is 4 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E33.042]  E33.042          Subclass E33.042 indent level is 4 Comprising only Group IV-VI or II-IV-VI compound (EPO)
[List of Patents for class 257 subclass E33.043]  E33.043          Subclass E33.043 indent level is 2 Physical imperfections (e.g., particular concentration or distribution of impurity) (EPO)
[List of Patents for class 257 subclass E33.044]  E33.044          Subclass E33.044 indent level is 1 Device characterized by their operation (EPO)
[List of Patents for class 257 subclass E33.045]  E33.045          Subclass E33.045 indent level is 2 Having p-n or hi-lo junction (EPO)
[List of Patents for class 257 subclass E33.046]  E33.046          Subclass E33.046 indent level is 3 P-I-N device (EPO)
[List of Patents for class 257 subclass E33.047]  E33.047          Subclass E33.047 indent level is 3 Having at least two p-n junctions (EPO)
[List of Patents for class 257 subclass E33.048]  E33.048          Subclass E33.048 indent level is 2 Having heterojunction or graded gap (EPO)
[List of Patents for class 257 subclass E33.049]  E33.049          Subclass E33.049 indent level is 3 Comprising only Group III-V compound (EPO)
[List of Patents for class 257 subclass E33.05]  E33.05          Subclass E33.05 indent level is 3 Comprising only Group II-IV compound (EPO)
[List of Patents for class 257 subclass E33.051]  E33.051          Subclass E33.051 indent level is 2 Having Schottky barrier (EPO)
[List of Patents for class 257 subclass E33.052]  E33.052          Subclass E33.052 indent level is 2 Having MIS barrier layer (EPO)
[List of Patents for class 257 subclass E33.053]  E33.053          Subclass E33.053 indent level is 2 Characterized by field-effect operation (EPO)
[List of Patents for class 257 subclass E33.054]  E33.054          Subclass E33.054 indent level is 2 Device being superluminescent diode (EPO)
[List of Patents for class 257 subclass E33.055]  E33.055          Subclass E33.055 indent level is 1 Detail of nonsemiconductor component other than light-emitting semiconductor device (EPO)
[List of Patents for class 257 subclass E33.056]  E33.056          Subclass E33.056 indent level is 2 Packaging (EPO)
[List of Patents for class 257 subclass E33.057]  E33.057          Subclass E33.057 indent level is 3 Adapted for surface mounting (EPO)
[List of Patents for class 257 subclass E33.058]  E33.058          Subclass E33.058 indent level is 3 Housing (EPO)
[List of Patents for class 257 subclass E33.059]  E33.059          Subclass E33.059 indent level is 3 Encapsulation (EPO)
[List of Patents for class 257 subclass E33.06]  E33.06          Subclass E33.06 indent level is 2 Coatings (EPO)
[List of Patents for class 257 subclass E33.061]  E33.061          Subclass E33.061 indent level is 3 Comprising luminescent material (e.g., fluorescent) (EPO)
[List of Patents for class 257 subclass E33.062]  E33.062          Subclass E33.062 indent level is 2 Electrodes (EPO)
[List of Patents for class 257 subclass E33.063]  E33.063          Subclass E33.063 indent level is 3 Characterized by material (EPO)
[List of Patents for class 257 subclass E33.064]  E33.064          Subclass E33.064 indent level is 4 Comprising transparent conductive layers (e.g., transparent conductive oxides (TCO), indium tin oxide (ITO)) (EPO)
[List of Patents for class 257 subclass E33.065]  E33.065          Subclass E33.065 indent level is 3 Characterized by shape (EPO)
[List of Patents for class 257 subclass E33.066]  E33.066          Subclass E33.066 indent level is 2 Electrical contact or lead (e.g., lead frame) (EPO)
[List of Patents for class 257 subclass E33.067]  E33.067          Subclass E33.067 indent level is 2 Means for light extraction or guiding (EPO)
[List of Patents for class 257 subclass E33.068]  E33.068          Subclass E33.068 indent level is 3 Integrated with device (e.g., back surface reflector, lens) (EPO)
[List of Patents for class 257 subclass E33.069]  E33.069          Subclass E33.069 indent level is 4 Comprising resonant cavity structure (e.g., Bragg reflector pair) (EPO)
[List of Patents for class 257 subclass E33.07]  E33.07          Subclass E33.07 indent level is 4 Comprising window layer (EPO)
[List of Patents for class 257 subclass E33.071]  E33.071          Subclass E33.071 indent level is 3 Not integrated with device (EPO)
[List of Patents for class 257 subclass E33.072]  E33.072          Subclass E33.072 indent level is 4 Reflective means (EPO)
[List of Patents for class 257 subclass E33.073]  E33.073          Subclass E33.073 indent level is 4 Refractive means (e.g., lens) (EPO)
[List of Patents for class 257 subclass E33.074]  E33.074          Subclass E33.074 indent level is 3 Scattering means (e.g., surface roughening) (EPO)
[List of Patents for class 257 subclass E33.075]  E33.075          Subclass E33.075 indent level is 2 With means for cooling or heating (EPO)
[List of Patents for class 257 subclass E33.076]  E33.076          Subclass E33.076 indent level is 2 With means for light detecting (e.g., photodetector) (EPO)
[List of Patents for class 257 subclass E33.077]  E33.077          Subclass E33.077 indent level is 2 Monolithic integration with photosensitive device (EPO)
[List of Patents for class 257 subclass E31.001]  E31.001          SEMICONDUCTOR DEVICES RESPONSIVE OR SENSITIVE TO ELECTROMAGNETIC RADIATION (E.G., INFRARED RADIATION, ADAPTED FOR CONVERSION OF RADIATION INTO ELECTRICAL ENERGY OR FOR CONTROL OF ELECTRICAL ENERGY BY SUCH RADIATION PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF) (EPO)
[List of Patents for class 257 subclass E31.002]  E31.002          Subclass E31.002 indent level is 1 Characterized by semiconductor body (EPO)
[List of Patents for class 257 subclass E31.003]  E31.003          Subclass E31.003 indent level is 2 Characterized by semiconductor body material (EPO)
[List of Patents for class 257 subclass E31.004]  E31.004          Subclass E31.004 indent level is 3 Inorganic materials (EPO)
[List of Patents for class 257 subclass E31.005]  E31.005          Subclass E31.005 indent level is 4 In different semiconductor regions (e.g., Cu 2 X/CdX heterojunction and X being Group VI element) (EPO)
[List of Patents for class 257 subclass E31.006]  E31.006          Subclass E31.006 indent level is 5 Comprising only Cu 2 X/CdX heterojunction and X being Group VI element (EPO)
[List of Patents for class 257 subclass E31.007]  E31.007          Subclass E31.007 indent level is 5 Comprising only heterojunction including Group I-III-VI compound (e.g., CdS/CuInSe 2 heterojunction) (EPO)
[List of Patents for class 257 subclass E31.008]  E31.008          Subclass E31.008 indent level is 4 Selenium or tellurium (EPO)
[List of Patents for class 257 subclass E31.009]  E31.009          Subclass E31.009 indent level is 5 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.01]  E31.01          Subclass E31.01 indent level is 5 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.011]  E31.011          Subclass E31.011 indent level is 4 Including, apart from doping material or other impurity, only Group IV element (EPO)
[List of Patents for class 257 subclass E31.012]  E31.012          Subclass E31.012 indent level is 5 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.013]  E31.013          Subclass E31.013 indent level is 5 Comprising porous silicon as part of active layer (EPO)
[List of Patents for class 257 subclass E31.014]  E31.014          Subclass E31.014 indent level is 5 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.015]  E31.015          Subclass E31.015 indent level is 4 Including, apart from doping material or other impurity, only Group II-VI compound (e.g., CdS, ZnS, HgCdTe) (EPO)
[List of Patents for class 257 subclass E31.016]  E31.016          Subclass E31.016 indent level is 5 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.017]  E31.017          Subclass E31.017 indent level is 6 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.018]  E31.018          Subclass E31.018 indent level is 5 Including ternary compound (e.g., HgCdTe) (EPO)
[List of Patents for class 257 subclass E31.019]  E31.019          Subclass E31.019 indent level is 4 Including, apart from doping material or other impurity, only Group III-V compound (EPO)
[List of Patents for class 257 subclass E31.02]  E31.02          Subclass E31.02 indent level is 5 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.021]  E31.021          Subclass E31.021 indent level is 6 Characterized by doping material GaAlAs, InGaAs, InGaAsP (EPO)
[List of Patents for class 257 subclass E31.022]  E31.022          Subclass E31.022 indent level is 5 Including ternary or quaternary compound (EPO)
[List of Patents for class 257 subclass E31.023]  E31.023          Subclass E31.023 indent level is 4 Including, apart from doping material or other impurity, only Group IV compound (e.g., SiC) (EPO)
[List of Patents for class 257 subclass E31.024]  E31.024          Subclass E31.024 indent level is 5 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.025]  E31.025          Subclass E31.025 indent level is 5 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.026]  E31.026          Subclass E31.026 indent level is 4 Including, apart from doping material or other impurity, only compound other than Group II-VI, III-V, and IV compound (EPO)
[List of Patents for class 257 subclass E31.027]  E31.027          Subclass E31.027 indent level is 5 Comprising only Group I-III-VI chalcopyrite compound (e.g., CuInSe 2 , CuGaSe 2 , CuInGaSe 2 ) (EPO)
[List of Patents for class 257 subclass E31.028]  E31.028          Subclass E31.028 indent level is 6 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.029]  E31.029          Subclass E31.029 indent level is 5 Comprising only Group IV-VI or II-IV-VI chalcogenide compound (e.g., PbSnTe) (EPO)
[List of Patents for class 257 subclass E31.03]  E31.03          Subclass E31.03 indent level is 6 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.031]  E31.031          Subclass E31.031 indent level is 5 Characterized by doping material (EPO)
[List of Patents for class 257 subclass E31.032]  E31.032          Subclass E31.032 indent level is 2 Characterized by semiconductor body shape, relative size, or disposition of semiconductor regions (EPO)
[List of Patents for class 257 subclass E31.033]  E31.033          Subclass E31.033 indent level is 3 Multiple quantum well structure (EPO)
[List of Patents for class 257 subclass E31.034]  E31.034          Subclass E31.034 indent level is 4 Characterized by amorphous semiconductor layer (EPO)
[List of Patents for class 257 subclass E31.035]  E31.035          Subclass E31.035 indent level is 4 Including, apart from doping material or other impurity, only Group IV element or compound (e.g., Si-SiGe superlattice) (EPO)
[List of Patents for class 257 subclass E31.036]  E31.036          Subclass E31.036 indent level is 4 Doping superlattice (e.g., nipi superlattice) (EPO)
[List of Patents for class 257 subclass E31.037]  E31.037          Subclass E31.037 indent level is 3 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.038]  E31.038          Subclass E31.038 indent level is 4 Shape of body (EPO)
[List of Patents for class 257 subclass E31.039]  E31.039          Subclass E31.039 indent level is 4 Shape of potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.04]  E31.04          Subclass E31.04 indent level is 2 Characterized by semiconductor body crystalline structure or plane (EPO)
[List of Patents for class 257 subclass E31.041]  E31.041          Subclass E31.041 indent level is 3 Including thin film deposited on metallic or insulating substrate (EPO)
[List of Patents for class 257 subclass E31.042]  E31.042          Subclass E31.042 indent level is 4 Including only Group IV element (EPO)
[List of Patents for class 257 subclass E31.043]  E31.043          Subclass E31.043 indent level is 3 Including polycrystalline semiconductor (EPO)
[List of Patents for class 257 subclass E31.044]  E31.044          Subclass E31.044 indent level is 4 Including only Group IV element (EPO)
[List of Patents for class 257 subclass E31.045]  E31.045          Subclass E31.045 indent level is 5 Including microcrystalline silicon ( c-Si) (EPO)
[List of Patents for class 257 subclass E31.046]  E31.046          Subclass E31.046 indent level is 5 Including microcrystalline Group IV compound (e.g., c-SiGe, c-SiC) (EPO)
[List of Patents for class 257 subclass E31.047]  E31.047          Subclass E31.047 indent level is 3 Including amorphous semiconductor (EPO)
[List of Patents for class 257 subclass E31.048]  E31.048          Subclass E31.048 indent level is 4 Including only Group IV element (EPO)
[List of Patents for class 257 subclass E31.049]  E31.049          Subclass E31.049 indent level is 5 Including Group IV compound (e.g., SiGe, SiC) (EPO)
[List of Patents for class 257 subclass E31.05]  E31.05          Subclass E31.05 indent level is 5 Having light-induced characteristic variation (e.g., Staebler-Wronski effect) (EPO)
[List of Patents for class 257 subclass E31.051]  E31.051          Subclass E31.051 indent level is 3 Including other nonmonocrystalline material (e.g., semiconductor particles embedded in insulating material) (EPO)
[List of Patents for class 257 subclass E31.052]  E31.052          Subclass E31.052 indent level is 1 Adapted to control current flow through device (e.g., photoresistor) (EPO)
[List of Patents for class 257 subclass E31.053]  E31.053          Subclass E31.053 indent level is 2 For device having potential or surface barrier (e.g., phototransistor) (EPO)
[List of Patents for class 257 subclass E31.054]  E31.054          Subclass E31.054 indent level is 3 Device sensitive to infrared, visible, or ultraviolet radiation (EPO)
[List of Patents for class 257 subclass E31.055]  E31.055          Subclass E31.055 indent level is 4 Characterized by only one potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.056]  E31.056          Subclass E31.056 indent level is 5 Potential barrier being of point contact type (EPO)
[List of Patents for class 257 subclass E31.057]  E31.057          Subclass E31.057 indent level is 5 PN homojunction potential barrier (EPO)
[List of Patents for class 257 subclass E31.058]  E31.058          Subclass E31.058 indent level is 6 Device comprising active layer formed only by Group II-VI compound (e.g., HgCdTe IR photodiode) (EPO)
[List of Patents for class 257 subclass E31.059]  E31.059          Subclass E31.059 indent level is 6 Device comprising active layer formed only by Group III-V compound (EPO)
[List of Patents for class 257 subclass E31.06]  E31.06          Subclass E31.06 indent level is 6 Device comprising active layer formed only by Group IV compound (EPO)
[List of Patents for class 257 subclass E31.061]  E31.061          Subclass E31.061 indent level is 5 PIN potential barrier (EPO)
[List of Patents for class 257 subclass E31.062]  E31.062          Subclass E31.062 indent level is 6 Device comprising Group IV amorphous material (EPO)
[List of Patents for class 257 subclass E31.063]  E31.063          Subclass E31.063 indent level is 5 Potential barrier working in avalanche mode (e.g., avalanche photodiode) (EPO)
[List of Patents for class 257 subclass E31.064]  E31.064          Subclass E31.064 indent level is 6 Heterostructure (e.g., surface absorption or multiplication (SAM) layer) (EPO)
[List of Patents for class 257 subclass E31.065]  E31.065          Subclass E31.065 indent level is 5 Schottky potential barrier (EPO)
[List of Patents for class 257 subclass E31.066]  E31.066          Subclass E31.066 indent level is 6 Metal-semiconductor-metal (MSM) Schottky barrier (EPO)
[List of Patents for class 257 subclass E31.067]  E31.067          Subclass E31.067 indent level is 5 PN heterojunction potential barrier (EPO)
[List of Patents for class 257 subclass E31.068]  E31.068          Subclass E31.068 indent level is 4 Characterized by two potential or surface barriers (EPO)
[List of Patents for class 257 subclass E31.069]  E31.069          Subclass E31.069 indent level is 5 Bipolar phototransistor (EPO)
[List of Patents for class 257 subclass E31.07]  E31.07          Subclass E31.07 indent level is 4 Characterized by at least three potential barriers (EPO)
[List of Patents for class 257 subclass E31.071]  E31.071          Subclass E31.071 indent level is 5 Photothyristor (EPO)
[List of Patents for class 257 subclass E31.072]  E31.072          Subclass E31.072 indent level is 6 Static induction type (i.e., SIT device) (EPO)
[List of Patents for class 257 subclass E31.073]  E31.073          Subclass E31.073 indent level is 4 Field-effect type (e.g., junction field-effect phototransistor) (EPO)
[List of Patents for class 257 subclass E31.074]  E31.074          Subclass E31.074 indent level is 5 With Schottky gate (EPO)
[List of Patents for class 257 subclass E31.075]  E31.075          Subclass E31.075 indent level is 6 Charge-coupled device (CCD) (EPO)
[List of Patents for class 257 subclass E31.076]  E31.076          Subclass E31.076 indent level is 6 Photo MESFET (EPO)
[List of Patents for class 257 subclass E31.077]  E31.077          Subclass E31.077 indent level is 5 With PN homojunction gate (EPO)
[List of Patents for class 257 subclass E31.078]  E31.078          Subclass E31.078 indent level is 6 Charge-coupled device (CCD) (EPO)
[List of Patents for class 257 subclass E31.079]  E31.079          Subclass E31.079 indent level is 6 Field-effect phototransistor (EPO)
[List of Patents for class 257 subclass E31.08]  E31.08          Subclass E31.08 indent level is 5 With PN heterojunction gate (EPO)
[List of Patents for class 257 subclass E31.081]  E31.081          Subclass E31.081 indent level is 6 Charge-coupled device (CCD) (EPO)
[List of Patents for class 257 subclass E31.082]  E31.082          Subclass E31.082 indent level is 6 Field-effect phototransistor (EPO)
[List of Patents for class 257 subclass E31.083]  E31.083          Subclass E31.083 indent level is 5 Conductor-insulator-semiconductor type (EPO)
[List of Patents for class 257 subclass E31.084]  E31.084          Subclass E31.084 indent level is 6 Diode or charge-coupled device (CCD) (EPO)
[List of Patents for class 257 subclass E31.085]  E31.085          Subclass E31.085 indent level is 6 Metal-insulator-semiconductor field-effect transistor (EPO)
[List of Patents for class 257 subclass E31.086]  E31.086          Subclass E31.086 indent level is 3 Device sensitive to very short wavelength (e.g., X-ray, gamma-ray, or corpuscular radiation) (EPO)
[List of Patents for class 257 subclass E31.087]  E31.087          Subclass E31.087 indent level is 4 Bulk-effect radiation detector (e.g., Ge-Li compensated PIN gamma-ray detector) (EPO)
[List of Patents for class 257 subclass E31.088]  E31.088          Subclass E31.088 indent level is 5 Li-compensated PIN gamma-ray detector (EPO)
[List of Patents for class 257 subclass E31.089]  E31.089          Subclass E31.089 indent level is 4 With surface barrier or shallow PN junction (e.g., surface barrier alpha-particle detector) (EPO)
[List of Patents for class 257 subclass E31.09]  E31.09          Subclass E31.09 indent level is 5 With shallow PN junction (EPO)
[List of Patents for class 257 subclass E31.091]  E31.091          Subclass E31.091 indent level is 4 Field-effect type (e.g., MIS-type detector) (EPO)
[List of Patents for class 257 subclass E31.092]  E31.092          Subclass E31.092 indent level is 2 Device being sensitive to very short wavelength (e.g., X-ray, gamma-ray) (EPO)
[List of Patents for class 257 subclass E31.093]  E31.093          Subclass E31.093 indent level is 2 Device sensitive to infrared, visible, or ultraviolet radiation (EPO)
[List of Patents for class 257 subclass E31.094]  E31.094          Subclass E31.094 indent level is 3 Comprising amorphous semiconductor (EPO)
[List of Patents for class 257 subclass E31.095]  E31.095          Subclass E31.095 indent level is 1 Structurally associated with electric light source (e.g., electroluminescent light source) (EPO)
[List of Patents for class 257 subclass E31.096]  E31.096          Subclass E31.096 indent level is 2 Hybrid device containing photosensitive and electroluminescent components within one single body (EPO)
[List of Patents for class 257 subclass E31.097]  E31.097          Subclass E31.097 indent level is 2 Light source controlled by radiation-sensitive semiconductor device (e.g., image converter, image amplifier, image storage device) (EPO)
[List of Patents for class 257 subclass E31.098]  E31.098          Subclass E31.098 indent level is 3 Device without potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.099]  E31.099          Subclass E31.099 indent level is 4 Light source being semiconductor device with potential or surface barrier (e.g., light-emitting diode) (EPO)
[List of Patents for class 257 subclass E31.1]  E31.1          Subclass E31.1 indent level is 3 Device with potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.101]  E31.101          Subclass E31.101 indent level is 3 Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.102]  E31.102          Subclass E31.102 indent level is 4 Formed in or on common substrate (EPO)
[List of Patents for class 257 subclass E31.103]  E31.103          Subclass E31.103 indent level is 2 Radiation-sensitive semiconductor device controlled by light source (EPO)
[List of Patents for class 257 subclass E31.104]  E31.104          Subclass E31.104 indent level is 3 Radiation-sensitive semiconductor device without potential or surface barrier (e.g., photoresistor) (EPO)
[List of Patents for class 257 subclass E31.105]  E31.105          Subclass E31.105 indent level is 4 Light source being semiconductor device having potential or surface barrier (e.g., light-emitting diode) (EPO)
[List of Patents for class 257 subclass E31.106]  E31.106          Subclass E31.106 indent level is 4 Optical potentiometer (EPO)
[List of Patents for class 257 subclass E31.107]  E31.107          Subclass E31.107 indent level is 3 Radiation-sensitive semiconductor device with potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.108]  E31.108          Subclass E31.108 indent level is 3 Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.109]  E31.109          Subclass E31.109 indent level is 4 Formed in or on common substrate (EPO)
[List of Patents for class 257 subclass E31.11]  E31.11          Subclass E31.11 indent level is 1 Detail of nonsemiconductor component of radiation-sensitive semiconductor device (EPO)
[List of Patents for class 257 subclass E31.111]  E31.111          Subclass E31.111 indent level is 2 Input/output circuit of device (EPO)
[List of Patents for class 257 subclass E31.112]  E31.112          Subclass E31.112 indent level is 3 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.113]  E31.113          Subclass E31.113 indent level is 2 Circuit arrangement of general character for device (EPO)
[List of Patents for class 257 subclass E31.114]  E31.114          Subclass E31.114 indent level is 3 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.115]  E31.115          Subclass E31.115 indent level is 4 Position-sensitive and lateral-effect photodetector (e.g., quadrant photodiode) (EPO)
[List of Patents for class 257 subclass E31.116]  E31.116          Subclass E31.116 indent level is 4 Device working in avalanche mode (EPO)
[List of Patents for class 257 subclass E31.117]  E31.117          Subclass E31.117 indent level is 2 Encapsulation (EPO)
[List of Patents for class 257 subclass E31.118]  E31.118          Subclass E31.118 indent level is 3 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.119]  E31.119          Subclass E31.119 indent level is 2 Coatings (EPO)
[List of Patents for class 257 subclass E31.12]  E31.12          Subclass E31.12 indent level is 3 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.121]  E31.121          Subclass E31.121 indent level is 4 For filtering or shielding light (e.g., multicolor filter for photodetector) (EPO)
[List of Patents for class 257 subclass E31.122]  E31.122          Subclass E31.122 indent level is 5 For shielding light (e.g., light-blocking layer, cold shield for infrared detector) (EPO)
[List of Patents for class 257 subclass E31.123]  E31.123          Subclass E31.123 indent level is 5 For interference filter (e.g., multilayer dielectric filter) (EPO)
[List of Patents for class 257 subclass E31.124]  E31.124          Subclass E31.124 indent level is 2 Electrode (EPO)
[List of Patents for class 257 subclass E31.125]  E31.125          Subclass E31.125 indent level is 3 For device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.126]  E31.126          Subclass E31.126 indent level is 3 Transparent conductive layer (e.g., transparent conductive oxide (TCO), indium tin oxide (ITO) layer) (EPO)
[List of Patents for class 257 subclass E31.127]  E31.127          Subclass E31.127 indent level is 2 Optical element associated with device (EPO)
[List of Patents for class 257 subclass E31.128]  E31.128          Subclass E31.128 indent level is 3 Device having potential or surface barrier (EPO)
[List of Patents for class 257 subclass E31.129]  E31.129          Subclass E31.129 indent level is 3 Comprising luminescent member (e.g., fluorescent sheet) (EPO)
[List of Patents for class 257 subclass E31.13]  E31.13          Subclass E31.13 indent level is 2 Texturized surface (EPO)
[List of Patents for class 257 subclass E31.131]  E31.131          Subclass E31.131 indent level is 2 Arrangement for temperature regulation (e.g., cooling, heating, or ventilating) (EPO)
[List of Patents for class 257 subclass E27.001]  E27.001          DEVICE CONSISTING OF A PLURALITY OF SEMICONDUCTOR OR OTHER SOLID STATE COMPONENTS FORMED IN OR ON A COMMON SUBSTRATE, E.G., INTEGRATED CIRCUIT DEVICE (EPO)
[List of Patents for class 257 subclass E27.002]  E27.002          Subclass E27.002 indent level is 1 Including bulk negative resistance effect component (EPO)
[List of Patents for class 257 subclass E27.003]  E27.003          Subclass E27.003 indent level is 2 Including Gunn-effect device (EPO)
[List of Patents for class 257 subclass E27.004]  E27.004          Subclass E27.004 indent level is 1 Including solid state component for rectifying, amplifying, or switching without a potential barrier or surface barrier (EPO)
[List of Patents for class 257 subclass E27.005]  E27.005          Subclass E27.005 indent level is 1 Including component using galvano-magnetic effects, e.g. Hall effect (EPO)
[List of Patents for class 257 subclass E27.006]  E27.006          Subclass E27.006 indent level is 1 Including piezo-electric, electro-resistive, or magneto-resistive component (EPO)
[List of Patents for class 257 subclass E27.007]  E27.007          Subclass E27.007 indent level is 1 Including superconducting component (EPO)
[List of Patents for class 257 subclass E27.008]  E27.008          Subclass E27.008 indent level is 1 Including thermo-electric or thermo-magnetic component with or without a junction of dissimilar material or thermo-magnetic component (EPO)
[List of Patents for class 257 subclass E27.009]  E27.009          Subclass E27.009 indent level is 1 Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or Including integrated passive circuit elements (EPO)
[List of Patents for class 257 subclass E27.01]  E27.01          Subclass E27.01 indent level is 2 With semiconductor substrate only (EPO)
[List of Patents for class 257 subclass E27.011]  E27.011          Subclass E27.011 indent level is 3 Including a plurality of components in a non-repetitive configuration (EPO)
[List of Patents for class 257 subclass E27.012]  E27.012          Subclass E27.012 indent level is 4 Made of compound semiconductor material, e.g. III-V material (EPO)
[List of Patents for class 257 subclass E27.013]  E27.013          Subclass E27.013 indent level is 4 Integrated circuit having a two-dimensional layout of components without a common active region (EPO)
[List of Patents for class 257 subclass E27.014]  E27.014          Subclass E27.014 indent level is 5 Including a field-effect type component (EPO)
[List of Patents for class 257 subclass E27.015]  E27.015          Subclass E27.015 indent level is 6 In combination with bipolar transistor (EPO)
[List of Patents for class 257 subclass E27.016]  E27.016          Subclass E27.016 indent level is 6 In combination with diode, resistor, or capacitor (EPO)
[List of Patents for class 257 subclass E27.017]  E27.017          Subclass E27.017 indent level is 6 In combination with bipolar transistor and diode, resistor, or capacitor (EPO)
[List of Patents for class 257 subclass E27.018]  E27.018          Subclass E27.018 indent level is 5 With component other than field-effect type (EPO)
[List of Patents for class 257 subclass E27.019]  E27.019          Subclass E27.019 indent level is 6 Bipolar transistor in combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.02]  E27.02          Subclass E27.02 indent level is 7 Vertical bipolar transistor in combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.021]  E27.021          Subclass E27.021 indent level is 8 Vertical bipolar transistor in combination with resistor or capacitor only (EPO)
[List of Patents for class 257 subclass E27.022]  E27.022          Subclass E27.022 indent level is 8 Vertical bipolar transistor in combination with diode only (EPO)
[List of Patents for class 257 subclass E27.023]  E27.023          Subclass E27.023 indent level is 7 Lateral bipolar transistor in combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.024]  E27.024          Subclass E27.024 indent level is 6 Including combination of diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.025]  E27.025          Subclass E27.025 indent level is 7 Including combination of capacitor or resistor only (EPO)
[List of Patents for class 257 subclass E27.026]  E27.026          Subclass E27.026 indent level is 4 Integrated circuit having a three-dimensional layout (EPO)
[List of Patents for class 257 subclass E27.027]  E27.027          Subclass E27.027 indent level is 5 Including components formed on opposite sides of a semiconductor substrate (EPO)
[List of Patents for class 257 subclass E27.028]  E27.028          Subclass E27.028 indent level is 4 Including component having an active region in common (EPO)
[List of Patents for class 257 subclass E27.029]  E27.029          Subclass E27.029 indent level is 5 Including component of the field-effect type (EPO)
[List of Patents for class 257 subclass E27.03]  E27.03          Subclass E27.03 indent level is 6 In combination with bipolar transistor and diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.031]  E27.031          Subclass E27.031 indent level is 7 In combination with vertical bipolar transistor and diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.032]  E27.032          Subclass E27.032 indent level is 7 In combination with lateral bipolar transistor and diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.033]  E27.033          Subclass E27.033 indent level is 6 In combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.034]  E27.034          Subclass E27.034 indent level is 7 In combination with capacitor only (EPO)
[List of Patents for class 257 subclass E27.035]  E27.035          Subclass E27.035 indent level is 7 In combination with resistor only (EPO)
[List of Patents for class 257 subclass E27.036]  E27.036          Subclass E27.036 indent level is 5 With component other than field-effect type (EPO)
[List of Patents for class 257 subclass E27.037]  E27.037          Subclass E27.037 indent level is 6 Bipolar transistor in combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.038]  E27.038          Subclass E27.038 indent level is 7 Vertical bipolar transistor in combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.039]  E27.039          Subclass E27.039 indent level is 8 Vertical bipolar transistor in combination with diode only (EPO)
[List of Patents for class 257 subclass E27.04]  E27.04          Subclass E27.04 indent level is 9 With Schottky diode only (EPO)
[List of Patents for class 257 subclass E27.041]  E27.041          Subclass E27.041 indent level is 8 Vertical bipolar transistor in combination with resistor only (EPO)
[List of Patents for class 257 subclass E27.042]  E27.042          Subclass E27.042 indent level is 8 Vertical bipolar transistor in combination with capacitor only (EPO)
[List of Patents for class 257 subclass E27.043]  E27.043          Subclass E27.043 indent level is 7 Lateral bipolar transistor in combination with diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.044]  E27.044          Subclass E27.044 indent level is 6 Including combination of diode, capacitor, or resistor (EPO)
[List of Patents for class 257 subclass E27.045]  E27.045          Subclass E27.045 indent level is 7 Combination of capacitor and resistor (EPO)
[List of Patents for class 257 subclass E27.046]  E27.046          Subclass E27.046 indent level is 3 Including only semiconductor components of a single kind, e.g., all bipolar transistors, all diodes, or all CMOS (EPO)
[List of Patents for class 257 subclass E27.047]  E27.047          Subclass E27.047 indent level is 4 Resistor only (EPO)
[List of Patents for class 257 subclass E27.048]  E27.048          Subclass E27.048 indent level is 4 Capacitor only (EPO)
[List of Patents for class 257 subclass E27.049]  E27.049          Subclass E27.049 indent level is 5 Varactor diode (EPO)
[List of Patents for class 257 subclass E27.05]  E27.05          Subclass E27.05 indent level is 5 Metal-insulated-semiconductor (MIS) diode (EPO)
[List of Patents for class 257 subclass E27.051]  E27.051          Subclass E27.051 indent level is 4 Diode only (EPO)
[List of Patents for class 257 subclass E27.052]  E27.052          Subclass E27.052 indent level is 4 Thyristor only (EPO)
[List of Patents for class 257 subclass E27.053]  E27.053          Subclass E27.053 indent level is 4 Bipolar component only (EPO)
[List of Patents for class 257 subclass E27.054]  E27.054          Subclass E27.054 indent level is 5 Combination of lateral and vertical transistors only (EPO)
[List of Patents for class 257 subclass E27.055]  E27.055          Subclass E27.055 indent level is 5 Vertical bipolar transistor only (EPO)
[List of Patents for class 257 subclass E27.056]  E27.056          Subclass E27.056 indent level is 6 Vertical direct transistor of the same conductivity type having different characteristics, (e.g. Darlington transistor) (EPO)
[List of Patents for class 257 subclass E27.057]  E27.057          Subclass E27.057 indent level is 6 Vertical complementary transistor (EPO)
[List of Patents for class 257 subclass E27.058]  E27.058          Subclass E27.058 indent level is 6 Combination of direct and inverse vertical transistors (e.g., collector acts as emitter) (EPO)
[List of Patents for class 257 subclass E27.059]  E27.059          Subclass E27.059 indent level is 4 Including field-effect component only (EPO)
[List of Patents for class 257 subclass E27.06]  E27.06          Subclass E27.06 indent level is 5 Field-effect transistor with insulated gate (EPO)
[List of Patents for class 257 subclass E27.061]  E27.061          Subclass E27.061 indent level is 6 Combination of depletion and enhancement field-effect transistors (EPO)
[List of Patents for class 257 subclass E27.062]  E27.062          Subclass E27.062 indent level is 6 Complementary MIS (EPO)
[List of Patents for class 257 subclass E27.063]  E27.063          Subclass E27.063 indent level is 7 Means for preventing a parasitic bipolar action between the different transistor regions, e.g. latch-up prevention (EPO)
[List of Patents for class 257 subclass E27.064]  E27.064          Subclass E27.064 indent level is 7 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS (EPO)
[List of Patents for class 257 subclass E27.065]  E27.065          Subclass E27.065 indent level is 7 Including an N-well only in the substrate (EPO)
[List of Patents for class 257 subclass E27.066]  E27.066          Subclass E27.066 indent level is 7 Including a P-well only in the substrate (EPO)
[List of Patents for class 257 subclass E27.067]  E27.067          Subclass E27.067 indent level is 7 Including both N- and P- wells in the substrate, e.g. twin-tub (EPO)
[List of Patents for class 257 subclass E27.068]  E27.068          Subclass E27.068 indent level is 5 Schottky barrier gate field-effect transistor (EPO)
[List of Patents for class 257 subclass E27.069]  E27.069          Subclass E27.069 indent level is 5 PN junction gate field-effect transistor
[List of Patents for class 257 subclass E27.07]  E27.07          Subclass E27.07 indent level is 3 Including a plurality of individual components in a repetitive configuration (EPO)
[List of Patents for class 257 subclass E27.071]  E27.071          Subclass E27.071 indent level is 4 Including resistor or capacitor only (EPO)
[List of Patents for class 257 subclass E27.072]  E27.072          Subclass E27.072 indent level is 4 Including bipolar component (EPO)
[List of Patents for class 257 subclass E27.073]  E27.073          Subclass E27.073 indent level is 5 Including diode only (EPO)
[List of Patents for class 257 subclass E27.074]  E27.074          Subclass E27.074 indent level is 5 Including bipolar transistor (EPO)
[List of Patents for class 257 subclass E27.075]  E27.075          Subclass E27.075 indent level is 6 Bipolar dynamic random access memory structure (EPO)
[List of Patents for class 257 subclass E27.076]  E27.076          Subclass E27.076 indent level is 6 Array of single bipolar transistors only, e.g. read only memory structure (EPO)
[List of Patents for class 257 subclass E27.077]  E27.077          Subclass E27.077 indent level is 6 Static bipolar memory cell structure (EPO)
[List of Patents for class 257 subclass E27.078]  E27.078          Subclass E27.078 indent level is 6 Bipolar electrically programmable memory structure (EPO)
[List of Patents for class 257 subclass E27.079]  E27.079          Subclass E27.079 indent level is 5 Thyristor (EPO)
[List of Patents for class 257 subclass E27.08]  E27.08          Subclass E27.08 indent level is 5 Unijunction transistor, i.e., three terminal device with only one p-n junction having a negative resistance region in the I-V characteristic (EPO)
[List of Patents for class 257 subclass E27.081]  E27.081          Subclass E27.081 indent level is 4 Including field-effect component (EPO)
[List of Patents for class 257 subclass E27.082]  E27.082          Subclass E27.082 indent level is 5 Including bucket brigade type charge coupled device (C.C.D) (EPO)
[List of Patents for class 257 subclass E27.083]  E27.083          Subclass E27.083 indent level is 5 Including charge coupled device (C.C.D) or charge injection device (C.I.D) (EPO)
[List of Patents for class 257 subclass E27.084]  E27.084          Subclass E27.084 indent level is 5 Dynamic random access memory, DRAM, structure (EPO)
[List of Patents for class 257 subclass E27.085]  E27.085          Subclass E27.085 indent level is 6 One-transistor memory cell structure, i.e., each memory cell containing only one transistor (EPO)
[List of Patents for class 257 subclass E27.086]  E27.086          Subclass E27.086 indent level is 7 Storage electrode stacked over the transistor
[List of Patents for class 257 subclass E27.087]  E27.087          Subclass E27.087 indent level is 8 With bit line higher than capacitor (EPO)
[List of Patents for class 257 subclass E27.088]  E27.088          Subclass E27.088 indent level is 8 With capacitor higher than bit line level (EPO)
[List of Patents for class 257 subclass E27.089]  E27.089          Subclass E27.089 indent level is 8 Storage electrode having multiple wings (EPO)
[List of Patents for class 257 subclass E27.09]  E27.09          Subclass E27.09 indent level is 7 Capacitor extending under the transistor (EPO)
[List of Patents for class 257 subclass E27.091]  E27.091          Subclass E27.091 indent level is 7 Transistor in trench (EPO)
[List of Patents for class 257 subclass E27.092]  E27.092          Subclass E27.092 indent level is 7 Capacitor in trench (EPO)
[List of Patents for class 257 subclass E27.093]  E27.093          Subclass E27.093 indent level is 8 Capacitor extending under or around the transistor (EPO)
[List of Patents for class 257 subclass E27.094]  E27.094          Subclass E27.094 indent level is 8 Having storage electrode extension stacked over the transistor (EPO)
[List of Patents for class 257 subclass E27.095]  E27.095          Subclass E27.095 indent level is 7 Capacitor and transistor in common trench (EPO)
[List of Patents for class 257 subclass E27.096]  E27.096          Subclass E27.096 indent level is 8 Vertical transistor (EPO)
[List of Patents for class 257 subclass E27.097]  E27.097          Subclass E27.097 indent level is 6 Peripheral structure (EPO)
[List of Patents for class 257 subclass E27.098]  E27.098          Subclass E27.098 indent level is 5 Static random access memory, SRAM, structure (EPO)
[List of Patents for class 257 subclass E27.099]  E27.099          Subclass E27.099 indent level is 6 Load element being a MOSFET transistor (EPO)
[List of Patents for class 257 subclass E27.1]  E27.1          Subclass E27.1 indent level is 7 Load element being a thin film transistor (EPO)
[List of Patents for class 257 subclass E27.101]  E27.101          Subclass E27.101 indent level is 6 Load element being a resistor (EPO)
[List of Patents for class 257 subclass E27.102]  E27.102          Subclass E27.102 indent level is 5 Read-only memory, ROM, structure (EPO)
[List of Patents for class 257 subclass E27.103]  E27.103          Subclass E27.103 indent level is 6 Electrically programmable ROM (EPO)
[List of Patents for class 257 subclass E27.104]  E27.104          Subclass E27.104 indent level is 7 Ferroelectric non-volatile memory structure (EPO)
[List of Patents for class 257 subclass E27.105]  E27.105          Subclass E27.105 indent level is 4 Masterslice integrated circuit (EPO)
[List of Patents for class 257 subclass E27.106]  E27.106          Subclass E27.106 indent level is 5 Using bipolar structure (EPO)
[List of Patents for class 257 subclass E27.107]  E27.107          Subclass E27.107 indent level is 5 Using field-effect structure (EPO)
[List of Patents for class 257 subclass E27.108]  E27.108          Subclass E27.108 indent level is 6 CMOS gate array (EPO)
[List of Patents for class 257 subclass E27.109]  E27.109          Subclass E27.109 indent level is 5 Using combined field-effect/bipolar structure (EPO)
[List of Patents for class 257 subclass E27.11]  E27.11          Subclass E27.11 indent level is 5 Input and output buffer/driver (EPO)
[List of Patents for class 257 subclass E27.111]  E27.111          Subclass E27.111 indent level is 2 Substrate comprising other than a semiconductor material, e.g. insulating substrate or layered substrate Including a non-semiconductor layer (EPO)
[List of Patents for class 257 subclass E27.112]  E27.112          Subclass E27.112 indent level is 3 Including insulator on semiconductor, e.g. SOI (silicon on insulator) (EPO)
[List of Patents for class 257 subclass E27.113]  E27.113          Subclass E27.113 indent level is 3 Combined with thin-film or thick-film passive component (EPO)
[List of Patents for class 257 subclass E27.114]  E27.114          Subclass E27.114 indent level is 1 Including only passive thin-film or thick-film elements on a common insulating substrate (EPO)
[List of Patents for class 257 subclass E27.115]  E27.115          Subclass E27.115 indent level is 2 Thick-film circuits (EPO)
[List of Patents for class 257 subclass E27.116]  E27.116          Subclass E27.116 indent level is 2 Thin-film circuits (EPO)
[List of Patents for class 257 subclass E27.117]  E27.117          Subclass E27.117 indent level is 1 Including organic material in active region
[List of Patents for class 257 subclass E27.118]  E27.118          Subclass E27.118 indent level is 2 Including semiconductor components sensitive to infrared radiation, light, or electromagnetic radiation of a shorter wavelength (EPO)
[List of Patents for class 257 subclass E27.119]  E27.119          Subclass E27.119 indent level is 2 Including semiconductor components with at least one potential barrier, surface barrier, or recombination zone adapted for light emission (EPO)
[List of Patents for class 257 subclass E27.12]  E27.12          Subclass E27.12 indent level is 1 Including semiconductor component with at least one potential barrier or surface barrier adapted for light emission structurally associated with controlling devices having a variable impedance and not being light sensitive (EPO)
[List of Patents for class 257 subclass E27.121]  E27.121          Subclass E27.121 indent level is 2 In a repetitive configuration (EPO)
[List of Patents for class 257 subclass E27.122]  E27.122          Subclass E27.122 indent level is 1 Including active semiconductor component sensitive to infrared radiation, light, or electromagnetic radiation of a shorter wavelength (EPO)
[List of Patents for class 257 subclass E27.123]  E27.123          Subclass E27.123 indent level is 2 Energy conversion device (EPO)
[List of Patents for class 257 subclass E27.124]  E27.124          Subclass E27.124 indent level is 3 In a repetitive configuration, e.g. planar multi-junction solar cells (EPO)
[List of Patents for class 257 subclass E27.125]  E27.125          Subclass E27.125 indent level is 4 Including only thin film solar cells deposited on a substrate (EPO)
[List of Patents for class 257 subclass E27.126]  E27.126          Subclass E27.126 indent level is 4 Including multiple vertical junction or V-groove junction solar cells formed in a semiconductor substrate (EPO)
[List of Patents for class 257 subclass E27.127]  E27.127          Subclass E27.127 indent level is 2 Device controlled by radiation (EPO)
[List of Patents for class 257 subclass E27.128]  E27.128          Subclass E27.128 indent level is 3 With at least one potential barrier or surface barrier (EPO)
[List of Patents for class 257 subclass E27.129]  E27.129          Subclass E27.129 indent level is 4 In a repetitive configuration (EPO)
[List of Patents for class 257 subclass E27.13]  E27.13          Subclass E27.13 indent level is 3 Imager Including structural or functional details of the device (EPO)
[List of Patents for class 257 subclass E27.131]  E27.131          Subclass E27.131 indent level is 4 Geometry or disposition of pixel-elements, address-lines, or gate-electrodes (EPO)
[List of Patents for class 257 subclass E27.132]  E27.132          Subclass E27.132 indent level is 4 Pixel-elements with integrated switching, control, storage, or amplification elements (EPO)
[List of Patents for class 257 subclass E27.133]  E27.133          Subclass E27.133 indent level is 4 Photodiode array or MOS imager (EPO)
[List of Patents for class 257 subclass E27.134]  E27.134          Subclass E27.134 indent level is 5 Color imager (EPO)
[List of Patents for class 257 subclass E27.135]  E27.135          Subclass E27.135 indent level is 6 Multicolor imager having a stacked pixel-element structure, e.g. npn, npnpn or MQW elements (EPO)
[List of Patents for class 257 subclass E27.136]  E27.136          Subclass E27.136 indent level is 5 Infrared imager (EPO)
[List of Patents for class 257 subclass E27.137]  E27.137          Subclass E27.137 indent level is 6 Of the hybrid type (e.g., chip-on-chip, bonded substrates) (EPO)
[List of Patents for class 257 subclass E27.138]  E27.138          Subclass E27.138 indent level is 6 Multispectral infrared imager having a stacked pixel-element structure, e.g., npn, npnpn or MQW structures (EPO)
[List of Patents for class 257 subclass E27.139]  E27.139          Subclass E27.139 indent level is 5 Anti-blooming (EPO)
[List of Patents for class 257 subclass E27.14]  E27.14          Subclass E27.14 indent level is 5 X-ray, gamma-ray, or high energy radiation imager (measuring X-, gamma- or corpuscular radiation) (EPO)
[List of Patents for class 257 subclass E27.141]  E27.141          Subclass E27.141 indent level is 4 Imager using a photoconductor layer (e.g., single photoconductor layer for all pixels) (EPO)
[List of Patents for class 257 subclass E27.142]  E27.142          Subclass E27.142 indent level is 5 Color imager (EPO)
[List of Patents for class 257 subclass E27.143]  E27.143          Subclass E27.143 indent level is 5 Infrared imager (EPO)
[List of Patents for class 257 subclass E27.144]  E27.144          Subclass E27.144 indent level is 6 Of the hybrid type (e.g., chip-on-chip, bonded substrates) (EPO)
[List of Patents for class 257 subclass E27.145]  E27.145          Subclass E27.145 indent level is 5 Anti-blooming (EPO)
[List of Patents for class 257 subclass E27.146]  E27.146          Subclass E27.146 indent level is 5 X-ray, gamma-ray, or high energy radiation imagers (EPO)
[List of Patents for class 257 subclass E27.147]  E27.147          Subclass E27.147 indent level is 4 Contact-type imager (e.g., contacts document surface) (EPO)
[List of Patents for class 257 subclass E27.148]  E27.148          Subclass E27.148 indent level is 4 Junction field effect transistor (JFET) imager or static induction transistor (SIT) imager (EPO)
[List of Patents for class 257 subclass E27.149]  E27.149          Subclass E27.149 indent level is 4 Bipolar transistor imager (EPO)
[List of Patents for class 257 subclass E27.15]  E27.15          Subclass E27.15 indent level is 4 Charge coupled imager (EPO)
[List of Patents for class 257 subclass E27.151]  E27.151          Subclass E27.151 indent level is 5 Structural or functional details (EPO)
[List of Patents for class 257 subclass E27.152]  E27.152          Subclass E27.152 indent level is 6 Geometry or disposition of pixel-elements, address lines or gate-electrodes (EPO)
[List of Patents for class 257 subclass E27.153]  E27.153          Subclass E27.153 indent level is 5 Linear CCD imager (EPO)
[List of Patents for class 257 subclass E27.154]  E27.154          Subclass E27.154 indent level is 5 Area CCD imager (EPO)
[List of Patents for class 257 subclass E27.155]  E27.155          Subclass E27.155 indent level is 6 Frame-interline transfer (EPO)
[List of Patents for class 257 subclass E27.156]  E27.156          Subclass E27.156 indent level is 6 Interline transfer (EPO)
[List of Patents for class 257 subclass E27.157]  E27.157          Subclass E27.157 indent level is 6 Frame transfer (EPO)
[List of Patents for class 257 subclass E27.158]  E27.158          Subclass E27.158 indent level is 5 Charge injection device (CID) imager (EPO)
[List of Patents for class 257 subclass E27.159]  E27.159          Subclass E27.159 indent level is 5 CCD or CID color imager (EPO)
[List of Patents for class 257 subclass E27.16]  E27.16          Subclass E27.16 indent level is 5 Infrared CCD or CID imager (EPO)
[List of Patents for class 257 subclass E27.161]  E27.161          Subclass E27.161 indent level is 6 Of the hybrid type (e.g., chip-on-chip, bonded substrates) (EPO)
[List of Patents for class 257 subclass E27.162]  E27.162          Subclass E27.162 indent level is 5 Anti-blooming (EPO)
[List of Patents for class 257 subclass E27.163]  E27.163          Subclass E27.163 indent level is 5 Including a photoconductive layer deposited on the CCD structure (EPO)
[List of Patents for class 257 subclass E29.001]  E29.001          SEMICONDUCTORS DEVICES ADAPTED FOR RECTIFYING, AMPLIFYING, OSCILLATING, OR SWITCHING, CAPACITORS, OR RESISTORS WITH AT LEAST ONE POTENTIAL-JUMP BARRIER OR SURFACE BARRIER (EPO)
[List of Patents for class 257 subclass E29.002]  E29.002          Subclass E29.002 indent level is 1 Electrical characteristics due to properties of entire semiconductor body rather than just surface region (EPO)
[List of Patents for class 257 subclass E29.003]  E29.003          Subclass E29.003 indent level is 2 Characterized by their crystalline structure (e.g., polycrystalline, cubic) particular orientation of crystalline planes (EPO)
[List of Patents for class 257 subclass E29.004]  E29.004          Subclass E29.004 indent level is 3 With specified crystalline planes or axis (EPO)
[List of Patents for class 257 subclass E29.005]  E29.005          Subclass E29.005 indent level is 2 Characterized by specified shape or size of PN junction or by specified impurity concentration gradient within the device (EPO)
[List of Patents for class 257 subclass E29.006]  E29.006          Subclass E29.006 indent level is 3 Characterized by particular design considerations to control electrical field effect within device (EPO)
[List of Patents for class 257 subclass E29.007]  E29.007          Subclass E29.007 indent level is 4 For controlling surface leakage or electric field concentration (EPO)
[List of Patents for class 257 subclass E29.008]  E29.008          Subclass E29.008 indent level is 5 For controlling breakdown voltage of reverse biased devices (EPO)
[List of Patents for class 257 subclass E29.009]  E29.009          Subclass E29.009 indent level is 6 With field relief electrode (field plate) (EPO)
[List of Patents for class 257 subclass E29.01]  E29.01          Subclass E29.01 indent level is 7 With at least two field relief electrodes used in combination and not electrically interconnected (EPO)
[List of Patents for class 257 subclass E29.011]  E29.011          Subclass E29.011 indent level is 8 With one or more field relief electrode comprising resistance material (e.g., semi insulating material, lightly doped poly-silicon) (EPO)
[List of Patents for class 257 subclass E29.012]  E29.012          Subclass E29.012 indent level is 6 By doping profile or shape or arrangement of the PN junction, or with supplementary regions (e.g., guard ring, LDD, drift region) (EPO)
[List of Patents for class 257 subclass E29.013]  E29.013          Subclass E29.013 indent level is 7 With supplementary region doped oppositely to or in rectifying contact with semiconductor containing or contacting region(e.g., guard rings with PN or Schottky junction) (EPO)
[List of Patents for class 257 subclass E29.014]  E29.014          Subclass E29.014 indent level is 7 With breakdown supporting region for localizing breakdown or limiting its voltage (EPO)
[List of Patents for class 257 subclass E29.015]  E29.015          Subclass E29.015 indent level is 6 With insulating layer characterized by dielectric or electrostatic property (e.g., including fixed charge or semi-insulating surface layer) (EPO)
[List of Patents for class 257 subclass E29.016]  E29.016          Subclass E29.016 indent level is 5 For preventing surface leakage due to surface inversion layer (e.g., channel stop) (EPO)
[List of Patents for class 257 subclass E29.017]  E29.017          Subclass E29.017 indent level is 6 With field relief electrodes acting on insulator potential or insulator charges (EPO)
[List of Patents for class 257 subclass E29.018]  E29.018          Subclass E29.018 indent level is 4 Comprising internal isolation within devices or components (EPO)
[List of Patents for class 257 subclass E29.019]  E29.019          Subclass E29.019 indent level is 5 Isolation by PN junctions (EPO)
[List of Patents for class 257 subclass E29.02]  E29.02          Subclass E29.02 indent level is 5 Isolation by dielectric regions (EPO)
[List of Patents for class 257 subclass E29.021]  E29.021          Subclass E29.021 indent level is 6 For source or drain region of field-effect device (EPO)
[List of Patents for class 257 subclass E29.022]  E29.022          Subclass E29.022 indent level is 3 Characterized by shape of semiconductor body (EPO)
[List of Patents for class 257 subclass E29.023]  E29.023          Subclass E29.023 indent level is 4 Adapted for altering junction breakdown voltage by shape of semiconductor body (EPO)
[List of Patents for class 257 subclass E29.024]  E29.024          Subclass E29.024 indent level is 3 Characterized by shape, relative sizes or dispositions of semiconductor regions or junctions between regions (EPO)
[List of Patents for class 257 subclass E29.025]  E29.025          Subclass E29.025 indent level is 4 Characterized by particular shape of junction between semiconductor regions (EPO)
[List of Patents for class 257 subclass E29.026]  E29.026          Subclass E29.026 indent level is 4 Surface layout of device (EPO)
[List of Patents for class 257 subclass E29.027]  E29.027          Subclass E29.027 indent level is 5 Surface layout of MOS gated device (e.g., DMOSFET or IGBT) (EPO)
[List of Patents for class 257 subclass E29.028]  E29.028          Subclass E29.028 indent level is 6 With a nonplanar gate structure (EPO)
[List of Patents for class 257 subclass E29.029]  E29.029          Subclass E29.029 indent level is 3 With semiconductor regions connected to electrode carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (EPO)
[List of Patents for class 257 subclass E29.03]  E29.03          Subclass E29.03 indent level is 4 Emitter regions of bipolar transistors (EPO)
[List of Patents for class 257 subclass E29.031]  E29.031          Subclass E29.031 indent level is 5 Of lateral transistors (EPO)
[List of Patents for class 257 subclass E29.032]  E29.032          Subclass E29.032 indent level is 5 Noninterconnected multiemitter structures (EPO)
[List of Patents for class 257 subclass E29.033]  E29.033          Subclass E29.033 indent level is 5 Of heterojunction bipolar transistors (EPO)
[List of Patents for class 257 subclass E29.034]  E29.034          Subclass E29.034 indent level is 4 Collector regions of bipolar transistors (EPO)
[List of Patents for class 257 subclass E29.035]  E29.035          Subclass E29.035 indent level is 5 Pedestal collectors (EPO)
[List of Patents for class 257 subclass E29.036]  E29.036          Subclass E29.036 indent level is 4 Anode or cathode regions of thyristors or gated bipolar-mode devices (EPO)
[List of Patents for class 257 subclass E29.037]  E29.037          Subclass E29.037 indent level is 5 Anode regions of thyristors or gated bipolar-mode devices (EPO)
[List of Patents for class 257 subclass E29.038]  E29.038          Subclass E29.038 indent level is 5 Cathode regions of thyristors (EPO)
[List of Patents for class 257 subclass E29.039]  E29.039          Subclass E29.039 indent level is 4 Source or drain regions of field-effect devices (EPO)
[List of Patents for class 257 subclass E29.04]  E29.04          Subclass E29.04 indent level is 5 Of field-effect transistors with insulated gate (EPO)
[List of Patents for class 257 subclass E29.041]  E29.041          Subclass E29.041 indent level is 5 Of field-effect transistors with Schottky gate (EPO)
[List of Patents for class 257 subclass E29.042]  E29.042          Subclass E29.042 indent level is 4 Tunneling barrier (EPO)
[List of Patents for class 257 subclass E29.043]  E29.043          Subclass E29.043 indent level is 3 With semiconductor regions connected to electrode not carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (EPO)
[List of Patents for class 257 subclass E29.044]  E29.044          Subclass E29.044 indent level is 4 Base region of bipolar transistors (EPO)
[List of Patents for class 257 subclass E29.045]