Class   257	ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)
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When placing a mandatory classification in Class 257, a cross-reference classification is normally made in at least one of the appended E-subclasses.

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BULK EFFECT DEVICE

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. (1 indent ) Bulk effect switching in amorphous material

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.. (2 indent ) With means to localize region of conduction (e.g., "pore" structure)

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.. (2 indent ) With specified electrode composition or configuration

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.. (2 indent ) In array

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. (1 indent ) Intervalley transfer (e.g., Gunn effect)

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.. (2 indent ) In monolithic integrated circuit

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.. (2 indent ) Three or more terminal device

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THIN ACTIVE PHYSICAL LAYER WHICH IS (1) AN ACTIVE POTENTIAL WELL LAYER THIN ENOUGH TO ESTABLISH DISCRETE QUANTUM ENERGY LEVELS OR (2) AN ACTIVE BARRIER LAYER THIN ENOUGH TO PERMIT QUANTUM MECHANICAL TUNNELING OR (3) AN ACTIVE LAYER THIN ENOUGH TO PERMIT CARRIER TRANSMISSION WITH SUBSTANTIALLY NO SCATTERING (E.G., SUPERLATTICE QUANTUM WELL, OR BALLISTIC TRANSPORT DEVICE)

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. (1 indent ) Low workfunction layer for electron emission (e.g., photocathode electron emissive layer)

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.. (2 indent ) Combined with a heterojunction involving a III-V compound

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. (1 indent ) Heterojunction

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.. (2 indent ) Incoherent light emitter

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.. (2 indent ) Quantum well

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... (3 indent ) Superlattice

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.... (4 indent ) Of amorphous semiconductor material

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.... (4 indent ) With particular barrier dimension

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.... (4 indent ) Strained layer superlattice

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....• (5 indent ) Si x Ge 1-x

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.... (4 indent ) Field effect device

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.... (4 indent ) Light responsive structure

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.... (4 indent ) With specified semiconductor materials

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... (3 indent ) Current flow across well

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... (3 indent ) Field effect device

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... (3 indent ) Employing resonant tunneling

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.. (2 indent ) Ballistic transport device

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... (3 indent ) Field effect transistor

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. (1 indent ) Non-heterojunction superlattice (e.g., doping superlattice or alternating metal and insulator layers)

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. (1 indent ) Ballistic transport device (e.g., hot electron transistor)

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. (1 indent ) Tunneling through region of reduced conductivity

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.. (2 indent ) Josephson

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... (3 indent ) Particular electrode material

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.... (4 indent ) High temperature (i.e., >30o Kelvin)

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... (3 indent ) Weak link (e.g., narrowed portion of superconductive line)

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... (3 indent ) Particular barrier material

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... (3 indent ) With additional electrode to control conductive state of Josephson junction

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.. (2 indent ) At least one electrode layer of semiconductor material

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... (3 indent ) Three or more electrode device

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.. (2 indent ) Three or more electrode device

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ORGANIC SEMICONDUCTOR MATERIAL

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POINT CONTACT DEVICE

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SEMICONDUCTOR IS SELENIUM OR TELLURIUM IN ELEMENTAL FORM

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SEMICONDUCTOR IS AN OXIDE OF A METAL (E.G., CUO, ZNO) OR COPPER SULFIDE

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WITH METAL CONTACT ALLOYED TO ELEMENTAL SEMICONDUCTOR TYPE PN JUNCTION IN NONREGENERATIVE STRUCTURE

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. (1 indent ) Elongated alloyed region (e.g., thermal gradient zone melting, TGZM)

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. (1 indent ) In pn junction tunnel diode (Esaki diode)

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. (1 indent ) In bipolar transistor structure

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TEST OR CALIBRATION STRUCTURE

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NON-SINGLE CRYSTAL, OR RECRYSTALLIZED, SEMICONDUCTOR MATERIAL FORMS PART OF ACTIVE JUNCTION (INCLUDING FIELD-INDUCED ACTIVE JUNCTION)

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. (1 indent ) Non-single crystal, or recrystallized, active junction adapted to be electrically shorted (e.g., "anti-fuse" element)

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. (1 indent ) Non-single crystal, or recrystallized, material forms active junction with single crystal material (e.g., monocrystal to polycrystal pn junction or heterojunction)

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. (1 indent ) Amorphous semiconductor material

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.. (2 indent ) Responsive to nonelectrical external signals (e.g., light)

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... (3 indent ) With Schottky barrier to amorphous material

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... (3 indent ) Amorphous semiconductor is alloy or contains material to change band gap (e.g., Si x Ge 1-x , SiN y )

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... (3 indent ) With impurity other than hydrogen to passivate dangling bonds (e.g., halide)

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.. (2 indent ) Field effect device in amorphous semiconductor material

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... (3 indent ) With impurity other than hydrogen to passivate dangling bonds (e.g., halide)

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... (3 indent ) In array having structure for use as imager or display, or with transparent electrode

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... (3 indent ) With field electrode under or on a side edge of amorphous semiconductor material (e.g., vertical current path)

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... (3 indent ) With heavily doped regions contacting amorphous semiconductor material (e.g., heavily doped source and drain)

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.. (2 indent ) With impurity other than hydrogen to passivate dangling bonds (e.g., halide)

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.. (2 indent ) Amorphous semiconductor is alloy or contains material to change band gap (e.g., Si x Ge 1-x , SiN y )

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. (1 indent ) Non-single crystal, or recrystallized, material with specified crystal structure (e.g., specified crystal size or orientation)

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. (1 indent ) Non-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., Ge x Si 1- x, polycrystalline silicon with dangling bond modifier)

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. (1 indent ) Field effect device in non-single crystal, or recrystallized, Semiconductor material

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.. (2 indent ) In combination with device formed in single crystal semiconductor material (e.g., stacked FETs)

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... (3 indent ) Capacitor element in single crystal semiconductor (e.g., DRAM)

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... (3 indent ) Field effect transistor in single crystal material, complementary to that in non-single crystal, or recrystallized, material (e.g., CMOS)

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... (3 indent ) Recrystallized semiconductor material

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.. (2 indent ) In combination with capacitor element (e.g., DRAM)

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.. (2 indent ) In array having structure for use as imager or display, or with transparent electrode

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. (1 indent ) Schottky barrier to polycrystalline semiconductor material

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. (1 indent ) Plural recrystallized semiconductor layers (e.g., "3-dimensional integrated circuit")

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. (1 indent ) Recrystallized semiconductor material

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SPECIFIED WIDE BAND GAP (1.5EV) SEMICONDUCTOR MATERIAL OTHER THAN GAASP OR GAALAS

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. (1 indent ) Diamond or silicon carbide

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. (1 indent ) II-VI compound

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INCOHERENT LIGHT EMITTER STRUCTURE

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. (1 indent ) In combination with or also constituting light responsive device

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.. (2 indent ) With specific housing or contact structure

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... (3 indent ) Discrete light emitting and light responsive devices

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.. (2 indent ) Light coupled transistor structure

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.. (2 indent ) Combined in integrated structure

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... (3 indent ) With heterojunction

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. (1 indent ) Active layer of indirect band gap semiconductor

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.. (2 indent ) With means to facilitate electron-hole recombination (e.g., isoelectronic traps such as nitrogen in GaP)

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. (1 indent ) Plural light emitting devices (e.g., matrix, 7-segment array)

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.. (2 indent ) Multi-color emission

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... (3 indent ) With heterojunction

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.. (2 indent ) With shaped contacts or opaque masking

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.. (2 indent ) Alphanumeric segmented array

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.. (2 indent ) With electrical isolation means in integrated circuit structure

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. (1 indent ) With heterojunction

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.. (2 indent ) With contoured external surface (e.g., dome shape to facilitate light emission)

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.. (2 indent ) Plural heterojunctions in same device

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... (3 indent ) More than two heterojunctions in same device

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. (1 indent ) With reflector, opaque mask, or optical element (e.g., lens, optical fiber, index of refraction matching layer, luminescent material layer, filter) integral with device or device enclosure or package

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. (1 indent ) With housing or contact structure

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. (1 indent ) Encapsulated

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. (1 indent ) With particular dopant concentration or concentration profile (e.g., graded junction)

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. (1 indent ) With particular dopant material (e.g., zinc as dopant in GaAs)

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. (1 indent ) With particular semiconductor material

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TUNNELING PN JUNCTION (E.G., ESAKI DIODE) DEVICE

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. (1 indent ) In three or more terminal device

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. (1 indent ) Reverse bias tunneling structure (e.g., "backward" diode, true Zener diode)

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REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR, COMFET, THYRISTOR)

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. (1 indent ) Controlled by nonelectrical, nonoptical external signal (e.g., magnetic field, pressure, thermal)

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. (1 indent ) Having only two terminals and no control electrode (gate), e.g., Shockley diode

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.. (2 indent ) More than four semiconductor layers of alternating conductivity types (e.g., pnpnpn structure, 5 layer bidirectional diacs, etc.)

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.. (2 indent ) Triggered by V BO overvoltage means

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.. (2 indent ) With highly-doped breakdown diode trigger

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. (1 indent ) With light activation

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.. (2 indent ) With separate light detector integrated on chip with regenerative switching device

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.. (2 indent ) With electrical trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.)

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.. (2 indent ) With light conductor means (e.g., light fiber or light pipe) integral with device or device enclosure or package

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... (3 indent ) In groove or with thinned semiconductor portion

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.. (2 indent ) With groove or thinned light sensitive portion

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. (1 indent ) Bidirectional rectifier with control electrode (gate) (e.g., Triac)

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.. (2 indent ) Six or more semiconductor layers of alternating conductivity types (e.g., npnpnpn structure)

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.. (2 indent ) With diode or transistor in reverse path

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.. (2 indent ) Lateral

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.. (2 indent ) With trigger signal amplification (e.g., amplified gate)

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.. (2 indent ) Combined with field effect transistor structure

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... (3 indent ) Controllable emitter shunting

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.. (2 indent ) With means to separate a device into sections having different conductive polarity

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... (3 indent ) Guard ring or groove

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.. (2 indent ) Having overlapping sections of different conductive polarity

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.. (2 indent ) With means to increase reverse breakdown voltage

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.. (2 indent ) Switching speed enhancement means

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... (3 indent ) Recombination centers or deep level dopants

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. (1 indent ) Five or more layer unidirectional structure

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. (1 indent ) Combined with field effect transistor

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.. (2 indent ) J-FET (junction field effect transistor)

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... (3 indent ) Vertical (i.e., where the source is located above the drain or vice versa)

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.... (4 indent ) Enhancement mode (e.g., so-called SITs)

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.. (2 indent ) Having controllable emitter shunt

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... (3 indent ) Having gate turn off (GTO) feature

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.. (2 indent ) With extended latchup current level (e.g., COMFET device)

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... (3 indent ) Combined with other solid-state active device in integrated structure

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... (3 indent ) Lateral structure, i.e., current flow parallel to main device surface

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... (3 indent ) Having impurity doping for gain reduction

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... (3 indent ) Having anode shunt means

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... (3 indent ) Cathode emitter or cathode electrode feature

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... (3 indent ) Low impedance channel contact extends below surface

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. (1 indent ) Combined with other solid-state active device in integrated structure

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. (1 indent ) With extended latchup current level (e.g., gate turn off "GTO" device)

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.. (2 indent ) Having impurity doping for gain reduction

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.. (2 indent ) Having anode shunt means

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.. (2 indent ) With specified housing or external terminal

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... (3 indent ) External gate terminal structure or composition

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.. (2 indent ) Cathode emitter or cathode electrode feature

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.. (2 indent ) Gate region or electrode feature

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. (1 indent ) With resistive region connecting separate sections of device

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. (1 indent ) With switching speed enhancement means (e.g., Schottky contact)

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.. (2 indent ) Having deep level dopants or recombination centers

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. (1 indent ) With integrated trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.)

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.. (2 indent ) Three or more amplification stages

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.. (2 indent ) Transistor as amplifier

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.. (2 indent ) With distributed amplified current

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.. (2 indent ) With a turn-off diode

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. (1 indent ) Lateral structure

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. (1 indent ) Emitter region feature

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.. (2 indent ) Multi-emitter region (e.g., emitter geometry or emitter ballast resistor)

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... (3 indent ) Laterally symmetric regions

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... (3 indent ) Radially symmetric regions

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. (1 indent ) Having at least four external electrodes

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. (1 indent ) With means to increase breakdown voltage

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.. (2 indent ) High resistivity base layer

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.. (2 indent ) Surface feature (e.g., guard ring, groove, mesa, etc.)

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... (3 indent ) Edge feature (e.g., beveled edge)

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. (1 indent ) With means to lower "ON" voltage drop

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. (1 indent ) Device protection (e.g., from overvoltage)

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.. (2 indent ) Rate of rise of current (e.g., dI/dt)

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. (1 indent ) With means to control triggering (e.g., gate electrode configuration, Zener diode firing, dV/Dt control, transient control by ferrite bead, etc.)

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.. (2 indent ) Located in an emitter-gate region

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. (1 indent ) With housing or external electrode

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.. (2 indent ) With means to avoid stress between electrode and active device (e.g., thermal expansion matching of electrode to semiconductor)

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... (3 indent ) With malleable electrode (e.g., silver electrode layer)

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.. (2 indent ) Stud mount

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.. (2 indent ) With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, (e.g., ring)

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... (3 indent ) With lead feedthrough means on side of housing

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HETEROJUNCTION DEVICE

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. (1 indent ) Charge transfer device

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. (1 indent ) Light responsive structure

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.. (2 indent ) Staircase (including graded composition) device

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.. (2 indent ) Avalanche photodetection structure

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.. (2 indent ) Having transistor structure

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.. (2 indent ) Having narrow energy band gap (<<1eV) layer (e.g., PbSnTe, HgCdTe, etc.)

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... (3 indent ) Layer is a group III-V semiconductor compound

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. (1 indent ) With lattice constant mismatch (e.g., with buffer layer to accommodate mismatch)

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. (1 indent ) Having graded composition

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. (1 indent ) Field effect transistor

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.. (2 indent ) Doping on side of heterojunction with lower carrier affinity (e.g., high electron mobility transistor (HEMT))

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... (3 indent ) Combined with diverse type device

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. (1 indent ) Both semiconductors of the heterojunction are the same conductivity type (i.e., either n or p)

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. (1 indent ) Bipolar transistor

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.. (2 indent ) Wide band gap emitter

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. (1 indent ) Avalanche diode (e.g., so-called "Zener" diode having breakdown voltage greater than 6 volts, including heterojunction IMPATT type microwave diodes)

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. (1 indent ) Heterojunction formed between semiconductor materials which differ in that they belong to different periodic table groups (e.g., Ge (group IV) - GaAs (group III-V) or InP (group III-V) - CdTe (group II-VI))

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. (1 indent ) Between different group IV-VI or II-VI or III-V compounds other than GaAs/GaAlAs

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GATE ARRAYS

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. (1 indent ) With particular chip input/output means

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. (1 indent ) Having specific type of active device (e.g., CMOS)

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.. (2 indent ) With bipolar transistors or with FETs of only one channel conductivity type (e.g., enhancement-depletion FETs)

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.. (2 indent ) Particular layout of complementary FETs with regard to each other

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. (1 indent ) With particular power supply distribution means

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. (1 indent ) With particular signal path connections

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.. (2 indent ) Programmable signal paths (e.g., with fuse elements, laser programmable, etc)

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.. (2 indent ) With wiring channel area

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.. (2 indent ) Multi-level metallization

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CONDUCTIVITY MODULATION DEVICE (E.G., UNIJUNCTION TRANSISTOR, DOUBLE-BASE DIODE, CONDUCTIVITY-MODULATED TRANSISTOR)

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FIELD EFFECT DEVICE

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. (1 indent ) Charge injection device

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. (1 indent ) Charge transfer device

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.. (2 indent ) Majority signal carrier (e.g., buried or bulk channel, or peristaltic)

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... (3 indent ) Having a conductive means in direct contact with channel (e.g., non-insulated gate)

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... (3 indent ) High resistivity channel (e.g., accumulation mode) or surface channel (e.g., transfer of signal charge occurs at the surface of the semiconductor) or minority carriers at input (i.e., surface channel input)

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... (3 indent ) Impurity concentration variation

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.... (4 indent ) Vertically within channel (e.g., profiled)

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.... (4 indent ) Along the length of the channel (e.g., doping variations for transfer directionality)

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... (3 indent ) Responsive to non-electrical external signal (e.g., imager)

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.... (4 indent ) Having structure to improve output signal (e.g., antiblooming drain)

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... (3 indent ) Channel confinement

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.. (2 indent ) Non-electrical input responsive (e.g., light responsive imager, input programmed by size of storage sites for use as a read-only memory, etc.)

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... (3 indent ) Sensor element and charge transfer device are of different materials or on different substrates (e.g., "hybrid")

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... (3 indent ) With specified dopant (e.g., photoionizable, "extrinsic" detectors for infrared)

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... (3 indent ) Light responsive, back illuminated

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... (3 indent ) Having structure to improve output signal (e.g., exposure control structure)

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.... (4 indent ) With blooming suppression structure

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... (3 indent ) 2-dimensional area architecture

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.... (4 indent ) Having alternating strips of sensor structures and register structures (e.g., interline imager)

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.... (4 indent ) Sensors not overlaid by electrode (e.g., photodiodes)

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... (3 indent ) Single strip of sensors (e.g., linear imager)

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.. (2 indent ) Electrical input

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... (3 indent ) Signal applied to field effect electrode

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.... (4 indent ) Charge-presetting/linear input type (e.g., fill and spill)

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... (3 indent ) Input signal responsive to signal charge in charge transfer device (e.g., regeneration or feedback)

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.. (2 indent ) Signal charge detection type (e.g., floating diffusion or floating gate non-destructive output)

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.. (2 indent ) Changing width or direction of channel (e.g., meandering channel)

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.. (2 indent ) Multiple channels (e.g., converging or diverging or parallel channels)

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.. (2 indent ) Vertical charge transfer

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.. (2 indent ) Channel confinement

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.. (2 indent ) Comprising a groove

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.. (2 indent ) Structure for applying electric field into device (e.g., resistive electrode, acoustic traveling wave in channel)

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... (3 indent ) Phase structure (e.g., doping variations to provide asymmetry for 2-phase operation; more than four phases or "electrode per bit")

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.... (4 indent ) Uniphase or virtual phase structure

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.... (4 indent ) 2-phase

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... (3 indent ) Electrode structures or materials

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.... (4 indent ) Plural gate levels

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.. (2 indent ) Substantially incomplete signal charge transfer (e.g., bucket brigade)

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. (1 indent ) Responsive to non-optical, non-electrical signal

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.. (2 indent ) Chemical (e.g., ISFET, CHEMFET)

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.. (2 indent ) Physical deformation (e.g., strain sensor, acoustic wave detector)

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. (1 indent ) With current flow along specified crystal axis (e.g., axis of maximum carrier mobility)

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. (1 indent ) Junction field effect transistor (unipolar transistor)

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.. (2 indent ) Light responsive or combined with light responsive device

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... (3 indent ) In imaging array

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.. (2 indent ) Elongated active region acts as transmission line or distributed active element (e.g., "transmission line" field effect transistor)

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.. (2 indent ) Same channel controlled by both junction and insulated gate electrodes, or by both Schottky barrier and pn junction gates (e.g., "taper isolated" memory cell)

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.. (2 indent ) Junction gate region free of direct electrical connection (e.g., floating junction gate memory cell structure)

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.. (2 indent ) Combined with insulated gate field effect transistor (IGFET)

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.. (2 indent ) Vertical controlled current path

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... (3 indent ) Enhancement mode or with high resistivity channel (e.g., doping of 10 15 cm -3 or less)

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... (3 indent ) In integrated circuit

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... (3 indent ) With multiple parallel current paths (e.g., grid gate)

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.... (4 indent ) With Schottky barrier gate

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.. (2 indent ) Enhancement mode

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... (3 indent ) With means to adjust barrier height (e.g., doping profile)

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.. (2 indent ) Plural, separately connected, gates control same channel region

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.. (2 indent ) Load element or constant current source (e.g., with source to gate connection)

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.. (2 indent ) Junction field effect transistor in integrated circuit

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... (3 indent ) With bipolar device

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... (3 indent ) Complementary junction field effect transistors

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... (3 indent ) Microwave integrated circuit (e.g., microstrip type)

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.... (4 indent ) With contact or heat sink extending through hole in semiconductor substrate, or with electrode suspended over substrate (e.g., air bridge)

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.... (4 indent ) With capacitive or inductive elements

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... (3 indent ) With devices vertically spaced in different layers of semiconductor material (e.g., "3-dimensional" integrated circuit)

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.. (2 indent ) Pn junction gate in compound semiconductor material (e.g., GaAs)

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.. (2 indent ) With Schottky gate

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... (3 indent ) Schottky gate to silicon semiconductor

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... (3 indent ) Gate closely aligned to source region

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.... (4 indent ) With groove or overhang for alignment

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... (3 indent ) Schottky gate in groove

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.. (2 indent ) With profiled channel dopant concentration or profiled gate region dopant concentration (e.g., maximum dopant concentration below surface)

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.. (2 indent ) With non-uniform channel thickness or width

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.. (2 indent ) With multiple channels or channel segments connected in parallel, or with channel much wider than length between source and drain (e.g., power JFET)

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. (1 indent ) Having insulated electrode (e.g., MOSFET, MOS diode)

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.. (2 indent ) Significant semiconductor chemical compound in bulk crystal (e.g., GaAs)

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.. (2 indent ) Light responsive or combined with light responsive device

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... (3 indent ) Imaging array

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.... (4 indent ) Photodiodes accessed by FETs

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.... (4 indent ) Photoresistors accessed by FETs, or photodetectors separate from FET chip

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.... (4 indent ) With shield, filter, or lens

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.. (2 indent ) With ferroelectric material layer

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.. (2 indent ) Insulated gate capacitor or insulated gate transistor combined with capacitor (e.g., dynamic memory cell)

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... (3 indent ) With means for preventing charge leakage due to minority carrier generation (e.g., alpha generated soft error protection or "dark current" leakage protection)

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... (3 indent ) Capacitor for signal storage in combination with non-volatile storage means

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... (3 indent ) Structure configured for voltage converter (e.g., charge pump, substrate bias generator)

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... (3 indent ) Capacitor coupled to, or forms gate of, insulated gate field effect transistor (e.g., non-destructive readout dynamic memory cell structure)

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... (3 indent ) Capacitor in trench

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.... (4 indent ) Vertical transistor

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.... (4 indent ) Stacked capacitor

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.... (4 indent ) Storage node isolated by dielectric from semiconductor substrate

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.... (4 indent ) With means to insulate adjacent storage nodes (e.g., channel stops or field oxide)

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... (3 indent ) Stacked capacitor

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.... (4 indent ) Parallel interleaved capacitor electrode pairs (e.g., interdigitized)

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....• (5 indent ) With capacitor electrodes connection portion located centrally thereof (e.g., fin electrodes with central post)

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.... (4 indent ) With increased effective electrode surface area (e.g., tortuous path, corrugated, or textured electrodes)

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... (3 indent ) With high dielectric constant insulator (e.g., Ta 2 O 5 )

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... (3 indent ) Storage Node isolated by dielectric from semiconductor substrate

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... (3 indent ) Voltage variable capacitor (i. e., capacitance varies with applied voltage)

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... (3 indent ) Inversion layer capacitor

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.. (2 indent ) Variable threshold (e.g., floating gate memory device)

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... (3 indent ) With floating gate electrode

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.... (4 indent ) With additional contacted control electrode

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....• (5 indent ) With irregularities on electrode to facilitate charging or discharging of floating electrode

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....• (5 indent ) Additional control electrode is doped region in semiconductor substrate

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....• (5 indent ) Plural additional contacted control electrodes

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....•. (6 indent ) Separate control electrodes for charging and for discharging floating electrode

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....• (5 indent ) With thin insulator region for charging or discharging floating electrode by quantum mechanical tunneling

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....• (5 indent ) With charging or discharging by control voltage applied to source or drain region (e.g., by avalanche breakdown of drain junction)

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.... (4 indent ) With means to facilitate light erasure

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... (3 indent ) Multiple insulator layers (e.g., MNOS structure)

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.... (4 indent ) Non-homogeneous composition insulator layer (e.g., graded composition layer or layer with inclusions)

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.... (4 indent ) With additional, non-memory control electrode or channel portion (e.g., accessing field effect transistor structure)

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.. (2 indent ) Short channel insulated gate field effect transistor

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... (3 indent ) Vertical channel or double diffused insulated gate field effect device provided with means to protect against excess voltage (e.g., gate protection diode)

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... (3 indent ) Gate controls vertical charge flow portion of channel (e.g., VMOS device)

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.... (4 indent ) Gate electrode in groove

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....• (5 indent ) Plural gate electrodes or grid shaped gate electrode

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....• (5 indent ) Gate electrode self-aligned with groove

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....• (5 indent ) With thick insulator to reduce gate capacitance in non-channel areas (e.g., thick oxide over source or drain region)

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....• (5 indent ) In integrated circuit structure

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... (3 indent ) Active channel region has a graded dopant concentration decreasing with distance from source region (e.g., double diffused device, DMOS transistor)

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.... (4 indent ) With lightly doped portion of drain region adjacent channel (e.g., LDD structure)

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.... (4 indent ) In integrated circuit structure

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....• (5 indent ) With complementary field effect transistor

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.... (4 indent ) With means to increase breakdown voltage

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.... (4 indent ) With means (other than self-alignment of the gate electrode) to decrease gate capacitance (e.g., shield electrode)

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.... (4 indent ) Plural sections connected in parallel (e.g., power MOSFET)

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....• (5 indent ) With means to reduce ON resistance

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.... (4 indent ) All contacts on same surface (e.g., lateral structure)

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... (3 indent ) With lightly doped portion of drain region adjacent channel (e.g., LDD structure)

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... (3 indent ) With means to prevent sub-surface currents, or with non-uniform channel doping

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... (3 indent ) Gate electrode overlaps the source or drain by no more than depth of source or drain (e.g., self-aligned gate)

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.. (2 indent ) Single crystal semiconductor layer on insulating substrate (SOI)

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... (3 indent ) Depletion mode field effect transistor

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... (3 indent ) With means (e.g., a buried channel stop layer) to prevent leakage current along the interface of the semiconductor layer and the insulating substrate

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... (3 indent ) Insulated electrode device is combined with diverse type device (e.g., complementary MOSFETs, FET with resistor, etc.)

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.... (4 indent ) Complementary field effect transistor structures only (i.e., not including bipolar transistors, resistors, or other components)

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... (3 indent ) Substrate is single crystal insulator (e.g., sapphire or spinel)

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.... (4 indent ) Single crystal islands of semiconductor layer containing only one active device

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....• (5 indent ) Including means to eliminate island edge effects (e.g., insulating filling between islands, or ions in island edges)

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.. (2 indent ) With overvoltage protective means

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... (3 indent ) For protecting against gate insulator breakdown

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.... (4 indent ) In complementary field effect transistor integrated circuit

358

....• (5 indent ) Including resistor element

359

....•. (6 indent ) As thin film structure (e.g., polysilicon resistor)

360

.... (4 indent ) Protection device includes insulated gate transistor structure (e.g., combined with resistor element)

361

....• (5 indent ) For operation as bipolar or punchthrough element

362

.... (4 indent ) Punchthrough or bipolar element

363

.... (4 indent ) Including resistor element

364

.. (2 indent ) With resistive gate electrode

365

.. (2 indent ) With plural, separately connected, gate electrodes in same device

366

... (3 indent ) Overlapping gate electrodes

367

.. (2 indent ) Insulated gate controlled breakdown of pn junction (e.g., field plate diode)

368

.. (2 indent ) Insulated gate field effect transistor in integrated circuit

369

... (3 indent ) Complementary insulated gate field effect transistors

370

.... (4 indent ) Combined with bipolar transistor

371

.... (4 indent ) Complementary transistors in wells of opposite conductivity types more heavily doped than the substrate region in which they are formed, e.g., twin wells

372

.... (4 indent ) With means to prevent latchup or parasitic conduction channels

373

.... (4 indent ) With pn junction to collect injected minority carriers to prevent parasitic bipolar transistor action

374

....• (5 indent ) Dielectric isolation means (e.g., dielectric layer in vertical grooves)

375

....• (5 indent ) With means to reduce substrate spreading resistance (e.g., heavily doped substrate)

376

....• (5 indent ) With barrier region of reduced minority carrier lifetime (e.g., heavily doped P+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region)

377

.... (4 indent ) With polysilicon interconnections to source or drain regions (e.g., polysilicon laminated with silicide)

378

... (3 indent ) Combined with bipolar transistor

379

... (3 indent ) Combined with passive components (e.g., resistors)

380

.... (4 indent ) Polysilicon resistor

381

.... (4 indent ) With multiple levels of polycrystalline silicon

382

... (3 indent ) With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide)

383

.... (4 indent ) Contact of refractory or platinum group metal (e.g., molybdenum, tungsten, or titanium)

384

.... (4 indent ) Including silicide

385

.... (4 indent ) Multiple polysilicon layers

386

... (3 indent ) With means to reduce parasitic capacitance

387

.... (4 indent ) Gate electrode overlaps at least one of source or drain by no more than depth of source or drain (e.g., self-aligned gate)

388

....• (5 indent ) Gate electrode consists of refractory or platinum group metal or silicide

389

.... (4 indent ) With thick insulator over source or drain region

390

... (3 indent ) Matrix or array of field effect transistors (e.g., array of FETs only some of which are completed, or structure for mask programmed read-only memory (ROM))

391

.... (4 indent ) Selected groups of complete field effect devices having different threshold voltages (e.g., different channel dopant concentrations)

392

... (3 indent ) Insulated gate field effect transistors of different threshold voltages in same integrated circuit (e.g., enhancement and depletion mode)

393

... (3 indent ) Insulated gate field effect transistor adapted to function as load element for switching insulated gate field effect transistor

394

... (3 indent ) With means to prevent parasitic conduction channels

395

.... (4 indent ) Thick insulator portion

396

....• (5 indent ) Recessed into semiconductor surface

397

....•. (6 indent ) In vertical-walled groove

398

....•. (6 indent ) Combined with heavily doped channel stop portion

399

....• (5 indent ) Combined with heavily doped channel stop portion

400

.... (4 indent ) With heavily doped channel stop portion

401

... (3 indent ) With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)

402

.. (2 indent ) With permanent threshold adjustment (e.g., depletion mode)

403

... (3 indent ) With channel conductivity dopant same type as that of source and drain

404

.... (4 indent ) Non-uniform channel doping

405

... (3 indent ) With gate insulator containing specified permanent charge

406

.... (4 indent ) Plural gate insulator layers

407

... (3 indent ) With gate electrode of controlled workfunction material (e.g., low workfunction gate material)

408

.. (2 indent ) Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, LDD device)

409

.. (2 indent ) With means to increase breakdown voltage (e.g., field shield electrode, guard ring, etc.)

410

.. (2 indent ) Gate insulator includes material (including air or vacuum) other than SiO 2

411

... (3 indent ) Composite or layered gate insulator (e.g., mixture such as silicon oxynitride)

412

.. (2 indent ) Gate electrode of refractory material (e.g., polysilicon or a silicide of a refractory or platinum group metal)

413

... (3 indent ) Polysilicon laminated with silicide

414

RESPONSIVE TO NON-ELECTRICAL SIGNAL (E.G., CHEMICAL, STRESS, LIGHT, OR MAGNETIC FIELD SENSORS)

415

. (1 indent ) Physical deformation

416

.. (2 indent ) Acoustic wave

417

.. (2 indent ) Strain sensors

418

... (3 indent ) With means to concentrate stress

419

.... (4 indent ) With thinned central active portion of semiconductor surrounded by thick insensitive portion (e.g. diaphragm type strain gauge)

420

.. (2 indent ) Means to reduce sensitivity to physical deformation

421

. (1 indent ) Magnetic field

422

.. (2 indent ) With magnetic field directing means (e.g., shield, pole piece, etc.)

423

.. (2 indent ) Bipolar transistor magnetic field sensor (e.g., lateral bipolar transistor)

424

.. (2 indent ) Sensor with region of high carrier recombination (e.g., magnetodiode with carriers deflected to recombination region by magnetic field)

425

.. (2 indent ) Magnetic field detector using compound semiconductor material (e.g., GaAs, InSb, etc.)

426

.. (2 indent ) Differential output (e.g., with offset adjustment means or with means to reduce temperature sensitivity)

427

.. (2 indent ) Magnetic field sensor in integrated circuit (e.g., in bipolar transistor integrated circuit)

428

. (1 indent ) Electromagnetic or particle radiation

429

.. (2 indent ) Charged or elementary particles

430

... (3 indent ) With active region having effective impurity concentration less than 10 12 atoms/cm 3

431

.. (2 indent ) Light

432

... (3 indent ) With optical element

433

... (3 indent ) With housing or encapsulation

434

.... (4 indent ) With window means

435

... (3 indent ) With optical shield or mask means

436

... (3 indent ) With means for increasing light absorption (e.g., redirection of unabsorbed light)

437

.... (4 indent ) Antireflection coating

438

... (3 indent ) Avalanche junction

439

... (3 indent ) Containing dopant adapted for photoionization

440

... (3 indent ) With different sensor portions responsive to different wavelengths (e.g., color imager)

441

... (3 indent ) Narrow band gap semiconductor (<<1eV) (e.g., PbSnTe)

442

.... (4 indent ) II-VI compound semiconductor (e.g., HgCdTe)

443

... (3 indent ) Matrix or array (e.g., single line arrays)

444

.... (4 indent ) Light sensor elements overlie active switching elements in integrated circuit (e.g., where the sensor elements are deposited on an integrated circuit)

445

.... (4 indent ) With antiblooming means

446

.... (4 indent ) With specific isolation means in integrated circuit

447

.... (4 indent ) With backside illumination (e.g., having a thinned central area or a non-absorbing substrate)

448

.... (4 indent ) With particular electrode configuration

449

... (3 indent ) Schottky barrier (e.g., a transparent Schottky metallic layer or a Schottky barrier containing at least one of indium or tin (e.g., SnO 2 , indium tin oxide))

450

.... (4 indent ) With doping profile to adjust barrier height

451

.... (4 indent ) Responsive to light having lower energy (i.e., longer wavelength) than forbidden band gap energy of semiconductor (e.g., by excitation of carriers from metal into semiconductor)

452

.... (4 indent ) With edge protection, e.g., doped guard ring or mesa structure

453

.... (4 indent ) With specified Schottky metallic layer

454

....• (5 indent ) Schottky metallic layer is a silicide

455

....•. (6 indent ) Silicide of Platinum group metal

456

....•. (6 indent ) Silicide of refractory metal

457

.... (4 indent ) With particular contact geometry (e.g., ring or grid)

458

... (3 indent ) PIN detector, including combinations with non-light responsive active devices

459

... (3 indent ) With particular contact geometry (e.g., ring or grid, or bonding pad arrangement)

460

... (3 indent ) With backside illumination (e.g., with a thinned central area or non-absorbing substrate)

461

... (3 indent ) Light responsive pn junction

462

.... (4 indent ) Phototransistor

463

.... (4 indent ) With particular doping concentration

464

.... (4 indent ) With particular layer thickness (e.g., layer less than light absorption depth)

465

.... (4 indent ) Geometric configuration of junction (e.g., fingers)

466

... (3 indent ) External physical configuration of semiconductor (e.g., mesas, grooves)

467

. (1 indent ) Temperature

468

.. (2 indent ) Semiconductor device operated at cryogenic temperature

469

.. (2 indent ) With means to reduce temperature sensitivity (e.g., reduction of temperature sensitivity of junction breakdown voltage by using a compensating element)

470

.. (2 indent ) Pn junction adapted as temperature sensor

471

SCHOTTKY BARRIER

472

. (1 indent ) To compound semiconductor

473

.. (2 indent ) With specified Schottky metal

474

. (1 indent ) As active junction in bipolar transistor (e.g., Schottky collector)

475

. (1 indent ) With doping profile to adjust barrier height

476

. (1 indent ) In integrated structure

477

.. (2 indent ) With bipolar transistor

478

... (3 indent ) Plural Schottky barriers with different barrier heights

479

... (3 indent ) Connected across base-collector junction of transistor (e.g., Baker clamp)

480

. (1 indent ) In voltage variable capacitance diode

481

. (1 indent ) Avalanche diode (e.g., so-called "Zener" diode having breakdown voltage greater than 6 volts)

482

.. (2 indent ) Microwave transit time device (e.g., IMPATT diode)

483

. (1 indent ) With means to prevent edge breakdown

484

.. (2 indent ) Guard ring

485

. (1 indent ) Specified materials

486

.. (2 indent ) Layered (e.g., a diffusion barrier material layer or a silicide layer or a precious metal layer)

487

WITH MEANS TO INCREASE BREAKDOWN VOLTAGE THRESHOLD

488

. (1 indent ) Field relief electrode

489

.. (2 indent ) Resistive

490

.. (2 indent ) Combined with floating pn junction guard region

491

. (1 indent ) In integrated circuit

492

.. (2 indent ) With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices)

493

. (1 indent ) With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices)

494

. (1 indent ) Reverse-biased pn junction guard region

495

. (1 indent ) Floating pn junction guard region

496

. (1 indent ) With physical configuration of semiconductor surface to reduce electric field (e.g., reverse bevels, double bevels, stepped mesas, etc.)

497

PUNCHTHROUGH STRUCTURE DEVICE (E.G., PUNCHTHROUGH TRANSISTOR, CAMEL BARRIER DIODE)

498

. (1 indent ) Punchthrough region fully depleted at zero external applied bias voltage (e.g., camel barrier or planar doped barrier devices, or so-called "Bipolar SIT" devices)

499

INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS

500

. (1 indent ) Including high voltage or high power devices isolated from low voltage or low power devices in the same integrated circuit

501

.. (2 indent ) Including dielectric isolation means

502

.. (2 indent ) High power or high voltage device extends completely through semiconductor substrate (e.g., backside collector contact)

503

. (1 indent ) With contact or metallization configuration to reduce parasitic coupling (e.g., separate ground pads for different parts of integrated circuit)

504

. (1 indent ) Including means for establishing a depletion region throughout a semiconductor layer for isolating devices in different portions of the layer (e.g., "JFET" isolation)

505

. (1 indent ) With polycrystalline semiconductor isolation region in direct contact with single crystal active semiconductor material

506

. (1 indent ) Including dielectric isolation means

507

.. (2 indent ) With single crystal insulating substrate (e.g., sapphire)

508

.. (2 indent ) With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)

509

.. (2 indent ) Combined with pn junction isolation (e.g., isoplanar, LOCOS)

510

... (3 indent ) Dielectric in groove

511

.... (4 indent ) With complementary (npn and pnp) bipolar transistor structures

512

....• (5 indent ) Complementary devices share common active region (e.g., integrated injection logic, I 2 L)

513

.... (4 indent ) Vertical walled groove

514

....• (5 indent ) With active junction abutting groove (e.g., "walled emitter")

515

.... (4 indent ) With active junction abutting groove (e.g., "walled emitter")

516

.... (4 indent ) With passive component (e.g., resistor, capacitor, etc.)

517

.... (4 indent ) With bipolar transistor structure

518

....• (5 indent ) With polycrystalline connecting region (e.g., polysilicon base contact)

519

.... (4 indent ) Including heavily doped channel stop region adjacent groove

520

.... (4 indent ) Conductive filling in dielectric-lined groove (e.g., polysilicon backfill)

521

.... (4 indent ) Sides of grooves along major crystal planes (e.g., (111), (100) planes, etc.)

522

.. (2 indent ) Air isolation (e.g., beam lead supported semiconductor islands)

523

.. (2 indent ) Isolation by region of intrinsic (undoped) semiconductor material (e.g., including region physically damaged by proton bombardment)

524

.. (2 indent ) Full dielectric isolation with polycrystalline semiconductor substrate

525

... (3 indent ) With complementary (npn and pnp) bipolar transistor structures

526

.. (2 indent ) With bipolar transistor structure

527

... (3 indent ) Sides of isolated semiconductor islands along major crystal planes (e.g., (111), (100) planes, etc.)

528

. (1 indent ) Passive components in ICs

529

.. (2 indent ) Including programmable passive component (e.g., fuse)

530

... (3 indent ) Anti-fuse

531

.. (2 indent ) Including inductive element

532

.. (2 indent ) Including capacitor component

533

... (3 indent ) Combined with resistor to form RC filter structure

534

... (3 indent ) With means to increase surface area (e.g., grooves, ridges, etc.)

535

... (3 indent ) Both terminals of capacitor isolated from substrate

536

.. (2 indent ) Including resistive element

537

... (3 indent ) Using specific resistive material

538

.... (4 indent ) Polycrystalline silicon (doped or undoped)

539

... (3 indent ) Combined with bipolar transistor

540

.... (4 indent ) With compensation for non-linearity (e.g., dynamic isolation pocket bias)

541

.... (4 indent ) Pinch resistor

542

.... (4 indent ) Resistor has same doping as emitter or collector of bipolar transistor

543

.... (4 indent ) Lightly doped junction isolated resistor (e.g., ion implanted resistor)

544

. (1 indent ) With pn junction isolation

545

.. (2 indent ) With means to control isolation junction capacitance (e.g., lightly doped layer at isolation junction to increase depletion layer width)

546

.. (2 indent ) With structural means to protect against excess or reversed polarity voltage

547

.. (2 indent ) With structural means to control parasitic transistor action or leakage current

548

.. (2 indent ) At least three regions of alternating conductivity types with dopant concentration gradients decreasing from surface of semiconductor (e.g., "triple-diffused" integrated circuit)

549

.. (2 indent ) With substrate and lightly doped surface layer of same conductivity type, separated by subsurface heavily doped region of opposite conductivity type (e.g., "collector diffused isolation" integrated circuit)

550

.. (2 indent ) With lightly doped surface layer of one conductivity type on substrate of opposite conductivity type, having plural heavily doped portions of the one conductivity type between the layer and substrate, different ones of the heavily doped portions having differing depths or physical extent

551

.. (2 indent ) Including voltage reference element (e.g., avalanche diode, so-called "Zener diode" with breakdown voltage greater than 6 volts or with positive temperature coefficient of breakdown voltage)

552

.. (2 indent ) With bipolar transistor structure

553

... (3 indent ) Transistors of same conductivity type (e.g., npn) having different current gain or different operating voltage characteristics

554

... (3 indent ) With connecting region made of polycrystalline semiconductor material (e.g., polysilicon base contact)

555

... (3 indent ) Complementary bipolar transistor structures (e.g., integrated injection logic, I 2 L)

556

.... (4 indent ) Including lateral bipolar transistor structure

557

. (1 indent ) Lateral bipolar transistor structure

558

.. (2 indent ) With base region doping concentration step or gradient or with means to increase current gain

559

.. (2 indent ) With active region formed along groove or exposed edge in semiconductor

560

.. (2 indent ) With multiple collectors or emitters

561

... (3 indent ) With different emitter to collector spacings or facing areas

562

... (3 indent ) With auxiliary collector/re-emitter between emitter and output collector (e.g., "Current Hogging Logic" device)

563

. (1 indent ) With multiple separately connected emitter, collector, or base regions in same transistor structure

564

.. (2 indent ) Multiple base or collector regions

565

BIPOLAR TRANSISTOR STRUCTURE

566

. (1 indent ) Plural non-isolated transistor structures in same structure

567

.. (2 indent ) Darlington configuration (i.e., emitter to collector current of input transistor supplied to base region of output transistor)

568

... (3 indent ) More than two Darlington-connected transistors

569

... (3 indent ) Complementary Darlington-connected transistors

570

... (3 indent ) With active components in addition to Darlington transistors (e.g., antisaturation diode, bleeder diode connected antiparallel to input transistor base-emitter junction, etc.)

571

... (3 indent ) Non-planar structure (e.g., mesa emitter, or having a groove to define resistor)

572

... (3 indent ) With resistance means connected between transistor base regions

573

... (3 indent ) With housing or contact structure or configuration

574

.. (2 indent ) Complementary transistors share common active region (e.g., integrated injection logic, I 2 L)

575

... (3 indent ) Including lateral bipolar transistor structure

576

.... (4 indent ) With contacts of refractory material (e.g., polysilicon, silicide of refractory or platinum group metal)

577

. (1 indent ) Including additional component in same, non-isolated structure (e.g., transistor with diode, transistor with resistor, etc.)

578

. (1 indent ) With enlarged emitter area (e.g., power device)

579

.. (2 indent ) With separate emitter areas connected in parallel

580

... (3 indent ) With current ballasting means (e.g., emitter ballasting resistors or base current ballasting means)

581

.... (4 indent ) Thin film ballasting means (e.g., polysilicon resistor)

582

.. (2 indent ) With current ballasting means (e.g., emitter ballasting resistors or base current ballasting resistors)

583

.. (2 indent ) With means to reduce transistor action in selected portions of transistor (e.g., heavy base region doping under central web of emitter to prevent secondary breakdown)

584

.. (2 indent ) With housing or contact (i.e., electrode) means

585

. (1 indent ) With means to increase inverse gain

586

. (1 indent ) With non-planar semiconductor surface (e.g., groove, mesa, bevel, etc.)

587

. (1 indent ) With specified electrode means

588

.. (2 indent ) Including polycrystalline semiconductor as connection

589

. (1 indent ) Avalanche transistor

590

. (1 indent ) With means to reduce minority carrier lifetime (e.g., region of deep level dopant or region of crystal damage)

591

. (1 indent ) With emitter region having specified doping concentration profile (e.g., high-low concentration step)

592

. (1 indent ) With base region having specified doping concentration profile or specified configuration (e.g., inactive base more heavily doped than active base or base region has constant doping concentration portion (e.g., epitaxial base))

593

. (1 indent ) With means to increase current gain or operating frequency

594

WITH GROOVE TO DEFINE PLURAL DIODES

595

VOLTAGE VARIABLE CAPACITANCE DEVICE

596

. (1 indent ) With specified dopant profile

597

.. (2 indent ) Retrograde dopant profile (e.g., dopant concentration decreases with distance from rectifying junction)

598

. (1 indent ) With plural junctions whose depletion regions merge to vary voltage dependence

599

. (1 indent ) With means to increase active junction area (e.g., grooved or convoluted surface)

600

. (1 indent ) With physical configuration to vary voltage dependence (e.g., mesa)

601

. (1 indent ) Plural diodes in same non-isolated structure, or device having three or more terminals

602

. (1 indent ) With specified housing or contact

603

AVALANCHE DIODE (E.G., SO-CALLED "ZENER" DIODE HAVING BREAKDOWN VOLTAGE GREATER THAN 6 VOLTS)

604

. (1 indent ) Microwave transit time device (e.g., IMPATT diode)

605

. (1 indent ) With means to limit area of breakdown (e.g., guard ring having higher breakdown voltage)

606

.. (2 indent ) Subsurface breakdown

607

WITH SPECIFIED DOPANT (E.G., PLURAL DOPANTS OF SAME CONDUCTIVITY IN SAME REGION)

608

. (1 indent ) Switching device based on filling and emptying of deep energy levels

609

. (1 indent ) For compound semiconductor (e.g., deep level dopant)

610

. (1 indent ) Deep level dopant

611

.. (2 indent ) With specified distribution (e.g., laterally localized, with specified concentration distribution or gradient)

612

.. (2 indent ) Deep level dopant other than gold or platinum

613

INCLUDING SEMICONDUCTOR MATERIAL OTHER THAN SILICON OR GALLIUM ARSENIDE (GAAS) (E.G., PB X SN 1-X TE)

614

. (1 indent ) Group II-VI compound (e.g., CdTe, Hg x Cd 1-x Te)

615

. (1 indent ) Group III-V compound (e.g., InP)

616

. (1 indent ) Containing germanium, Ge

617

INCLUDING REGION CONTAINING CRYSTAL DAMAGE

618

PHYSICAL CONFIGURATION OF SEMICONDUCTOR (E.G., MESA, BEVEL, GROOVE, ETC.)

619

. (1 indent ) With thin active central semiconductor portion surrounded by thicker inactive shoulder (e.g., for mechanical support)

620

. (1 indent ) With peripheral feature due to separation of smaller semiconductor chip from larger wafer (e.g., scribe region, or means to prevent edge effects such as leakage current at peripheral chip separation area)

621

. (1 indent ) With electrical contact in hole in semiconductor (e.g., lead extends through semiconductor body)

622

. (1 indent ) Groove

623

. (1 indent ) Mesa structure (e.g., including undercut or stepped mesa configuration or having constant slope taper)

624

.. (2 indent ) With low resistance ohmic connection means along exposed mesa edge (e.g., contact or heavily doped region along exposed mesa to reduce "skin effect" losses in microwave diode)

625

.. (2 indent ) Semiconductor body including mesa is intimately bonded to thick electrical and/or thermal conductor member of larger lateral extent than semiconductor body (e.g., "plated heat sink" microwave diode)

626

.. (2 indent ) Combined with passivating coating

627

. (1 indent ) With specified crystal plane or axis

628

.. (2 indent ) Major crystal plane or axis other than (100), (110), or (111) (e.g., (731) axis, crystal plane several degrees from (100) toward (011), etc.)

629

WITH MEANS TO CONTROL SURFACE EFFECTS

630

. (1 indent ) With inversion-preventing shield electrode

631

. (1 indent ) In compound semiconductor material (e.g., GaAs)

632

. (1 indent ) Insulating coating

633

.. (2 indent ) With thermal expansion compensation (e.g., thermal expansion of glass passivant matched to that of semiconductor)

634

.. (2 indent ) Insulating coating of glass composition containing component to adjust melting or softening temperature (e.g., low melting point glass)

635

.. (2 indent ) Multiple layers

636

... (3 indent ) At least one layer of semi-insulating material

637

... (3 indent ) Three or more insulating layers

638

... (3 indent ) With discontinuous or varying thickness layer (e.g., layer covers only selected portions of semiconductor)

639

... (3 indent ) At least one layer of silicon oxynitride

640

... (3 indent ) At least one layer of silicon nitride

641

.... (4 indent ) Combined with glass layer

642

... (3 indent ) At least one layer of organic material

643

.... (4 indent ) Polyimide or polyamide

644

... (3 indent ) At least one layer of glass

645

... (3 indent ) Insulating layer containing specified electrical charge (e.g., net negative electrical charge)

646

.. (2 indent ) Coating of semi-insulating material (e.g., amorphous silicon or silicon-rich silicon oxide)

647

.. (2 indent ) Insulating layer recessed into semiconductor surface (e.g., LOCOS oxide)

648

... (3 indent ) Combined with channel stop region in semiconductor

649

.. (2 indent ) Insulating layer of silicon nitride or silicon oxynitride

650

.. (2 indent ) Insulating layer of glass

651

.. (2 indent ) Details of insulating layer electrical charge (e.g., negative insulator layer charge)

652

. (1 indent ) Channel stop layer

653

WITH SPECIFIED SHAPE OF PN JUNCTION

654

. (1 indent ) Interdigitated pn junction or more heavily doped side of junction is concave

655

WITH SPECIFIED IMPURITY CONCENTRATION GRADIENT

656

. (1 indent ) With high resistivity (e.g., "intrinsic") layer between P and N layers (e.g., PIN diode)

657

. (1 indent ) Stepped profile

658

PLATE TYPE RECTIFIER ARRAY

659

WITH SHIELDING (E.G., ELECTRICAL OR MAGNETIC SHIELDING, OR FROM ELECTROMAGNETIC RADIATION OR CHARGED PARTICLES)

660

. (1 indent ) With means to shield device contained in housing or package from charged particles (e.g., alpha particles) or highly ionizing radiation (i.e., hard X-rays or shorter wavelength)

661

SUPERCONDUCTIVE CONTACT OR LEAD

662

. (1 indent ) Transmission line or shielded

663

. (1 indent ) On integrated circuit

664

TRANSMISSION LINE LEAD (E.G., STRIPLINE, COAX, ETC.)

665

CONTACTS OR LEADS INCLUDING FUSIBLE LINK MEANS OR NOISE SUPPRESSION MEANS

666

LEAD FRAME

667

. (1 indent ) With dam or vent for encapsulant

668

. (1 indent ) On insulating carrier other than a printed circuit board

669

. (1 indent ) With stress relief

670

. (1 indent ) With separate tie bar element or plural tie bars

671

.. (2 indent ) Of insulating material

672

. (1 indent ) Small lead frame (e.g., "spider" frame) for connecting a large lead frame to a semiconductor chip

673

. (1 indent ) With bumps on ends of lead fingers to connect to semiconductor

674

. (1 indent ) With means for controlling lead tension

675

. (1 indent ) With heat sink means

676

. (1 indent ) With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED)

677

. (1 indent ) Of specified material other than copper (e.g., Kovar (T.M.))

678

HOUSING OR PACKAGE

679

. (1 indent ) Smart (e.g., credit) card package

680

. (1 indent ) With window means

681

.. (2 indent ) For erasing EPROM

682

. (1 indent ) With desiccant, getter, or gas filling

683

. (1 indent ) With means to prevent explosion of package

684

. (1 indent ) With semiconductor element forming part (e.g., base, of housing)

685

. (1 indent ) Multiple housings

686

.. (2 indent ) Stacked arrangement

687

. (1 indent ) Housing or package filled with solid or liquid electrically insulating material

688

. (1 indent ) With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, e.g., ring

689

.. (2 indent ) Rigid electrode portion

690

. (1 indent ) With contact or lead

691

.. (2 indent ) Having power distribution means (e.g., bus structure)

692

.. (2 indent ) With particular lead geometry

693

... (3 indent ) External connection to housing

694

.... (4 indent ) Axial leads

695

.... (4 indent ) Fanned/radial leads

696

.... (4 indent ) Bent (e.g., J-shaped) lead

697

.... (4 indent ) Pin grid type

698

.. (2 indent ) With specific electrical feedthrough structure

699

... (3 indent ) Housing entirely of metal except for feedthrough structure

700

.. (2 indent ) Multiple contact layers separated from each other by insulator means and forming part of a package or housing (e.g., plural ceramic layer package)

701

. (1 indent ) Insulating material

702

.. (2 indent ) Of insulating material other than ceramic

703

.. (2 indent ) Composite ceramic, or single ceramic with metal

704

.. (2 indent ) Cap or lid

705

.. (2 indent ) Of high thermal conductivity ceramic (e.g., BeO)

706

.. (2 indent ) With heat sink

707

... (3 indent ) Directly attached to semiconductor device

708

. (1 indent ) Entirely of metal except for feedthrough

709

.. (2 indent ) With specified insulator to isolate device from housing

710

.. (2 indent ) With specified means (e.g., lip) to seal base to cap

711

.. (2 indent ) With raised portion of base for mounting semiconductor chip

712

. (1 indent ) With provision for cooling the housing or its contents

713

.. (2 indent ) For integrated circuit

714

.. (2 indent ) Liquid coolant

715

... (3 indent ) Boiling (evaporative) liquid

716

... (3 indent ) Cryogenic liquid coolant

717

.. (2 indent ) Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer)

718

.. (2 indent ) Heat dissipating element held in place by clamping or spring means

719

... (3 indent ) Pressed against semiconductor element

720

.. (2 indent ) Heat dissipating element has high thermal conductivity insert (e.g., copper slug in aluminum heat sink)

721

.. (2 indent ) With gas coolant

722

... (3 indent ) With fins

723

. (1 indent ) For plural devices

724

.. (2 indent ) With discrete components

725

.. (2 indent ) With electrical isolation means

726

... (3 indent ) Devices held in place by clamping

727

. (1 indent ) Device held in place by clamping

728

. (1 indent ) For high frequency (e.g., microwave) device

729

. (1 indent ) Portion of housing of specific materials

730

. (1 indent ) Outside periphery of package having specified shape or configuration

731

. (1 indent ) With housing mount

732

.. (2 indent ) Flanged mount

733

.. (2 indent ) Stud mount

734

COMBINED WITH ELECTRICAL CONTACT OR LEAD

735

. (1 indent ) Beam leads (i.e., leads that extend beyond the ends or sides of a chip component)

736

.. (2 indent ) Layered

737

. (1 indent ) Bump leads

738

.. (2 indent ) Ball shaped

739

. (1 indent ) With textured surface

740

. (1 indent ) With means to prevent contact from penetrating shallow PN junction (e.g., prevention of aluminum "spiking")

741

. (1 indent ) Of specified material other than unalloyed aluminum

742

.. (2 indent ) With a semiconductor conductivity substitution type dopant (e.g., germanium in the case of a gallium arsenide semiconductor) in a contact metal)

743

... (3 indent ) For compound semiconductor material

744

.. (2 indent ) For compound semiconductor material

745

... (3 indent ) Contact for III-V material

746

.. (2 indent ) Composite material (e.g., fibers or strands embedded in solid matrix)

747

.. (2 indent ) With thermal expansion matching of contact or lead material to semiconductor active device

748

... (3 indent ) Plural layers of specified contact or lead material

749

.. (2 indent ) At least portion of which is transparent to ultraviolet, visible or infrared light

750

.. (2 indent ) Layered

751

... (3 indent ) At least one layer forms a diffusion barrier

752

... (3 indent ) Planarized to top of insulating layer

753

... (3 indent ) With adhesion promoting means (e.g., layer of material) to promote adhesion of contact to an insulating layer

754

... (3 indent ) At least one layer of silicide or polycrystalline silicon

755

.... (4 indent ) Polysilicon laminated with silicide

756

.... (4 indent ) Multiple polysilicon layers

757

.... (4 indent ) Silicide of refractory or platinum group metal

758

... (3 indent ) Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit)

759

.... (4 indent ) Including organic insulating material between metal levels

760

.... (4 indent ) Separating insulating layer is laminate or composite of plural insulating materials (e.g., silicon oxide on silicon nitride, silicon oxynitride)

761

... (3 indent ) At least one layer containing vanadium, hafnium, niobium, zirconium, or tantalum

762

... (3 indent ) At least one layer containing silver or copper

763

... (3 indent ) At least one layer of molybdenum, titanium, or tungsten

764

.... (4 indent ) Alloy containing molybdenum, titanium, or tungsten

765

... (3 indent ) At least one layer of an alloy containing aluminum

766

... (3 indent ) At least one layer containing chromium or nickel

767

.. (2 indent ) Resistive to electromigration or diffusion of the contact or lead material

768

.. (2 indent ) Refractory or platinum group metal or alloy or silicide thereof

769

... (3 indent ) Platinum group metal or silicide thereof

770

... (3 indent ) Molybdenum, tungsten, or titanium or their silicides

771

.. (2 indent ) Alloy containing aluminum

772

.. (2 indent ) Solder composition

773

. (1 indent ) Of specified configuration

774

.. (2 indent ) Via (interconnection hole) shape

775

.. (2 indent ) Varying width or thickness of conductor

776

.. (2 indent ) Cross-over arrangement, component or structure

777

. (1 indent ) Chip mounted on chip

778

. (1 indent ) Flip chip

779

. (1 indent ) Solder wettable contact, lead, or bond

780

. (1 indent ) Ball or nail head type contact, lead, or bond

781

.. (2 indent ) Layered contact, lead or bond

782

. (1 indent ) Die bond

783

.. (2 indent ) With adhesive means

784

. (1 indent ) Wire contact, lead, or bond

785

. (1 indent ) By pressure alone

786

. (1 indent ) Configuration or pattern of bonds

787

ENCAPSULATED

788

. (1 indent ) With specified encapsulant

789

.. (2 indent ) With specified filler material

790

.. (2 indent ) Plural encapsulating layers

791

.. (2 indent ) Including polysiloxane (e.g., silicone resin)

792

.. (2 indent ) Including polyimide

793

.. (2 indent ) Including epoxide

794

.. (2 indent ) Including glass

795

. (1 indent ) With specified filler material

796

. (1 indent ) With heat sink embedded in encapsulant

797

ALIGNMENT MARKS

798

MISCELLANEOUS

	E-SUBCLASSES

The following subclasses beginning with the letter E are E-subclasses. Each E-subclass corresponds in scope to a classification in a foreign classification system, for example, the European Classification system (ECLA). The foreign classification equivalent to an E-subclass is identified in the subclass definition. In addition to US documents classified in E-subclasses by US examiners, documents are regularly classified in E-subclasses according to the classification practices of any foreign Offices identified in parentheses at the end of the title. For example, "(EPO)" at the end of a title indicates both European and US patent documents, as classified by the EPO, are regularly added to the subclass. E-subclasses may contain subject matter outside the scope of this class.Consult their definitions, or the documents themselves to clarify or interpret titles.

E47.001

BULK NEGATIVE RESISTANCE EFFECT DEVICES, E.G., GUNN-EFFECT DEVICES, PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)

E47.002

. (1 indent ) Gunn-effect devices or transferred electron devices (EPO)

E47.003

.. (2 indent ) Controlled by electromagnetic radiation (EPO)

E47.004

.. (2 indent ) Gunn diodes (EPO)

E47.005

. (1 indent ) Processes or apparatus peculiar to manufacture or treatment of these devices or of parts thereof (EPO)

E39.001

DEVICES USING SUPERCONDUCTIVITY, PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)

E39.002

. (1 indent ) Containers or mountings (EPO)

E39.003

.. (2 indent ) For Josephson devices (EPO)

E39.004

. (1 indent ) Characterized by current path (EPO)

E39.005

. (1 indent ) Characterized by shape of element (EPO)

E39.006

. (1 indent ) Characterized by material (EPO)

E39.007

.. (2 indent ) Organic materials (EPO)

E39.008

... (3 indent ) Fullerene superconductors, e.g., soccerball-shaped allotrope of carbon, e.g., C60, C94 (EPO)

E39.009

.. (2 indent ) Ceramic materials (EPO)

E39.01

... (3 indent ) Comprising copper oxide (EPO)

E39.011

.... (4 indent ) Multilayered structures, e.g., super lattices (EPO)

E39.012

. (1 indent ) Devices comprising junction of dissimilar materials, e.g., Josephson-effect devices (EPO)

E39.013

.. (2 indent ) Single electron tunnelling devices (EPO)

E39.014

.. (2 indent ) Josephson-effect devices (EPO)

E39.015

... (3 indent ) Comprising high Tc ceramic materials (EPO)

E39.016

.. (2 indent ) Three or more electrode devices, e.g., transistor-like structures (EPO)

E39.017

. (1 indent ) Permanent superconductor devices (EPO)

E39.018

.. (2 indent ) Comprising high Tc ceramic materials (EPO)

E39.019

.. (2 indent ) Three or more electrode devices (EPO)

E39.02

... (3 indent ) Field-effect devices (EPO)

E51.001

ORGANIC SOLID STATE DEVICES, PROCESSES OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES OR OF PARTS THEREOF

E51.002

. (1 indent ) Structural detail of device (EPO)

E51.003

.. (2 indent ) Organic solid-state device adapted for rectifying, amplifying, oscillating, or switching, or capacitors or resistors with potential or surface barrier (EPO)

E51.004

... (3 indent ) Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (EPO)

E51.005

.... (4 indent ) Field-effect device (e.g., TFT, FET) (EPO)

E51.006

....• (5 indent ) Insulated gate field-effect transistor (EPO)

E51.007

....•. (6 indent ) Comprising organic gate dielectric (EPO)

E51.008

... (3 indent ) Controllable only by variation of electric current supplied or only electric potential applied to electrode carrying current to be rectified, amplified, oscillated, or switched (e.g., two terminal device) (EPO)

E51.009

.... (4 indent ) Comprising Schottky junction (EPO)

E51.01

.... (4 indent ) Comprising organic/organic junction (e.g., heterojunction) (EPO)

E51.011

.... (4 indent ) Comprising organic/inorganic heterojunction (EPO)

E51.012

.. (2 indent ) Radiation-sensitive organic solid-state device (EPO)

E51.013

... (3 indent ) Metal-organic semiconductor-metal device (EPO)

E51.014

... (3 indent ) Comprising bulk heterojunction (EPO)

E51.015

... (3 indent ) Comprising organic/inorganic heterojunction (EPO)

E51.016

.... (4 indent ) Majority carrier device using sensitization of wide band gap semiconductor (e.g., TiO 2 ) (EPO)

E51.017

... (3 indent ) Comprising organic semiconductor-organic semiconductor heterojunction (EPO)

E51.018

.. (2 indent ) Light-emitting organic solid-state device with potential or surface barrier (EPO)

E51.019

... (3 indent ) Electrode (EPO)

E51.02

.... (4 indent ) Encapsulation (EPO)

E51.021

.... (4 indent ) Arrangements for extracting light from device (e.g., Bragg reflector pair) (EPO)

E51.022

... (3 indent ) Multicolor organic light-emitting device (OLED) (EPO)

E51.023

.. (2 indent ) Molecular electronic device (EPO)

E51.024

. (1 indent ) Selection of material for organic solid-state device (EPO)

E51.025

.. (2 indent ) For organic solid-state device adapted for rectifying, amplifying, oscillating, or switching, or capacitors or resistors with potential or surface barrier (EPO)

E51.026

.. (2 indent ) For radiation-sensitive or light-emitting organic solid-state device with potential or surface barrier (EPO)

E51.027

.. (2 indent ) Organic polymer or oligomer (EPO)

E51.028

... (3 indent ) Comprising aromatic, heteroaromatic, or arrylic chains (e.g., polyaniline, polyphenylene, polyphenylene vinylene) (EPO)

E51.029

.... (4 indent ) Heteroaromatic compound comprising sulfur or selene (e.g., polythiophene) (EPO)

E51.03

....• (5 indent ) Polyethylene dioxythiophene and derivative (EPO)

E51.031

.... (4 indent ) Polyphenylenevinylene and derivatives (EPO)

E51.032

.... (4 indent ) Polyflurorene and derivative (EPO)

E51.033

... (3 indent ) Comprising aliphatic or olefinic chains (e.g., polyN-vinylcarbazol, PVC, PTFE) (EPO)

E51.034

.... (4 indent ) Polyacetylene or derivatives (EPO)

E51.035

.... (4 indent ) PolyN-vinylcarbazol and derivative (EPO)

E51.036

... (3 indent ) Copolymers (EPO)

E51.037

... (3 indent ) Ladder-type polymer (EPO)

E51.038

.. (2 indent ) Carbon-containing materials (EPO)

E51.039

... (3 indent ) Fullerenes (EPO)

E51.04

... (3 indent ) Carbon nanotubes (EPO)

E51.041

.. (2 indent ) Coordination compound (e.g., porphyrin, phthalocyanine, metal(II) polypyridine complexes) (EPO)

E51.042

... (3 indent ) Phthalocyanine (EPO)

E51.043

... (3 indent ) Metal complexes comprising Group IIIB metal (Al, Ga, In, or Ti) (e.g., Tris (8-hydroxyquinoline) aluminium (Alq3)) (EPO)

E51.044

... (3 indent ) Transition metal complexes (e.g., Ru(II) polypyridine complexes) (EPO)

E51.045

.. (2 indent ) Biomolecule or macromolecule (e.g., proteins, ATP, chlorophyl, beta-carotene, lipids, enzymes) (EPO)

E51.046

.. (2 indent ) Silicon-containing organic semiconductor (EPO)

E51.047

.. (2 indent ) Macromolecular system with low molecular weight (e.g., cyanine dyes, coumarine dyes, tetrathiafulvalene) (EPO)

E51.048

... (3 indent ) Charge transfer complexes (EPO)

E51.049

... (3 indent ) Polycondensed aromatic or heteroaromatic compound (e.g., pyrene, perylene, pentacene) (EPO)

E51.05

.... (4 indent ) Aromatic compound containing heteroatom (e.g., perylenetetracarboxylic dianhydride, perylene tetracarboxylic diimide) (EPO)

E51.051

... (3 indent ) Amine compound having at least two aryl on amine-nitrogen atom (e.g., triphenylamine) (EPO)

E51.052

.. (2 indent ) Langmuir Blodgett film (EPO)

E43.001

SEMICONDUCTOR OR SOLID-STATE DEVICES USING GALVANO-MAGNETIC OR SIMILAR MAGNETIC EFFECTS, PROCESSES OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)

E43.002

. (1 indent ) Hall-effect devices (EPO)

E43.003

.. (2 indent ) Semiconductor Hall-effect devices (EPO)

E43.004

. (1 indent ) Magnetic-field-controlled resistors (EPO)

E43.005

. (1 indent ) Selection of materials (EPO)

E43.006

. (1 indent ) Processes or apparatus peculiar to manufacture or treatment of these devices or of parts thereof (EPO)

E43.007

.. (2 indent ) For Hall-effect devices (EPO)

E33.001

LIGHT EMITTING SEMICONDUCTOR DEVICES HAVING A POTENTIAL OR A SURFACE BARRIER, PROCESSES OR APPARATUS PECULIAR TO THE MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF

E33.002

. (1 indent ) Device characterized by semiconductor body (EPO)

E33.003

.. (2 indent ) Particular crystalline orientation or structure (EPO)

E33.004

... (3 indent ) Comprising amorphous semiconductor (EPO)

E33.005

.. (2 indent ) Shape or structure (e.g., shape of epitaxial layer) (EPO)

E33.006

... (3 indent ) Shape of semiconductor body (EPO)

E33.007

... (3 indent ) Shape of potential barrier (EPO)

E33.008

... (3 indent ) Multiple quantum well structure (EPO)

E33.009

.... (4 indent ) Including, apart from doping materials or other only impurities, Group IV element (e.g., Si-SiGe superlattice) (EPO)

E33.01

.... (4 indent ) Doped superlattice (e.g., nipi superlattice) (EPO)

E33.011

... (3 indent ) For current confinement (EPO)

E33.012

... (3 indent ) Multiple active regions between two electrodes (e.g., stacks) (EPO)

E33.013

.. (2 indent ) Material of active region (EPO)

E33.014

... (3 indent ) In different regions (EPO)

E33.015

... (3 indent ) Comprising only Group IV element (EPO)

E33.016

.... (4 indent ) With heterojunction (EPO)

E33.017

.... (4 indent ) Characterized by doping material (EPO)

E33.018

.... (4 indent ) Including porous Si (EPO)

E33.019

... (3 indent ) Comprising only Group II-VI compound (EPO)

E33.02

.... (4 indent ) Ternary or quaternary compound (e.g., CdHgTe) (EPO)

E33.021

....• (5 indent ) With heterojunction (EPO)

E33.022

.... (4 indent ) Characterized by doping material (EPO)

E33.023

... (3 indent ) Comprising only Group III-V compound (EPO)

E33.024

.... (4 indent ) Binary compound (e.g., GaAs) (EPO)

E33.025

....• (5 indent ) Including nitride (e.g., GaN) (EPO)

E33.026

.... (4 indent ) Ternary or quaternary compound (e.g., AlGaAs) (EPO)

E33.027

....• (5 indent ) With heterojunction (EPO)

E33.028

....• (5 indent ) Including nitride (e.g., AlGaN) (EPO)

E33.029

.... (4 indent ) Characterized by doping material (EPO)

E33.03

....• (5 indent ) Nitride compound (EPO)

E33.031

.... (4 indent ) Including ternary or quaternary compound (e.g., AlGaAs) (EPO)

E33.032

....• (5 indent ) With heterojunction (e.g., AlGaAs/GaAs) (EPO)

E33.033

....• (5 indent ) Comprising nitride compound (e.g., AlGaN) (EPO)

E33.034

....•. (6 indent ) With heterojunction (e.g., AlGaN/GaN) (EPO)

E33.035

... (3 indent ) Comprising only Group IV compound (e.g., SiC) (EPO)

E33.036

.... (4 indent ) Characterized by doping material (EPO)

E33.037

... (3 indent ) Comprising compound other than Group II-VI, III-V, and IV compound (EPO)

E33.038

.... (4 indent ) Comprising only Group IV-VI compound (EPO)

E33.039

.... (4 indent ) Comprising only Group II-IV-VI compound (EPO)

E33.04

.... (4 indent ) Comprising only Group I-III-VI compound (EPO)

E33.041

.... (4 indent ) Characterized by doping material (EPO)

E33.042

.... (4 indent ) Comprising only Group IV-VI or II-IV-VI compound (EPO)

E33.043

.. (2 indent ) Physical imperfections (e.g., particular concentration or distribution of impurity) (EPO)

E33.044

. (1 indent ) Device characterized by their operation (EPO)

E33.045

.. (2 indent ) Having p-n or hi-lo junction (EPO)

E33.046

... (3 indent ) P-I-N device (EPO)

E33.047

... (3 indent ) Having at least two p-n junctions (EPO)

E33.048

.. (2 indent ) Having heterojunction or graded gap (EPO)

E33.049

... (3 indent ) Comprising only Group III-V compound (EPO)

E33.05

... (3 indent ) Comprising only Group II-IV compound (EPO)

E33.051

.. (2 indent ) Having Schottky barrier (EPO)

E33.052

.. (2 indent ) Having MIS barrier layer (EPO)

E33.053

.. (2 indent ) Characterized by field-effect operation (EPO)

E33.054

.. (2 indent ) Device being superluminescent diode (EPO)

E33.055

. (1 indent ) Detail of nonsemiconductor component other than light-emitting semiconductor device (EPO)

E33.056

.. (2 indent ) Packaging (EPO)

E33.057

... (3 indent ) Adapted for surface mounting (EPO)

E33.058

... (3 indent ) Housing (EPO)

E33.059

... (3 indent ) Encapsulation (EPO)

E33.06

.. (2 indent ) Coatings (EPO)

E33.061

... (3 indent ) Comprising luminescent material (e.g., fluorescent) (EPO)

E33.062

.. (2 indent ) Electrodes (EPO)

E33.063

... (3 indent ) Characterized by material (EPO)

E33.064

.... (4 indent ) Comprising transparent conductive layers (e.g., transparent conductive oxides (TCO), indium tin oxide (ITO)) (EPO)

E33.065

... (3 indent ) Characterized by shape (EPO)

E33.066

.. (2 indent ) Electrical contact or lead (e.g., lead frame) (EPO)

E33.067

.. (2 indent ) Means for light extraction or guiding (EPO)

E33.068

... (3 indent ) Integrated with device (e.g., back surface reflector, lens) (EPO)

E33.069

.... (4 indent ) Comprising resonant cavity structure (e.g., Bragg reflector pair) (EPO)

E33.07

.... (4 indent ) Comprising window layer (EPO)

E33.071

... (3 indent ) Not integrated with device (EPO)

E33.072

.... (4 indent ) Reflective means (EPO)

E33.073

.... (4 indent ) Refractive means (e.g., lens) (EPO)

E33.074

... (3 indent ) Scattering means (e.g., surface roughening) (EPO)

E33.075

.. (2 indent ) With means for cooling or heating (EPO)

E33.076

.. (2 indent ) With means for light detecting (e.g., photodetector) (EPO)

E33.077

.. (2 indent ) Monolithic integration with photosensitive device (EPO)

E31.001

SEMICONDUCTOR DEVICES RESPONSIVE OR SENSITIVE TO ELECTROMAGNETIC RADIATION (E.G., INFRARED RADIATION, ADAPTED FOR CONVERSION OF RADIATION INTO ELECTRICAL ENERGY OR FOR CONTROL OF ELECTRICAL ENERGY BY SUCH RADIATION PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF) (EPO)

E31.002

. (1 indent ) Characterized by semiconductor body (EPO)

E31.003

.. (2 indent ) Characterized by semiconductor body material (EPO)

E31.004

... (3 indent ) Inorganic materials (EPO)

E31.005

.... (4 indent ) In different semiconductor regions (e.g., Cu 2 X/CdX heterojunction and X being Group VI element) (EPO)

E31.006

....• (5 indent ) Comprising only Cu 2 X/CdX heterojunction and X being Group VI element (EPO)

E31.007

....• (5 indent ) Comprising only heterojunction including Group I-III-VI compound (e.g., CdS/CuInSe 2 heterojunction) (EPO)

E31.008

.... (4 indent ) Selenium or tellurium (EPO)

E31.009

....• (5 indent ) For device having potential or surface barrier (EPO)

E31.01

....• (5 indent ) Characterized by doping material (EPO)

E31.011

.... (4 indent ) Including, apart from doping material or other impurity, only Group IV element (EPO)

E31.012

....• (5 indent ) For device having potential or surface barrier (EPO)

E31.013

....• (5 indent ) Comprising porous silicon as part of active layer (EPO)

E31.014

....• (5 indent ) Characterized by doping material (EPO)

E31.015

.... (4 indent ) Including, apart from doping material or other impurity, only Group II-VI compound (e.g., CdS, ZnS, HgCdTe) (EPO)

E31.016

....• (5 indent ) For device having potential or surface barrier (EPO)

E31.017

....•. (6 indent ) Characterized by doping material (EPO)

E31.018

....• (5 indent ) Including ternary compound (e.g., HgCdTe) (EPO)

E31.019

.... (4 indent ) Including, apart from doping material or other impurity, only Group III-V compound (EPO)

E31.02

....• (5 indent ) For device having potential or surface barrier (EPO)

E31.021

....•. (6 indent ) Characterized by doping material GaAlAs, InGaAs, InGaAsP (EPO)

E31.022

....• (5 indent ) Including ternary or quaternary compound (EPO)

E31.023

.... (4 indent ) Including, apart from doping material or other impurity, only Group IV compound (e.g., SiC) (EPO)

E31.024

....• (5 indent ) For device having potential or surface barrier (EPO)

E31.025

....• (5 indent ) Characterized by doping material (EPO)

E31.026

.... (4 indent ) Including, apart from doping material or other impurity, only compound other than Group II-VI, III-V, and IV compound (EPO)

E31.027

....• (5 indent ) Comprising only Group I-III-VI chalcopyrite compound (e.g., CuInSe 2 , CuGaSe 2 , CuInGaSe 2 ) (EPO)

E31.028

....•. (6 indent ) Characterized by doping material (EPO)

E31.029

....• (5 indent ) Comprising only Group IV-VI or II-IV-VI chalcogenide compound (e.g., PbSnTe) (EPO)

E31.03

....•. (6 indent ) Characterized by doping material (EPO)

E31.031

....• (5 indent ) Characterized by doping material (EPO)

E31.032

.. (2 indent ) Characterized by semiconductor body shape, relative size, or disposition of semiconductor regions (EPO)

E31.033

... (3 indent ) Multiple quantum well structure (EPO)

E31.034

.... (4 indent ) Characterized by amorphous semiconductor layer (EPO)

E31.035

.... (4 indent ) Including, apart from doping material or other impurity, only Group IV element or compound (e.g., Si-SiGe superlattice) (EPO)

E31.036

.... (4 indent ) Doping superlattice (e.g., nipi superlattice) (EPO)

E31.037

... (3 indent ) For device having potential or surface barrier (EPO)

E31.038

.... (4 indent ) Shape of body (EPO)

E31.039

.... (4 indent ) Shape of potential or surface barrier (EPO)

E31.04

.. (2 indent ) Characterized by semiconductor body crystalline structure or plane (EPO)

E31.041

... (3 indent ) Including thin film deposited on metallic or insulating substrate (EPO)

E31.042

.... (4 indent ) Including only Group IV element (EPO)

E31.043

... (3 indent ) Including polycrystalline semiconductor (EPO)

E31.044

.... (4 indent ) Including only Group IV element (EPO)

E31.045

....• (5 indent ) Including microcrystalline silicon ( c-Si) (EPO)

E31.046

....• (5 indent ) Including microcrystalline Group IV compound (e.g., c-SiGe, c-SiC) (EPO)

E31.047

... (3 indent ) Including amorphous semiconductor (EPO)

E31.048

.... (4 indent ) Including only Group IV element (EPO)

E31.049

....• (5 indent ) Including Group IV compound (e.g., SiGe, SiC) (EPO)

E31.05

....• (5 indent ) Having light-induced characteristic variation (e.g., Staebler-Wronski effect) (EPO)

E31.051

... (3 indent ) Including other nonmonocrystalline material (e.g., semiconductor particles embedded in insulating material) (EPO)

E31.052

. (1 indent ) Adapted to control current flow through device (e.g., photoresistor) (EPO)

E31.053

.. (2 indent ) For device having potential or surface barrier (e.g., phototransistor) (EPO)

E31.054

... (3 indent ) Device sensitive to infrared, visible, or ultraviolet radiation (EPO)

E31.055

.... (4 indent ) Characterized by only one potential or surface barrier (EPO)

E31.056

....• (5 indent ) Potential barrier being of point contact type (EPO)

E31.057

....• (5 indent ) PN homojunction potential barrier (EPO)

E31.058

....•. (6 indent ) Device comprising active layer formed only by Group II-VI compound (e.g., HgCdTe IR photodiode) (EPO)

E31.059

....•. (6 indent ) Device comprising active layer formed only by Group III-V compound (EPO)

E31.06

....•. (6 indent ) Device comprising active layer formed only by Group IV compound (EPO)

E31.061

....• (5 indent ) PIN potential barrier (EPO)

E31.062

....•. (6 indent ) Device comprising Group IV amorphous material (EPO)

E31.063

....• (5 indent ) Potential barrier working in avalanche mode (e.g., avalanche photodiode) (EPO)

E31.064

....•. (6 indent ) Heterostructure (e.g., surface absorption or multiplication (SAM) layer) (EPO)

E31.065

....• (5 indent ) Schottky potential barrier (EPO)

E31.066

....•. (6 indent ) Metal-semiconductor-metal (MSM) Schottky barrier (EPO)

E31.067

....• (5 indent ) PN heterojunction potential barrier (EPO)

E31.068

.... (4 indent ) Characterized by two potential or surface barriers (EPO)

E31.069

....• (5 indent ) Bipolar phototransistor (EPO)

E31.07

.... (4 indent ) Characterized by at least three potential barriers (EPO)

E31.071

....• (5 indent ) Photothyristor (EPO)

E31.072

....•. (6 indent ) Static induction type (i.e., SIT device) (EPO)

E31.073

.... (4 indent ) Field-effect type (e.g., junction field-effect phototransistor) (EPO)

E31.074

....• (5 indent ) With Schottky gate (EPO)

E31.075

....•. (6 indent ) Charge-coupled device (CCD) (EPO)

E31.076

....•. (6 indent ) Photo MESFET (EPO)

E31.077

....• (5 indent ) With PN homojunction gate (EPO)

E31.078

....•. (6 indent ) Charge-coupled device (CCD) (EPO)

E31.079

....•. (6 indent ) Field-effect phototransistor (EPO)

E31.08

....• (5 indent ) With PN heterojunction gate (EPO)

E31.081

....•. (6 indent ) Charge-coupled device (CCD) (EPO)

E31.082

....•. (6 indent ) Field-effect phototransistor (EPO)

E31.083

....• (5 indent ) Conductor-insulator-semiconductor type (EPO)

E31.084

....•. (6 indent ) Diode or charge-coupled device (CCD) (EPO)

E31.085

....•. (6 indent ) Metal-insulator-semiconductor field-effect transistor (EPO)

E31.086

... (3 indent ) Device sensitive to very short wavelength (e.g., X-ray, gamma-ray, or corpuscular radiation) (EPO)

E31.087

.... (4 indent ) Bulk-effect radiation detector (e.g., Ge-Li compensated PIN gamma-ray detector) (EPO)

E31.088

....• (5 indent ) Li-compensated PIN gamma-ray detector (EPO)

E31.089

.... (4 indent ) With surface barrier or shallow PN junction (e.g., surface barrier alpha-particle detector) (EPO)

E31.09

....• (5 indent ) With shallow PN junction (EPO)

E31.091

.... (4 indent ) Field-effect type (e.g., MIS-type detector) (EPO)

E31.092

.. (2 indent ) Device being sensitive to very short wavelength (e.g., X-ray, gamma-ray) (EPO)

E31.093

.. (2 indent ) Device sensitive to infrared, visible, or ultraviolet radiation (EPO)

E31.094

... (3 indent ) Comprising amorphous semiconductor (EPO)

E31.095

. (1 indent ) Structurally associated with electric light source (e.g., electroluminescent light source) (EPO)

E31.096

.. (2 indent ) Hybrid device containing photosensitive and electroluminescent components within one single body (EPO)

E31.097

.. (2 indent ) Light source controlled by radiation-sensitive semiconductor device (e.g., image converter, image amplifier, image storage device) (EPO)

E31.098

... (3 indent ) Device without potential or surface barrier (EPO)

E31.099

.... (4 indent ) Light source being semiconductor device with potential or surface barrier (e.g., light-emitting diode) (EPO)

E31.1

... (3 indent ) Device with potential or surface barrier (EPO)

E31.101

... (3 indent ) Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (EPO)

E31.102

.... (4 indent ) Formed in or on common substrate (EPO)

E31.103

.. (2 indent ) Radiation-sensitive semiconductor device controlled by light source (EPO)

E31.104

... (3 indent ) Radiation-sensitive semiconductor device without potential or surface barrier (e.g., photoresistor) (EPO)

E31.105

.... (4 indent ) Light source being semiconductor device having potential or surface barrier (e.g., light-emitting diode) (EPO)

E31.106

.... (4 indent ) Optical potentiometer (EPO)

E31.107

... (3 indent ) Radiation-sensitive semiconductor device with potential or surface barrier (EPO)

E31.108

... (3 indent ) Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (EPO)

E31.109

.... (4 indent ) Formed in or on common substrate (EPO)

E31.11

. (1 indent ) Detail of nonsemiconductor component of radiation-sensitive semiconductor device (EPO)

E31.111

.. (2 indent ) Input/output circuit of device (EPO)

E31.112

... (3 indent ) For device having potential or surface barrier (EPO)

E31.113

.. (2 indent ) Circuit arrangement of general character for device (EPO)

E31.114

... (3 indent ) For device having potential or surface barrier (EPO)

E31.115

.... (4 indent ) Position-sensitive and lateral-effect photodetector (e.g., quadrant photodiode) (EPO)

E31.116

.... (4 indent ) Device working in avalanche mode (EPO)

E31.117

.. (2 indent ) Encapsulation (EPO)

E31.118

... (3 indent ) For device having potential or surface barrier (EPO)

E31.119

.. (2 indent ) Coatings (EPO)

E31.12

... (3 indent ) For device having potential or surface barrier (EPO)

E31.121

.... (4 indent ) For filtering or shielding light (e.g., multicolor filter for photodetector) (EPO)

E31.122

....• (5 indent ) For shielding light (e.g., light-blocking layer, cold shield for infrared detector) (EPO)

E31.123

....• (5 indent ) For interference filter (e.g., multilayer dielectric filter) (EPO)

E31.124

.. (2 indent ) Electrode (EPO)

E31.125

... (3 indent ) For device having potential or surface barrier (EPO)

E31.126

... (3 indent ) Transparent conductive layer (e.g., transparent conductive oxide (TCO), indium tin oxide (ITO) layer) (EPO)

E31.127

.. (2 indent ) Optical element associated with device (EPO)

E31.128

... (3 indent ) Device having potential or surface barrier (EPO)

E31.129

... (3 indent ) Comprising luminescent member (e.g., fluorescent sheet) (EPO)

E31.13

.. (2 indent ) Texturized surface (EPO)

E31.131

.. (2 indent ) Arrangement for temperature regulation (e.g., cooling, heating, or ventilating) (EPO)

E27.001

DEVICE CONSISTING OF A PLURALITY OF SEMICONDUCTOR OR OTHER SOLID STATE COMPONENTS FORMED IN OR ON A COMMON SUBSTRATE, E.G., INTEGRATED CIRCUIT DEVICE (EPO)

E27.002

. (1 indent ) Including bulk negative resistance effect component (EPO)

E27.003

.. (2 indent ) Including Gunn-effect device (EPO)

E27.004

. (1 indent ) Including solid state component for rectifying, amplifying, or switching without a potential barrier or surface barrier (EPO)

E27.005

. (1 indent ) Including component using galvano-magnetic effects, e.g. Hall effect (EPO)

E27.006

. (1 indent ) Including piezo-electric, electro-resistive, or magneto-resistive component (EPO)

E27.007

. (1 indent ) Including superconducting component (EPO)

E27.008

. (1 indent ) Including thermo-electric or thermo-magnetic component with or without a junction of dissimilar material or thermo-magnetic component (EPO)

E27.009

. (1 indent ) Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or Including integrated passive circuit elements (EPO)

E27.01

.. (2 indent ) With semiconductor substrate only (EPO)

E27.011

... (3 indent ) Including a plurality of components in a non-repetitive configuration (EPO)

E27.012

.... (4 indent ) Made of compound semiconductor material, e.g. III-V material (EPO)

E27.013

.... (4 indent ) Integrated circuit having a two-dimensional layout of components without a common active region (EPO)

E27.014

....• (5 indent ) Including a field-effect type component (EPO)

E27.015

....•. (6 indent ) In combination with bipolar transistor (EPO)

E27.016

....•. (6 indent ) In combination with diode, resistor, or capacitor (EPO)

E27.017

....•. (6 indent ) In combination with bipolar transistor and diode, resistor, or capacitor (EPO)

E27.018

....• (5 indent ) With component other than field-effect type (EPO)

E27.019

....•. (6 indent ) Bipolar transistor in combination with diode, capacitor, or resistor (EPO)

E27.02

....•.. (7 indent ) Vertical bipolar transistor in combination with diode, capacitor, or resistor (EPO)

E27.021

....•... (8 indent ) Vertical bipolar transistor in combination with resistor or capacitor only (EPO)

E27.022

....•... (8 indent ) Vertical bipolar transistor in combination with diode only (EPO)

E27.023

....•.. (7 indent ) Lateral bipolar transistor in combination with diode, capacitor, or resistor (EPO)

E27.024

....•. (6 indent ) Including combination of diode, capacitor, or resistor (EPO)

E27.025

....•.. (7 indent ) Including combination of capacitor or resistor only (EPO)

E27.026

.... (4 indent ) Integrated circuit having a three-dimensional layout (EPO)

E27.027

....• (5 indent ) Including components formed on opposite sides of a semiconductor substrate (EPO)

E27.028

.... (4 indent ) Including component having an active region in common (EPO)

E27.029

....• (5 indent ) Including component of the field-effect type (EPO)

E27.03

....•. (6 indent ) In combination with bipolar transistor and diode, capacitor, or resistor (EPO)

E27.031

....•.. (7 indent ) In combination with vertical bipolar transistor and diode, capacitor, or resistor (EPO)

E27.032

....•.. (7 indent ) In combination with lateral bipolar transistor and diode, capacitor, or resistor (EPO)

E27.033

....•. (6 indent ) In combination with diode, capacitor, or resistor (EPO)

E27.034

....•.. (7 indent ) In combination with capacitor only (EPO)

E27.035

....•.. (7 indent ) In combination with resistor only (EPO)

E27.036

....• (5 indent ) With component other than field-effect type (EPO)

E27.037

....•. (6 indent ) Bipolar transistor in combination with diode, capacitor, or resistor (EPO)

E27.038

....•.. (7 indent ) Vertical bipolar transistor in combination with diode, capacitor, or resistor (EPO)

E27.039

....•... (8 indent ) Vertical bipolar transistor in combination with diode only (EPO)

E27.04

....•.... (9 indent ) With Schottky diode only (EPO)

E27.041

....•... (8 indent ) Vertical bipolar transistor in combination with resistor only (EPO)

E27.042

....•... (8 indent ) Vertical bipolar transistor in combination with capacitor only (EPO)

E27.043

....•.. (7 indent ) Lateral bipolar transistor in combination with diode, capacitor, or resistor (EPO)

E27.044

....•. (6 indent ) Including combination of diode, capacitor, or resistor (EPO)

E27.045

....•.. (7 indent ) Combination of capacitor and resistor (EPO)

E27.046

... (3 indent ) Including only semiconductor components of a single kind, e.g., all bipolar transistors, all diodes, or all CMOS (EPO)

E27.047

.... (4 indent ) Resistor only (EPO)

E27.048

.... (4 indent ) Capacitor only (EPO)

E27.049

....• (5 indent ) Varactor diode (EPO)

E27.05

....• (5 indent ) Metal-insulated-semiconductor (MIS) diode (EPO)

E27.051

.... (4 indent ) Diode only (EPO)

E27.052

.... (4 indent ) Thyristor only (EPO)

E27.053

.... (4 indent ) Bipolar component only (EPO)

E27.054

....• (5 indent ) Combination of lateral and vertical transistors only (EPO)

E27.055

....• (5 indent ) Vertical bipolar transistor only (EPO)

E27.056

....•. (6 indent ) Vertical direct transistor of the same conductivity type having different characteristics, (e.g. Darlington transistor) (EPO)

E27.057

....•. (6 indent ) Vertical complementary transistor (EPO)

E27.058

....•. (6 indent ) Combination of direct and inverse vertical transistors (e.g., collector acts as emitter) (EPO)

E27.059

.... (4 indent ) Including field-effect component only (EPO)

E27.06

....• (5 indent ) Field-effect transistor with insulated gate (EPO)

E27.061

....•. (6 indent ) Combination of depletion and enhancement field-effect transistors (EPO)

E27.062

....•. (6 indent ) Complementary MIS (EPO)

E27.063

....•.. (7 indent ) Means for preventing a parasitic bipolar action between the different transistor regions, e.g. latch-up prevention (EPO)

E27.064

....•.. (7 indent ) Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS (EPO)

E27.065

....•.. (7 indent ) Including an N-well only in the substrate (EPO)

E27.066

....•.. (7 indent ) Including a P-well only in the substrate (EPO)

E27.067

....•.. (7 indent ) Including both N- and P- wells in the substrate, e.g. twin-tub (EPO)

E27.068

....• (5 indent ) Schottky barrier gate field-effect transistor (EPO)

E27.069

....• (5 indent ) PN junction gate field-effect transistor

E27.07

... (3 indent ) Including a plurality of individual components in a repetitive configuration (EPO)

E27.071

.... (4 indent ) Including resistor or capacitor only (EPO)

E27.072

.... (4 indent ) Including bipolar component (EPO)

E27.073

....• (5 indent ) Including diode only (EPO)

E27.074

....• (5 indent ) Including bipolar transistor (EPO)

E27.075

....•. (6 indent ) Bipolar dynamic random access memory structure (EPO)

E27.076

....•. (6 indent ) Array of single bipolar transistors only, e.g. read only memory structure (EPO)

E27.077

....•. (6 indent ) Static bipolar memory cell structure (EPO)

E27.078

....•. (6 indent ) Bipolar electrically programmable memory structure (EPO)

E27.079

....• (5 indent ) Thyristor (EPO)

E27.08

....• (5 indent ) Unijunction transistor, i.e., three terminal device with only one p-n junction having a negative resistance region in the I-V characteristic (EPO)

E27.081

.... (4 indent ) Including field-effect component (EPO)

E27.082

....• (5 indent ) Including bucket brigade type charge coupled device (C.C.D) (EPO)

E27.083

....• (5 indent ) Including charge coupled device (C.C.D) or charge injection device (C.I.D) (EPO)

E27.084

....• (5 indent ) Dynamic random access memory, DRAM, structure (EPO)

E27.085

....•. (6 indent ) One-transistor memory cell structure, i.e., each memory cell containing only one transistor (EPO)

E27.086

....•.. (7 indent ) Storage electrode stacked over the transistor

E27.087

....•... (8 indent ) With bit line higher than capacitor (EPO)

E27.088

....•... (8 indent ) With capacitor higher than bit line level (EPO)

E27.089

....•... (8 indent ) Storage electrode having multiple wings (EPO)

E27.09

....•.. (7 indent ) Capacitor extending under the transistor (EPO)

E27.091

....•.. (7 indent ) Transistor in trench (EPO)

E27.092

....•.. (7 indent ) Capacitor in trench (EPO)

E27.093

....•... (8 indent ) Capacitor extending under or around the transistor (EPO)

E27.094

....•... (8 indent ) Having storage electrode extension stacked over the transistor (EPO)

E27.095

....•.. (7 indent ) Capacitor and transistor in common trench (EPO)

E27.096

....•... (8 indent ) Vertical transistor (EPO)

E27.097

....•. (6 indent ) Peripheral structure (EPO)

E27.098

....• (5 indent ) Static random access memory, SRAM, structure (EPO)

E27.099

....•. (6 indent ) Load element being a MOSFET transistor (EPO)

E27.1

....•.. (7 indent ) Load element being a thin film transistor (EPO)

E27.101

....•. (6 indent ) Load element being a resistor (EPO)

E27.102

....• (5 indent ) Read-only memory, ROM, structure (EPO)

E27.103

....•. (6 indent ) Electrically programmable ROM (EPO)

E27.104

....•.. (7 indent ) Ferroelectric non-volatile memory structure (EPO)

E27.105

.... (4 indent ) Masterslice integrated circuit (EPO)

E27.106

....• (5 indent ) Using bipolar structure (EPO)

E27.107

....• (5 indent ) Using field-effect structure (EPO)

E27.108

....•. (6 indent ) CMOS gate array (EPO)

E27.109

....• (5 indent ) Using combined field-effect/bipolar structure (EPO)

E27.11

....• (5 indent ) Input and output buffer/driver (EPO)

E27.111

.. (2 indent ) Substrate comprising other than a semiconductor material, e.g. insulating substrate or layered substrate Including a non-semiconductor layer (EPO)

E27.112

... (3 indent ) Including insulator on semiconductor, e.g. SOI (silicon on insulator) (EPO)

E27.113

... (3 indent ) Combined with thin-film or thick-film passive component (EPO)

E27.114

. (1 indent ) Including only passive thin-film or thick-film elements on a common insulating substrate (EPO)

E27.115

.. (2 indent ) Thick-film circuits (EPO)

E27.116

.. (2 indent ) Thin-film circuits (EPO)

E27.117

. (1 indent ) Including organic material in active region

E27.118

.. (2 indent ) Including semiconductor components sensitive to infrared radiation, light, or electromagnetic radiation of a shorter wavelength (EPO)

E27.119

.. (2 indent ) Including semiconductor components with at least one potential barrier, surface barrier, or recombination zone adapted for light emission (EPO)

E27.12

. (1 indent ) Including semiconductor component with at least one potential barrier or surface barrier adapted for light emission structurally associated with controlling devices having a variable impedance and not being light sensitive (EPO)

E27.121

.. (2 indent ) In a repetitive configuration (EPO)

E27.122

. (1 indent ) Including active semiconductor component sensitive to infrared radiation, light, or electromagnetic radiation of a shorter wavelength (EPO)

E27.123

.. (2 indent ) Energy conversion device (EPO)

E27.124

... (3 indent ) In a repetitive configuration, e.g. planar multi-junction solar cells (EPO)

E27.125

.... (4 indent ) Including only thin film solar cells deposited on a substrate (EPO)

E27.126

.... (4 indent ) Including multiple vertical junction or V-groove junction solar cells formed in a semiconductor substrate (EPO)

E27.127

.. (2 indent ) Device controlled by radiation (EPO)

E27.128

... (3 indent ) With at least one potential barrier or surface barrier (EPO)

E27.129

.... (4 indent ) In a repetitive configuration (EPO)

E27.13

... (3 indent ) Imager Including structural or functional details of the device (EPO)

E27.131

.... (4 indent ) Geometry or disposition of pixel-elements, address-lines, or gate-electrodes (EPO)

E27.132

.... (4 indent ) Pixel-elements with integrated switching, control, storage, or amplification elements (EPO)

E27.133

.... (4 indent ) Photodiode array or MOS imager (EPO)

E27.134

....• (5 indent ) Color imager (EPO)

E27.135

....•. (6 indent ) Multicolor imager having a stacked pixel-element structure, e.g. npn, npnpn or MQW elements (EPO)

E27.136

....• (5 indent ) Infrared imager (EPO)

E27.137

....•. (6 indent ) Of the hybrid type (e.g., chip-on-chip, bonded substrates) (EPO)

E27.138

....•. (6 indent ) Multispectral infrared imager having a stacked pixel-element structure, e.g., npn, npnpn or MQW structures (EPO)

E27.139

....• (5 indent ) Anti-blooming (EPO)

E27.14

....• (5 indent ) X-ray, gamma-ray, or high energy radiation imager (measuring X-, gamma- or corpuscular radiation) (EPO)

E27.141

.... (4 indent ) Imager using a photoconductor layer (e.g., single photoconductor layer for all pixels) (EPO)

E27.142

....• (5 indent ) Color imager (EPO)

E27.143

....• (5 indent ) Infrared imager (EPO)

E27.144

....•. (6 indent ) Of the hybrid type (e.g., chip-on-chip, bonded substrates) (EPO)

E27.145

....• (5 indent ) Anti-blooming (EPO)

E27.146

....• (5 indent ) X-ray, gamma-ray, or high energy radiation imagers (EPO)

E27.147

.... (4 indent ) Contact-type imager (e.g., contacts document surface) (EPO)

E27.148

.... (4 indent ) Junction field effect transistor (JFET) imager or static induction transistor (SIT) imager (EPO)

E27.149

.... (4 indent ) Bipolar transistor imager (EPO)

E27.15

.... (4 indent ) Charge coupled imager (EPO)

E27.151

....• (5 indent ) Structural or functional details (EPO)

E27.152

....•. (6 indent ) Geometry or disposition of pixel-elements, address lines or gate-electrodes (EPO)

E27.153

....• (5 indent ) Linear CCD imager (EPO)

E27.154

....• (5 indent ) Area CCD imager (EPO)

E27.155

....•. (6 indent ) Frame-interline transfer (EPO)

E27.156

....•. (6 indent ) Interline transfer (EPO)

E27.157

....•. (6 indent ) Frame transfer (EPO)

E27.158

....• (5 indent ) Charge injection device (CID) imager (EPO)

E27.159

....• (5 indent ) CCD or CID color imager (EPO)

E27.16

....• (5 indent ) Infrared CCD or CID imager (EPO)

E27.161

....•. (6 indent ) Of the hybrid type (e.g., chip-on-chip, bonded substrates) (EPO)

E27.162

....• (5 indent ) Anti-blooming (EPO)

E27.163

....• (5 indent ) Including a photoconductive layer deposited on the CCD structure (EPO)

E29.001

SEMICONDUCTORS DEVICES ADAPTED FOR RECTIFYING, AMPLIFYING, OSCILLATING, OR SWITCHING, CAPACITORS, OR RESISTORS WITH AT LEAST ONE POTENTIAL-JUMP BARRIER OR SURFACE BARRIER (EPO)

E29.002

. (1 indent ) Electrical characteristics due to properties of entire semiconductor body rather than just surface region (EPO)

E29.003

.. (2 indent ) Characterized by their crystalline structure (e.g., polycrystalline, cubic) particular orientation of crystalline planes (EPO)

E29.004

... (3 indent ) With specified crystalline planes or axis (EPO)

E29.005

.. (2 indent ) Characterized by specified shape or size of PN junction or by specified impurity concentration gradient within the device (EPO)

E29.006

... (3 indent ) Characterized by particular design considerations to control electrical field effect within device (EPO)

E29.007

.... (4 indent ) For controlling surface leakage or electric field concentration (EPO)

E29.008

....• (5 indent ) For controlling breakdown voltage of reverse biased devices (EPO)

E29.009

....•. (6 indent ) With field relief electrode (field plate) (EPO)

E29.01

....•.. (7 indent ) With at least two field relief electrodes used in combination and not electrically interconnected (EPO)

E29.011

....•... (8 indent ) With one or more field relief electrode comprising resistance material (e.g., semi insulating material, lightly doped poly-silicon) (EPO)

E29.012

....•. (6 indent ) By doping profile or shape or arrangement of the PN junction, or with supplementary regions (e.g., guard ring, LDD, drift region) (EPO)

E29.013

....•.. (7 indent ) With supplementary region doped oppositely to or in rectifying contact with semiconductor containing or contacting region(e.g., guard rings with PN or Schottky junction) (EPO)

E29.014

....•.. (7 indent ) With breakdown supporting region for localizing breakdown or limiting its voltage (EPO)

E29.015

....•. (6 indent ) With insulating layer characterized by dielectric or electrostatic property (e.g., including fixed charge or semi-insulating surface layer) (EPO)

E29.016

....• (5 indent ) For preventing surface leakage due to surface inversion layer (e.g., channel stop) (EPO)

E29.017

....•. (6 indent ) With field relief electrodes acting on insulator potential or insulator charges (EPO)

E29.018

.... (4 indent ) Comprising internal isolation within devices or components (EPO)

E29.019

....• (5 indent ) Isolation by PN junctions (EPO)

E29.02

....• (5 indent ) Isolation by dielectric regions (EPO)

E29.021

....•. (6 indent ) For source or drain region of field-effect device (EPO)

E29.022

... (3 indent ) Characterized by shape of semiconductor body (EPO)

E29.023

.... (4 indent ) Adapted for altering junction breakdown voltage by shape of semiconductor body (EPO)

E29.024

... (3 indent ) Characterized by shape, relative sizes or dispositions of semiconductor regions or junctions between regions (EPO)

E29.025

.... (4 indent ) Characterized by particular shape of junction between semiconductor regions (EPO)

E29.026

.... (4 indent ) Surface layout of device (EPO)

E29.027

....• (5 indent ) Surface layout of MOS gated device (e.g., DMOSFET or IGBT) (EPO)

E29.028

....•. (6 indent ) With a nonplanar gate structure (EPO)

E29.029

... (3 indent ) With semiconductor regions connected to electrode carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (EPO)

E29.03

.... (4 indent ) Emitter regions of bipolar transistors (EPO)

E29.031

....• (5 indent ) Of lateral transistors (EPO)

E29.032

....• (5 indent ) Noninterconnected multiemitter structures (EPO)

E29.033

....• (5 indent ) Of heterojunction bipolar transistors (EPO)

E29.034

.... (4 indent ) Collector regions of bipolar transistors (EPO)

E29.035

....• (5 indent ) Pedestal collectors (EPO)

E29.036

.... (4 indent ) Anode or cathode regions of thyristors or gated bipolar-mode devices (EPO)

E29.037

....• (5 indent ) Anode regions of thyristors or gated bipolar-mode devices (EPO)

E29.038

....• (5 indent ) Cathode regions of thyristors (EPO)

E29.039

.... (4 indent ) Source or drain regions of field-effect devices (EPO)

E29.04

....• (5 indent ) Of field-effect transistors with insulated gate (EPO)

E29.041

....• (5 indent ) Of field-effect transistors with Schottky gate (EPO)

E29.042

.... (4 indent ) Tunneling barrier (EPO)

E29.043

... (3 indent ) With semiconductor regions connected to electrode not carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (EPO)

E29.044

.... (4 indent ) Base region of bipolar transistors (EPO)

E29.045

....• (5 indent ) Of lateral transistors (EPO)

E29.046

.... (4 indent ) Base regions of thyristors (EPO)

E29.047

....• (5 indent ) Anode base regions of thyristors (EPO)

E29.048

....• (5 indent ) Cathode base regions of thyristors (EPO)

E29.049

.... (4 indent ) Channel region of field-effect devices (EPO)

E29.05

....• (5 indent ) Of field-effect transistors (EPO)

E29.051

....•. (6 indent ) With insulated gate (EPO)

E29.052

....•.. (7 indent ) Nonplanar channel (EPO)

E29.053

....•.. (7 indent ) With nonuniform doping structure in channel region surface (EPO)

E29.054

....•... (8 indent ) Doping structure being parallel to channel length (EPO)

E29.055

....•.. (7 indent ) With vertical doping variation (EPO)

E29.056

....•.. (7 indent ) With variation of composition of channel (EPO)

E29.057

....•. (6 indent ) With PN junction gate

E29.058

....• (5 indent ) Of charge coupled devices (EPO)

E29.059

.... (4 indent ) Gate region of field-effect devices with PN junction gate (EPO)

E29.06

.... (4 indent ) Substrate region of field-effect devices (EPO)

E29.061

....• (5 indent ) Of field-effect transistors (EPO)

E29.062

....•. (6 indent ) With insulated gate (EPO)

E29.063

....•.. (7 indent ) With inactive supplementary region (e.g., for preventing punch-through, improving capacity effect or leakage current) (EPO)

E29.064

....•.. (7 indent ) Characterized by contact structure of substrate region (EPO)

E29.065

....• (5 indent ) Of charge coupled devices (EPO)

E29.066

.... (4 indent ) Body region structure of IGFET's with channel containing layer (DMOSFET or IGBT) (EPO)

E29.067

....• (5 indent ) With nonplanar gate structure (EPO)

E29.068

.. (2 indent ) Characterized by materials of semiconductor body (EPO)

E29.069

... (3 indent ) Single quantum well structures (EPO)

E29.07

.... (4 indent ) Quantum wire structures (EPO)

E29.071

.... (4 indent ) Quantum box or quantum dot structures (EPO)

E29.072

... (3 indent ) Structures with periodic or quasi-periodic potential variation, (e.g., multiple quantum wells, superlattices) (EPO)

E29.073

.... (4 indent ) Doping structures (e.g., doping superlattices, nipi-superlattices) (EPO)

E29.074

.... (4 indent ) Structures without potential periodicity in direction perpendicular to major surface of substrate (e.g., lateral superlattice) (EPO)

E29.075

.... (4 indent ) Compositional structures (EPO)

E29.076

....• (5 indent ) With layered structures with quantum effects in vertical direction (EPO)

E29.077

....•. (6 indent ) Comprising at least one long-range structurally disordered material (e.g., one-dimensional vertical amorphous superlattices) (EPO)

E29.078

....•. (6 indent ) Comprising only semiconductor materials (EPO)

E29.079

... (3 indent ) Two or more elements from two or more groups of Periodic Table of elements (e.g., alloys) (EPO)

E29.08

.... (4 indent ) Amorphous materials (EPO)

E29.081

.... (4 indent ) In different semiconductor regions (e.g., heterojunctions) (EPO)

E29.082

... (3 indent ) Only element from fourth group of Periodic System in uncombined form (EPO)

E29.083

.... (4 indent ) Amorphous materials (EPO)

E29.084

.... (4 indent ) Including two or more of elements from fourth group of Periodic System (EPO)

E29.085

....• (5 indent ) In different semiconductor regions (e.g., heterojunctions) (EPO)

E29.086

.... (4 indent ) Further characterized by doping material (EPO)

E29.087

... (3 indent ) Selenium or tellurium only (EPO)

E29.088

.... (4 indent ) Amorphous materials (EPO)

E29.089

... (3 indent ) Only Group III-V compounds (EPO)

E29.09

.... (4 indent ) Including two or more compounds (e.g., alloys) (EPO)

E29.091

....• (5 indent ) In different semiconductor regions (e.g., heterojunctions) (EPO)

E29.092

.... (4 indent ) Amorphous materials (EPO)

E29.093

.... (4 indent ) Further characterized by doping material (EPO)

E29.094

... (3 indent ) Only Group II-VI compounds (EPO)

E29.095

.... (4 indent ) Amorphous materials (EPO)

E29.096

.... (4 indent ) Including two or more compounds (e.g., alloys) (EPO)

E29.097

....• (5 indent ) In different semiconductor regions (e.g., heterojunctions) (EPO)

E29.098

.... (4 indent ) Further characterized by doping material (EPO)

E29.099

.... (4 indent ) CdX compounds being one element of sixth group of Periodic System (EPO)

E29.1

... (3 indent ) Semiconductor materials other than Group IV, selenium, tellurium, or Group III-V compounds (EPO)

E29.101

.... (4 indent ) Amorphous materials (EPO)

E29.102

.... (4 indent ) Group I-VI or I-VII compounds (e.g., Cu 2 O, CuI) (EPO)

E29.103

.... (4 indent ) Pb compounds (e.g., PbO) (EPO)

E29.104

.... (4 indent ) Si compounds (e.g., SiC) (EPO)

E29.105

.. (2 indent ) Characterized by combinations of two or more features of crystalline structure, shape, materials, physical imperfections, and concentration/distribution of impurities in bulk material (EPO)

E29.106

.. (2 indent ) Characterized by physical imperfections; having polished or roughened surface (EPO)

E29.107

... (3 indent ) Imperfections within semiconductor body (EPO)

E29.108

... (3 indent ) Imperfections on surface of semiconductor body (EPO)

E29.109

.. (2 indent ) Characterized by concentration or distribution of impurities in bulk material (EPO)

E29.11

... (3 indent ) Planar doping (e.g., atomic-plane doping, delta-doping) (EPO)

E29.111

. (1 indent ) Electrodes (EPO)

E29.112

.. (2 indent ) Characterized by their shape, relative sizes or dispositions (EPO)

E29.113

... (3 indent ) Carrying current to be rectified, amplified or switched (EPO)

E29.114

.... (4 indent ) Emitter or collector electrodes for bipolar transistors (EPO)

E29.115

.... (4 indent ) Cathode or anode electrodes for thyristors (EPO)

E29.116

.... (4 indent ) Source or drain electrodes for field-effect devices (EPO)

E29.117

....• (5 indent ) For thin film transistors with insulated gate (EPO)

E29.118

....• (5 indent ) For vertical current flow (EPO)

E29.119

....• (5 indent ) For lateral devices where connection to source or drain region is done through at least one part of semiconductor substrate thickness (e.g., with connecting sink or with via-hole) (EPO)

E29.12

....• (5 indent ) Layout configuration for lateral device source or drain region (e.g., cellular, interdigitated or ring structure or being curved or angular) (EPO)

E29.121

....• (5 indent ) Source or drain electrode in groove (EPO)

E29.122

....• (5 indent ) Characterized by relative position of source or drain electrode and gate electrode (EPO)

E29.123

... (3 indent ) Not carrying current to be rectified, amplified, or switched (EPO)

E29.124

.... (4 indent ) Base electrodes for bipolar transistors (EPO)

E29.125

.... (4 indent ) Gate electrodes for thyristors (EPO)

E29.126

.... (4 indent ) Gate stack for field-effect devices (EPO)

E29.127

....• (5 indent ) For field-effect transistors (EPO)

E29.128

....•. (6 indent ) With insulated gate (EPO)

E29.129

....•.. (7 indent ) Gate electrodes for transistors with floating gate (EPO)

E29.13

....•.. (7 indent ) Gate electrodes for nonplanar MOSFET (EPO)

E29.131

....•... (8 indent ) Having drain and source regions at different vertical level having channel composed only of vertical sidewall connecting drain and source layers (EPO)

E29.132

....•.. (7 indent ) Characterized by insulating layer (EPO)

E29.133

....•... (8 indent ) Nonuniform insulating layer thickness (EPO)

E29.134

....•.. (7 indent ) Characterized by configuration of gate electrode layer (EPO)

E29.135

....•... (8 indent ) Characterized by length or sectional shape (EPO)

E29.136

....•... (8 indent ) Characterized by surface lay-out (EPO)

E29.137

....•.. (7 indent ) Characterized by configuration of gate stack of thin film FETs (EPO)

E29.138

....• (5 indent ) For charge coupled devices (EPO)

E29.139

.. (2 indent ) Of specified material (EPO)

E29.14

... (3 indent ) For gate of heterojunction field-effect devices (EPO)

E29.141

... (3 indent ) Resistive materials for field-effect devices (EPO)

E29.142

... (3 indent ) Superconductor materials (EPO)

E29.143

... (3 indent ) Ohmic electrodes (EPO)

E29.144

.... (4 indent ) On Group III-V material (EPO)

E29.145

....• (5 indent ) On thin-film Group III-V material (EPO)

E29.146

.... (4 indent ) On silicon (EPO)

E29.147

....• (5 indent ) For thin-film silicon (EPO)

E29.148

... (3 indent ) Schottky barrier electrodes (EPO)

E29.149

.... (4 indent ) On Group III-V material (EPO)

E29.15

... (3 indent ) Electrodes for IGFET (EPO)

E29.151

.... (4 indent ) For TFT (EPO)

E29.152

.... (4 indent ) With lateral structure (e.g., poly-silicon gate with lateral doping variation or with lateral composition variation or characterized by sidewalls being composed of conductive, resistivity) (EPO)

E29.154

.... (4 indent ) Silicon gate conductor material (EPO)

E29.155

....• (5 indent ) Multiple silicon layers

E29.156

....•. (6 indent ) Including silicide layer contacting silicon layer (EPO)

E29.157

....•. (6 indent ) Including barrier layer between silicon and non-Si electrode

E29.158

.... (4 indent ) Elemental metal gate conductor material (e.g., W, Mo) (EPO)

E29.159

....• (5 indent ) Diverse conductors (EPO)

E29.16

.... (4 indent ) Gate conductor material being compound or alloy material (e.g., organic material, TiN, MoSi 2 ) (EPO)

E29.161

....• (5 indent ) Silicide (EPO)

E29.162

.... (4 indent ) Insulating materials for IGFET (EPO)

E29.164

....• (5 indent ) With at least one ferroelectric layer (EPO)

E29.165

....• (5 indent ) Multiple layers (EPO)

E29.166

. (1 indent ) Types of semiconductor device (EPO)

E29.167

.. (2 indent ) Controllable by plural effects that include variations in magnetic field, mechanical force, or electric current/potential applied to device or one or more electrodes of device (EPO)

E29.168

.. (2 indent ) Quantum effect device (EPO)

E29.169

.. (2 indent ) Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (EPO)

E29.17

... (3 indent ) Memory effect devices (EPO)

E29.171

... (3 indent ) Bipolar device (EPO)

E29.172

.... (4 indent ) Double-base diode (EPO)

E29.173

.... (4 indent ) Transistor-type device (i.e., able to continuously respond to applied control signal)

E29.174

....• (5 indent ) Bipolar junction transistor

E29.175

....•. (6 indent ) Structurally associated with other devices (EPO)

E29.176

....•. (6 indent ) Device being resistive element (e.g., ballasting resistor) (EPO)

E29.177

....•. (6 indent ) Point contact transistors (EPO)

E29.178

....•. (6 indent ) Schottky transistors (EPO)

E29.179

....•. (6 indent ) Tunnel transistors (EPO)

E29.18

....•. (6 indent ) Avalanche transistors (EPO)

E29.181

....•. (6 indent ) Transistors with hook collector (i.e., collector having two layers of opposite conductivity type (e.g., SCR)) (EPO)

E29.182

....•. (6 indent ) Bipolar thin-film transistors (EPO)

E29.183

....•. (6 indent ) Vertical transistor (EPO)

E29.184

....•.. (7 indent ) Having emitter-base and base-collector junctions in same plane (EPO)

E29.185

....•.. (7 indent ) Having emitter-base junction and base-collector junction on different surfaces (e.g., mesa planar transistor) (EPO)

E29.186

....•.. (7 indent ) Inverse vertical transistor (EPO)

E29.187

....•. (6 indent ) Lateral transistor (EPO)

E29.188

....•. (6 indent ) Hetero-junction transistor (EPO)

E29.189

....•.. (7 indent ) Vertical transistors (EPO)

E29.19

....•... (8 indent ) Having two-dimensional base (e.g., modulation-doped base, inversion layer base, delta-doped base) (EPO)

E29.191

....•... (8 indent ) Having emitter comprising one or more nonmonocrystalline elements of Group IV (e.g., amorphous silicon) alloys comprising Group IV elements (EPO)

E29.192

....•... (8 indent ) Resonant tunneling transistors (EPO)

E29.193

....•... (8 indent ) Comprising lattice mismatched active layers (e.g., SiGe strained layer transistors) (EPO)

E29.194

....• (5 indent ) Controlled by field effect (e.g., bipolar static induction transistor (BSIT)) (EPO)

E29.195

....•. (6 indent ) Gated diode structure (EPO)

E29.196

....•.. (7 indent ) With PN junction gate (e.g., field-controlled thyristor (FCTh), static induction thyristor (SITh)) (EPO)

E29.197

....•. (6 indent ) Insulated gate bipolar mode transistor (e.g., IGBT; IGT; COMFET) (EPO)

E29.198

....•.. (7 indent ) Transistor with vertical current flow (EPO)

E29.199

....•... (8 indent ) With both emitter and collector contacts in same substrate side (EPO)

E29.2

....•... (8 indent ) With nonplanar surface (e.g., with nonplanar gate or with trench or recess or pillar in surface of emitter, base, or collector region for improving current density or short-circuiting emitter and base regions) (EPO)

E29.201

....•.... (9 indent ) And gate structure lying on slanted or vertical surface or formed in groove (e.g., trench gate IGBT) (EPO)

E29.202

....•.. (7 indent ) Thin-film device (EPO)

E29.211

.... (4 indent ) Thyristor-type device (e.g., having four-zone regenerative action) (EPO)

E29.212

....• (5 indent ) Gate-turn-off device (EPO)

E29.213

....•. (6 indent ) With turn off by field effect (EPO)

E29.214

....•.. (7 indent ) Produced by insulated gate structure (EPO)

E29.215

....• (5 indent ) Bidirectional device (e.g., triac) (EPO)

E29.216

....• (5 indent ) With turn on by field effect (EPO)

E29.217

....• (5 indent ) Combined structurally with at least one other device (EPO)

E29.218

....•. (6 indent ) Combined with capacitor or resistor (EPO)

E29.219

....•. (6 indent ) Combined with diode (EPO)

E29.22

....•.. (7 indent ) Antiparallel diode (EPO)

E29.221

....•. (6 indent ) Combined with field-effect transistor (EPO)

E29.222

....• (5 indent ) Having built-in localized breakdown/breakover region (EPO)

E29.223

....• (5 indent ) Having amplifying gate structure (e.g., Darlington configuration) (EPO)

E29.224

....• (5 indent ) Asymmetrical thyristor (EPO)

E29.225

....• (5 indent ) Lateral thyristor (EPO)

E29.226

... (3 indent ) Unipolar device (EPO)

E29.227

.... (4 indent ) Charge transfer device (EPO)

E29.228

....• (5 indent ) Charge-coupled device (EPO)

E29.229

....•. (6 indent ) With field effect produced by insulated gate (EPO)

E29.23

....•.. (7 indent ) Input structure (EPO)

E29.231

....•.. (7 indent ) Output structure (EPO)

E29.232

....•.. (7 indent ) Structure for improving output signal (EPO)

E29.233

....•.. (7 indent ) Buried channel CCD (EPO)

E29.234

....•... (8 indent ) Two-phase CCD (EPO)

E29.235

....•... (8 indent ) Three-phase CCD (EPO)

E29.236

....•... (8 indent ) Four-phase CCD (EPO)

E29.237

....•.. (7 indent ) Surface channel CCD (EPO)

E29.238

....•... (8 indent ) Two-phase CCD (EPO)

E29.239

....•... (8 indent ) Three-phase CCD (EPO)

E29.24

....•... (8 indent ) Four-phase CCD (EPO)

E29.241

.... (4 indent ) Hot electron transistor (HET) or metal base transistor (MBT) (EPO)

E29.242

.... (4 indent ) Field-effect transistor (EPO)

E29.243

....• (5 indent ) Using static field induced region (e.g., SIT, PBT) (EPO)

E29.244

....• (5 indent ) Velocity modulations transistor (i.e., VMT) (EPO)

E29.245

....• (5 indent ) With one-dimensional charge carrier gas channel (e.g., quantum wire FET) (EPO)

E29.246

....• (5 indent ) With two-dimensional charge carrier gas channel (e.g., HEMT; with two-dimensional charge-carrier layer formed at heterojunction interface) (EPO)

E29.247

....•. (6 indent ) With inverted single heterostructure (i.e., with active layer formed on top of wide bandgap layer (e.g., IHEMT)) (EPO)

E29.248

....•. (6 indent ) With confinement of carriers by at least two heterojunctions (e.g., DHHEMT, quantum well HEMT, DHMODFET) (EPO)

E29.249

....•.. (7 indent ) Using Group III-V semiconductor material (EPO)

E29.25

....•... (8 indent ) With more than one donor layer (EPO)

E29.251

....•... (8 indent ) With delta or planar doped donor layer (EPO)

E29.252

....•. (6 indent ) With direct single heterostructure (i.e., with wide bandgap layer formed on top of active layer (e.g., direct single heterostructure MIS-like HEMT)) (EPO)

E29.253

....•.. (7 indent ) With wide bandgap charge-carrier supplying layer (e.g., direct single heterostructure MODFET) (EPO)

E29.254

....• (5 indent ) With delta-doped channel (EPO)

E29.255

....• (5 indent ) With field effect produced by insulated gate (EPO)

E29.256

....•. (6 indent ) With channel containing layer contacting drain drift region (e.g., DMOS transistor) (EPO)

E29.257

....•.. (7 indent ) Having vertical bulk current component or current vertically following trench gate (e.g., vertical power DMOS transistor) (EPO)

E29.258

....•... (8 indent ) With both source and drain contacts in same substrate side (EPO)

E29.259

....•... (8 indent ) With nonplanar surface (EPO)

E29.26

....•.... (9 indent ) Channel structure lying under slanted or vertical surface or being formed along surface of groove (e.g., trench gate DMOSFET) (EPO)

E29.261

....•.. (7 indent ) With at least part of active region on insulating substrate (e.g., lateral DMOS in oxide isolated well) (EPO)

E29.262

....•. (6 indent ) Vertical transistor (EPO)

E29.263

....•. (6 indent ) Comprising gate-to-body connection (i.e., bulk dynamic threshold voltage MOSFET) (EPO)

E29.264

....•. (6 indent ) With multiple gate structure (EPO)

E29.265

....•.. (7 indent ) Structure comprising MOS gate and at least one non-MOS gate (e.g., JFET or MESFET gate) (EPO)

E29.266

....•. (6 indent ) With lightly doped drain or source extension (EPO)

E29.267

....•.. (7 indent ) With nonplanar structure (e.g., gate or source or drain being nonplanar) (EPO)

E29.268

....•.. (7 indent ) Source region and drain region having nonsymmetrical structure about gate electrode (EPO)

E29.269

....•.. (7 indent ) With overlap between lightly doped extension and gate electrode (EPO)

E29.27

....•. (6 indent ) With buried channel (EPO)

E29.271

....•. (6 indent ) With Schottky drain or source contact (EPO)

E29.272

....•. (6 indent ) Gate comprising ferroelectric layer (EPO)

E29.273

....•. (6 indent ) Thin-film transistor (EPO)

E29.274

....•.. (7 indent ) Vertical transistor (EPO)

E29.275

....•.. (7 indent ) With multiple gates (EPO)

E29.276

....•.. (7 indent ) With supplementary region or layer in thin film or in insulated bulk substrate supporting it for controlling or increasing voltage resistance of device (EPO)

E29.277

....•... (8 indent ) Characterized by drain or source properties (EPO)

E29.278

....•.... (9 indent ) With LDD structure or extension or offset region or characterized by doping profile (EPO)

E29.279

....•....• (10 indent ) Asymmetrical source and drain regions (EPO)

E29.28

....•... (8 indent ) For preventing leakage current (EPO)

E29.281

....•... (8 indent ) For preventing kink or snapback effect (e.g., discharging minority carriers of channel region for preventing bipolar effect) (EPO)

E29.282

....•... (8 indent ) With light shield (EPO)

E29.283

....•... (8 indent ) With supplementary region or layer for improving flatness of device (EPO)

E29.284

....•... (8 indent ) With drain or source connected to bulk conducting substrate (EPO)

E29.285

....•.. (7 indent ) Silicon transistor (EPO)

E29.286

....•... (8 indent ) Monocrystalline only (EPO)

E29.287

....•.... (9 indent ) SOS transistor (EPO)

E29.288

....•... (8 indent ) Nonmonocrystalline (EPO)

E29.289

....•.... (9 indent ) Amorphous silicon transistor (EPO)

E29.29

....•....• (10 indent ) With top gate (EPO)

E29.291

....•....• (10 indent ) With inverted transistor structure (EPO)

E29.292

....•.... (9 indent ) Polycrystalline or microcrystalline silicon transistor (EPO)

E29.293

....•....• (10 indent ) With top gate (EPO)

E29.294

....•....• (10 indent ) With inverted transistor structure (EPO)

E29.295

....•.. (7 indent ) Characterized by insulating substrate or support (EPO)

E29.296

....•.. (7 indent ) Comprising Group III-V or II-VI compound, or of Se, Te, or oxide semiconductor (EPO)

E29.297

....•.. (7 indent ) Comprising Group IV non-Si semiconductor materials or alloys (e.g., Ge, SiN alloy, SiC alloy) (EPO)

E29.298

....•... (8 indent ) With multilayer structure or superlattice structure (EPO)

E29.299

....•.. (7 indent ) Characterized by property or structure of channel or contact thereto (EPO)

E29.3

....•. (6 indent ) With floating gate (EPO)

E29.301

....•.. (7 indent ) Programmable by two single electrons (EPO)

E29.302

....•.. (7 indent ) Hi-lo programming levels only (EPO)

E29.303

....•... (8 indent ) Charging by injection of carriers through conductive insulator (e.g., Poole-Frankel conduction) (EPO)

E29.304

....•... (8 indent ) Charging by tunneling of carriers (e.g., Fowler-Nordheim tunneling) (EPO)

E29.305

....•... (8 indent ) Charging by hot carrier injection (EPO)

E29.306

....•.... (9 indent ) Hot carrier injection from channel (EPO)

E29.307

....•.... (9 indent ) Hot carrier produced by avalanche breakdown of PN junction (e.g., FAMOS) (EPO)

E29.308

....•.. (7 indent ) Programmable with more than two possible different levels (EPO)

E29.309

....•. (6 indent ) With charge trapping gate insulator (e.g., MNOS-memory transistors) (EPO)

E29.31

....• (5 indent ) With field effect produced by PN or other rectifying junction gate (i.e., potential barrier) (EPO)

E29.311

....•. (6 indent ) With Schottky drain or source contact (EPO)

E29.312

....•. (6 indent ) With PN junction gate (e.g., PN homojunction gate) (EPO)

E29.313

....•.. (7 indent ) Vertical transistors (EPO)

E29.314

....•.. (7 indent ) Thin-film JFET (EPO)

E29.315

....•. (6 indent ) With heterojunction gate (e.g., transistors with semiconductor layer acting as gate insulating layer) (EPO)

E29.316

....•.. (7 indent ) Programmable transistor (e.g., with charge-trapping quantum well) (EPO)

E29.317

....•. (6 indent ) With Schottky gate (EPO)

E29.318

....•.. (7 indent ) Vertical transistors (EPO)

E29.319

....•.. (7 indent ) With multiple gate (EPO)

E29.32

....•.. (7 indent ) Thin-film MESFET (EPO)

E29.321

....•.. (7 indent ) With recessed gate (EPO)

E29.322

.... (4 indent ) Single electron transistors: Coulomb blockade device (EPO)

E29.323

.. (2 indent ) Controllable by variation of magnetic field applied to device (EPO)

E29.324

.. (2 indent ) Controllable by variation of applied mechanical force (e.g., of pressure) (EPO)

E29.325

.. (2 indent ) Controllable only by variation of electric current supplied or only electric potential applied to electrode carrying current to be rectified, amplified, oscillated, or switched (EPO)

E29.326

... (3 indent ) Resistor with PN junction (EPO)

E29.327

... (3 indent ) Diode (EPO)

E29.328

.... (4 indent ) Planar PN junction diode (EPO)

E29.329

.... (4 indent ) Mesa PN junction diode (EPO)

E29.33

.... (4 indent ) Hi-lo semiconductor device (e.g., memory device) (EPO)

E29.331

.... (4 indent ) Charge trapping diode (EPO)

E29.332

.... (4 indent ) Punchthrough diode (i.e., with bulk potential barrier (e.g., camel diode, planar doped barrier diode, graded bandgap diode)) (EPO)

E29.333

.... (4 indent ) Point contact diode (EPO)

E29.334

.... (4 indent ) Transit-time diode (e.g., IMPATT, TRAPATT diode) (EPO)

E29.335

.... (4 indent ) Avalanche diode (e.g., Zener diode) (EPO)

E29.336

.... (4 indent ) PIN diode (EPO)

E29.337

.... (4 indent ) Thyristor diode (i.e., having only two terminals and no control electrode (e.g., Shockley diode, break-over diode)) (EPO)

E29.338

.... (4 indent ) Schottky diode (EPO)

E29.339

.... (4 indent ) Tunneling diode (EPO)

E29.34

....• (5 indent ) Resonant tunneling diode (i.e., RTD, RTBD) (EPO)

E29.341

....• (5 indent ) Esaki diode (EPO)

E29.342

... (3 indent ) Capacitor with potential barrier or surface barrier (EPO)

E29.343

.... (4 indent ) Conductor-insulator-conductor capacitor on semiconductor substrate (EPO)

E29.344

.... (4 indent ) Variable capacitance diode (e.g., varactors) (EPO)

E29.345

.... (4 indent ) Metal-insulator-semiconductor (e.g., MOS capacitor) (EPO)

E29.346

....• (5 indent ) Trench capacitor (EPO)

E29.347

.. (2 indent ) Controllable by thermal signal (e.g., IR) (EPO)

E45.001

SOLID-STATE DEVICES ADAPTED FOR RECTIFYING, AMPLIFYING, OSCILLATING, OR SWITCHING WITHOUT POTENTIAL-JUMP BARRIER OR SURFACE BARRIER, E.G., DIELECTRIC TRIODES; OVSHINSKY-EFFECT DEVICES, PROCESSES, OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT THEREOF, OR OF PARTS THEREOF (EPO)

E45.002

. (1 indent ) Bistable switching devices, e.g., Ovshinsky-effect devices (EPO)

E45.003

.. (2 indent ) Switching materials being oxides or nitrides (EPO)

E45.004

.. (2 indent ) N: Light-controlled Ovshinsky devices (EPO)

E45.005

. (1 indent ) Charge density wave transport devices (EPO)

E45.006

. (1 indent ) Solid-state travelling-wave devices (EPO)

E25.001

ASSEMBLIES CONSISTING OF PLURALITY OF INDIVIDUAL SEMICONDUCTOR OR OTHER SOLID-STATE DEVICES (EPO)

E25.002

. (1 indent ) All devices being of same type, e.g., assemblies of rectifier diodes (EPO)

E25.003

.. (2 indent ) Devices not having separate containers (EPO)

E25.004

... (3 indent ) Devices responsive or sensitive to electromagnetic radiation, e.g., infrared radiation, adapted for conversion of radiation into electrical energy or for control of electrical energy by such radiation (EPO)

E25.005

.... (4 indent ) Devices being arranged next to each other (EPO)

E25.006

.... (4 indent ) Stacked arrangements of devices (EPO)

E25.007

....• (5 indent ) Devices being solar cells (EPO)

E25.008

... (3 indent ) Organic solid-state devices (EPO)

E25.009

.... (4 indent ) Devices responsive or sensitive to electromagnetic radiation, e.g., infrared radiation, adapted for conversion of radiation into electrical energy or for control of electrical energy by such radiation, e.g., photovoltaic modules based on organic solar cells (EPO)

E25.01

... (3 indent ) Device consisting of plurality of semiconductor or other solid state devices or components formed in or on common substrate, e.g., integrated circuit device (EPO)

E25.011

.... (4 indent ) Devices being arranged next and on each other, i.e., mixed assemblies (EPO)

E25.012

.... (4 indent ) Devices being arranged next to each other (EPO)

E25.013

.... (4 indent ) Stacked arrangements of devices (EPO)

E25.014

... (3 indent ) Semiconductor devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (EPO)

E25.015

.... (4 indent ) Devices being arranged next and on each other, i.e., mixed assemblies (EPO)

E25.016

.... (4 indent ) Devices being arranged next to each other (EPO)

E25.017

.... (4 indent ) Apertured devices mounted on one or more rods passed through apertures (EPO)

E25.018

.... (4 indent ) Stacked arrangements of nonapertured devices (EPO)

E25.019

... (3 indent ) Incoherent light-emitting semiconductor devices having potential or surface barrier (EPO)

E25.02

.... (4 indent ) Devices being arranged next to each other (EPO)

E25.021

.... (4 indent ) Stacked arrangements of devices (EPO)

E25.022

.. (2 indent ) Devices having separate containers (EPO)

E25.023

... (3 indent ) Device consisting of plurality of semiconductor or other solid-state devices or components formed in or on common substrate, e.g., integrated circuit device (EPO)

E25.024

... (3 indent ) Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (EPO)

E25.025

.... (4 indent ) Mixed assemblies (EPO)

E25.026

.... (4 indent ) Devices being arranged next to each other (EPO)

E25.027

.... (4 indent ) Stacked arrangements of devices (EPO)

E25.028

... (3 indent ) Incoherent light-emitting semiconductor devices having potential or surface barrier (EPO)

E25.029

. (1 indent ) Devices being of two or more types, e.g., forming hybrid circuits (EPO)

E25.03

.. (2 indent ) Devices being mounted on two or more different substrates (EPO)

E25.031

.. (2 indent ) Containers (EPO)

E25.032

.. (2 indent ) Comprising optoelectronic devices, e.g., LED, photodiodes (EPO)

E23.001

PACKAGING, INTERCONNECTS, AND MARKINGS FOR SEMICONDUCTOR OR OTHER SOLID-STATE DEVICES (EPO)

E23.002

. (1 indent ) Details not otherwise provided for, e.g., protection against moisture (EPO)

E23.003

. (1 indent ) Mountings, e.g., nondetachable insulating substrates (EPO)

E23.004

.. (2 indent ) Characterized by shape (EPO)

E23.005

.. (2 indent ) Characterized by material or its electrical properties (EPO)

E23.006

... (3 indent ) Metallic substrates having insulating layers (EPO)

E23.007

... (3 indent ) Organic substrates, e.g., plastic (EPO)

E23.008

... (3 indent ) Semiconductor insulating substrates (EPO)

E23.009

... (3 indent ) Ceramic or glass substrates (EPO)

E23.01

. (1 indent ) Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (EPO)

E23.011

.. (2 indent ) Internal lead connections, e.g., via connections, feedthrough structures (EPO)

E23.012

.. (2 indent ) Consisting of lead-in layers inseparably applied to semiconductor body (EPO)

E23.013

... (3 indent ) Bridge structure with air gap (EPO)

E23.014

... (3 indent ) Beam leads (EPO)

E23.015

... (3 indent ) Pads with extended contours, e.g., grid structure, branch structure, finger structure (EPO)

E23.016

... (3 indent ) For devices consisting of semiconductor layers on insulating or semi-insulating substrates, e.g., silicon on sapphire devices, i.e., SOS (EPO)

E23.017

... (3 indent ) Materials (EPO)

E23.018

.... (4 indent ) Conductive organic material or pastes, e.g., conductive adhesives, inks (EPO)

E23.019

... (3 indent ) Consisting of layered constructions comprising conductive layers and insulating layers, e.g., planar contacts (EPO)

E23.02

.... (4 indent ) Bonding areas, e.g., pads (EPO)

E23.021

.... (4 indent ) Bump or ball contacts (EPO)

E23.022

.... (4 indent ) Overhang structure (EPO)

E23.023

.. (2 indent ) Consisting of soldered or bonded constructions (EPO)

E23.024

... (3 indent ) Wire-like arrangements or pins or rods (EPO)

E23.025

.... (4 indent ) Characterized by materials of wires or their coatings (EPO)

E23.026

... (3 indent ) Bases or plates or solder therefor (EPO)

E23.027

.... (4 indent ) Having heterogeneous or anisotropic structure (EPO)

E23.028

.... (4 indent ) Characterized by material (EPO)

E23.029

....• (5 indent ) Semiconductor (EPO)

E23.03

....• (5 indent ) Carbon (EPO)

E23.031

... (3 indent ) Lead frames or other flat leads (EPO)

E23.032

.... (4 indent ) Additional leads (EPO)

E23.033

....• (5 indent ) Additional leads being bump or wire (EPO)

E23.034

....• (5 indent ) Additional leads being tape carrier or flat leads (EPO)

E23.035

....• (5 indent ) Additional leads being multilayer (EPO)

E23.036

....• (5 indent ) Additional leads being wiring board (EPO)

E23.037

.... (4 indent ) Characterized by die pad (EPO)

E23.038

....• (5 indent ) Insulative substrate being used as die pad, e.g., ceramic, plastic (EPO)

E23.039

....• (5 indent ) Chip-on-leads or leads-on-chip techniques, i.e., inner lead fingers being used as die pad (EPO)

E23.04

....• (5 indent ) Having bonding material between chip and die pad (EPO)

E23.041

.... (4 indent ) Multilayer (EPO)

E23.042

.... (4 indent ) Plurality of lead frames mounted in one device (EPO)

E23.043

.... (4 indent ) Geometry of lead frame (EPO)

E23.044

....• (5 indent ) For devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (EPO)

E23.045

....• (5 indent ) Deformation absorbing parts in lead frame plane, e.g., meanderline shape (EPO)

E23.046

....• (5 indent ) Cross-section geometry (EPO)

E23.047

....•. (6 indent ) Characterized by bent parts (EPO)

E23.048

....•.. (7 indent ) Bent parts being outer leads (EPO)

E23.049

....• (5 indent ) Insulating layers on lead frame, e.g., bridging members (EPO)

E23.05

....•. (6 indent ) Side rails of lead frame, e.g., with perforations, sprocket holes (EPO)

E23.051

.... (4 indent ) Specifically adapted to facilitate heat dissipation (EPO)

E23.052

.... (4 indent ) Assembly of semiconductor devices on lead frame (EPO)

E23.053

.... (4 indent ) Characterized by materials of lead frames or layers thereon (EPO)

E23.054

....• (5 indent ) Metallic layers on lead frames (EPO)

E23.055

.... (4 indent ) Consisting of thin flexible metallic tape with or without film carrier (EPO)

E23.056

.... (4 indent ) Insulating layers on lead frames (EPO)

E23.057

.... (4 indent ) Capacitor integral with or on lead frame (EPO)

E23.058

.... (4 indent ) Battery in combination with lead frame (EPO)

E23.059

.... (4 indent ) Oscillators in combination with lead frame (EPO)

E23.06

... (3 indent ) Leads, i.e., metallizations or lead frames on insulating substrates, e.g., chip carriers (EPO)

E23.061

.... (4 indent ) Leads being also applied on sidewalls or bottom of substrate, e.g., leadless packages for surface mounting (EPO)

E23.062

.... (4 indent ) Multilayer substrates (EPO)

E23.063

.... (4 indent ) Chip support structure consisting of plurality of insulating substrates (EPO)

E23.064

.... (4 indent ) For flat cards, e.g., credit cards (EPO)

E23.065

.... (4 indent ) Flexible insulating substrates (EPO)

E23.066

.... (4 indent ) Lead frames fixed on or encapsulated in insulating substrates (EPO)

E23.067

.... (4 indent ) Via connections through substrates, e.g., pins going through substrate, coaxial cables (EPO)

E23.068

.... (4 indent ) Additional leads joined to metallizations on insulating substrate, e.g., pins, bumps, wires, flat leads (EPO)

E23.069

....• (5 indent ) Spherical bumps on substrate for external connection, e.g., ball grid arrays (BGA) (EPO)

E23.07

.... (4 indent ) Geometry or layout (EPO)

E23.071

....• (5 indent ) For devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (EPO)

E23.072

.... (4 indent ) Characterized by materials (EPO)

E23.073

....• (5 indent ) Conductive materials containing semiconductor material (EPO)

E23.074

....• (5 indent ) Carbon, e.g., fullerenes (EPO)

E23.075

....• (5 indent ) Conductive materials containing organic materials or pastes, e.g., for thick films (EPO)

E23.076

....• (5 indent ) Conductive materials containing superconducting material (EPO)

E23.077

....• (5 indent ) Materials of insulating layers or coatings (EPO)

E23.078

.. (2 indent ) Flexible arrangements, e.g., pressure contacts without soldering (EPO)

E23.079

.. (2 indent ) For integrated circuit devices, e.g., power bus, number of leads (EPO)

E23.08

. (1 indent ) Arrangements for cooling, heating, ventilating or temperature compensation; temperature-sensing arrangements (EPO)

E23.081

.. (2 indent ) Arrangements for heating (EPO)

E23.082

.. (2 indent ) Cooling arrangements using Peltier effect (EPO)

E23.083

.. (2 indent ) Mountings or securing means for detachable cooling or heating arrangements; fixed by friction, plugs or springs (EPO)

E23.084

... (3 indent ) With bolts or screws (EPO)

E23.085

.... (4 indent ) For stacked arrangements of plurality of semiconductor devices (EPO)

E23.086

... (3 indent ) Snap-on arrangements, e.g., clips (EPO)

E23.087

.. (2 indent ) Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling (EPO)

E23.088

... (3 indent ) Cooling by change of state, e.g., use of heat pipes (EPO)

E23.089

.... (4 indent ) By melting or evaporation of solids (EPO)

E23.09

... (3 indent ) Auxiliary members in containers characterized by their shape, e.g., pistons (EPO)

E23.091

.... (4 indent ) Bellows (EPO)

E23.092

.... (4 indent ) Auxiliary members in encapsulations (EPO)

E23.093

.... (4 indent ) In combination with jet impingement (EPO)

E23.094

.... (4 indent ) Pistons, e.g., spring-loaded members (EPO)

E23.095

.. (2 indent ) Complete device being wholly immersed in fluid other than air (EPO)

E23.096

... (3 indent ) Fluid being liquefied gas, e.g., in cryogenic vessel (EPO)

E23.097

.. (2 indent ) Involving transfer of heat by flowing fluids (EPO)

E23.098

... (3 indent ) By flowing liquids (EPO)

E23.099

... (3 indent ) By flowing gases, e.g., air (EPO)

E23.1

.... (4 indent ) Jet impingement (EPO)

E23.101

.. (2 indent ) Selection of materials, or shaping, to facilitate cooling or heating, e.g., heat sinks (EPO)

E23.102

... (3 indent ) Cooling facilitated by shape of device (EPO)

E23.103

.... (4 indent ) Foil-like cooling fins or heat sinks (EPO)

E23.104

.... (4 indent ) Characterized by shape of housing (EPO)

E23.105

.... (4 indent ) Wire-like or pin-like cooling fins or heat sinks (EPO)

E23.106

... (3 indent ) Laminates or multilayers, e.g., direct bond copper ceramic substrates (EPO)

E23.107

.... (4 indent ) Organic materials with or without thermo-conductive filler (EPO)

E23.108

.... (4 indent ) Semiconductor materials (EPO)

E23.109

.... (4 indent ) Metallic materials (EPO)

E23.11

... (3 indent ) Cooling facilitated by selection of materials for device (or materials for thermal expansion adaptation, e.g., carbon) (EPO)

E23.111

.... (4 indent ) Diamond (EPO)

E23.112

.... (4 indent ) Having heterogeneous or anisotropic structure, e.g., powder or fibers in matrix, wire mesh, porous structures (EPO)

E23.113

.... (4 indent ) Ceramic materials or glass (EPO)

E23.114

. (1 indent ) Protection against radiation, e.g., light, electromagnetic waves (EPO)

E23.115

.. (2 indent ) Against alpha rays (EPO)

E23.116

. (1 indent ) Encapsulations, e.g., encapsulating layers, coatings, e.g., for protection (EPO)

E23.117

.. (2 indent ) Characterized by material, e.g., carbon (EPO)

E23.118

... (3 indent ) Oxides or nitrides or carbides, e.g., ceramics, glass (EPO)

E23.119

... (3 indent ) Organic, e.g., plastic, epoxy (EPO)

E23.12

.... (4 indent ) Organo-silicon compounds, e.g., silicone (EPO)

E23.121

.... (4 indent ) Containing filler (EPO)

E23.122

... (3 indent ) Semiconductor material, e.g., amorphous silicon (EPO)

E23.123

.. (2 indent ) Characterized by arrangement or shape (EPO)

E23.124

... (3 indent ) Device being completely enclosed (EPO)

E23.125

.... (4 indent ) Substrate forming part of encapsulation (EPO)

E23.126

.... (4 indent ) Double encapsulation or coating and encapsulation (EPO)

E23.127

.... (4 indent ) Sealing arrangements between parts, e.g., adhesion promoters (EPO)

E23.128

.... (4 indent ) Encapsulation having cavity (EPO)

E23.129

... (3 indent ) Partial encapsulation or coating (EPO)

E23.13

.... (4 indent ) Coating being foil (EPO)

E23.131

.... (4 indent ) Coating or filling in grooves made in semiconductor body (EPO)

E23.132

.... (4 indent ) Coating being directly applied to semiconductor body, e.g., passivation layer (EPO)

E23.133

.... (4 indent ) Coating also covering sidewalls of semiconductor body (EPO)

E23.134

.... (4 indent ) Multilayer coating (EPO)

E23.135

. (1 indent ) Fillings or auxiliary members in containers or encapsulations, e.g., centering rings (EPO)

E23.136

.. (2 indent ) Fillings characterized by material, its physical or chemical properties, or its arrangement within complete device (EPO)

E23.137

... (3 indent ) Including materials for absorbing or reacting with moisture or other undesired substances, e.g., getters (EPO)

E23.138

... (3 indent ) Gaseous at normal operating temperature of device (EPO)

E23.139

... (3 indent ) Liquid at normal operating temperature of device (EPO)

E23.14

... (3 indent ) Solid or gel at normal operating temperature of device (EPO)

E23.141

. (1 indent ) Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (EPO)

E23.142

.. (2 indent ) Including external interconnections consisting of multilayer structure of conductive and insulating layers inseparably formed on semiconductor body (EPO)

E23.143

... (3 indent ) Crossover interconnections (EPO)

E23.144

... (3 indent ) Capacitive arrangements or effects of, or between wiring layers (EPO)

E23.145

... (3 indent ) Via connections in multilevel interconnection structure (EPO)

E23.146

... (3 indent ) With adaptable interconnections (EPO)

E23.147

.... (4 indent ) Comprising antifuses, i.e., connections having their state changed from nonconductive to conductive (EPO)

E23.148

....• (5 indent ) Change of state resulting from use of external beam, e.g., laser beam or ion beam (EPO)

E23.149

.... (4 indent ) Comprising fuses, i.e., connections having their state changed from conductive to nonconductive (EPO)

E23.15

....• (5 indent ) Change of state resulting from use of external beam, e.g., laser beam or ion beam (EPO)

E23.151

... (3 indent ) Geometry or layout of interconnection structure (EPO)

E23.152

.... (4 indent ) Cross-sectional geometry (EPO)

E23.153

.... (4 indent ) Arrangements of power or ground buses (EPO)

E23.154

... (3 indent ) Characterized by materials (EPO)

E23.155

.... (4 indent ) Conductive materials (EPO)

E23.156

....• (5 indent ) Containing superconducting materials (EPO)

E23.157

....• (5 indent ) Based on metals, e.g., alloys, metal silicides (EPO)

E23.158

....•. (6 indent ) Principal metal being aluminum (EPO)

E23.159

....•.. (7 indent ) Aluminum alloys (EPO)

E23.16

....•.. (7 indent ) Additional layers associated with aluminum layers, e.g., adhesion, barrier, cladding layers (EPO)

E23.161

....•. (6 indent ) Principal metal being copper (EPO)

E23.162

....•. (6 indent ) Principal metal being noble metal, e.g., gold (EPO)

E23.163

....•. (6 indent ) Principal metal being refractory metal (EPO)

E23.164

....• (5 indent ) Containing semiconductor material, e.g., polysilicon (EPO)

E23.165

....• (5 indent ) Containing carbon, e.g., fullerenes (EPO)

E23.166

....• (5 indent ) Containing conductive organic materials or pastes, e.g., conductive adhesives, inks (EPO)

E23.167

.... (4 indent ) Insulating materials (EPO)

E23.168

.. (2 indent ) Including internal interconnections, e.g., cross-under constructions (EPO)

E23.169

.. (2 indent ) Interconnection structure between plurality of semiconductor chips being formed on or in insulating substrates (EPO)

E23.17

... (3 indent ) Crossover interconnections, e.g., bridge stepovers (EPO)

E23.171

... (3 indent ) Adaptable interconnections, e.g., for engineering changes (EPO)

E23.172

... (3 indent ) Assembly of plurality of insulating substrates (EPO)

E23.173

... (3 indent ) Multilayer substrates (EPO)

E23.174

... (3 indent ) Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (EPO)

E23.175

... (3 indent ) Geometry or layout of interconnection structure (EPO)

E23.176

... (3 indent ) For flat cards, e.g., credit cards (EPO)

E23.177

... (3 indent ) Flexible insulating substrates (EPO)

E23.178

... (3 indent ) Chips being integrally enclosed by interconnect and support structures (EPO)

E23.179

. (1 indent ) Marks applied to semiconductor devices or parts, e.g., registration marks, test patterns, alignment structures, wafer maps (EPO)

E23.18

. (1 indent ) Containers; seals (EPO)

E23.181

.. (2 indent ) Characterized by shape of container or parts, e.g., caps, walls (EPO)

E23.182

... (3 indent ) Container being hollow construction having no base used as mounting for semiconductor body (EPO)

E23.183

... (3 indent ) Container being hollow construction and having conductive base as mounting as well as lead for the semiconductor body (EPO)

E23.184

.... (4 indent ) Other leads having insulating passage through base (EPO)

E23.185

.... (4 indent ) Other leads being parallel to base (EPO)

E23.186

.... (4 indent ) Other leads being perpendicular to base (EPO)

E23.187

.... (4 indent ) Another lead being formed by cover plate parallel to base plate, e.g., sandwich type (EPO)

E23.188

... (3 indent ) Container being hollow construction and having insulating or insulated base as mounting for semiconductor body (EPO)

E23.189

.... (4 indent ) Leads being parallel to base (EPO)

E23.19

.... (4 indent ) Leads having passage through base (EPO)

E23.191

.. (2 indent ) Characterized by material of container or its electrical properties (EPO)

E23.192

... (3 indent ) Material being electrical insulator, e.g., glass (EPO)

E23.193

.. (2 indent ) Characterized by material or arrangement of seals between parts, e.g., between cap and base of container or between leads and walls of container (EPO)

E23.194

. (1 indent ) Protection against mechanical damage (EPO)

E49.001

SOLID-STATE DEVICES WITH AT LEAST ONE POTENTIAL-JUMP BARRIER OR SURFACE BARRIER USING ACTIVE LAYER OF LOWER ELECTRICAL CONDUCTIVITY THAN MATERIAL ADJACENT THERETO AND THROUGH WHICH CARRIER TUNNELING OCCURS, PROCESSES OR APPARATUS PECULIAR TO MANUFACTURE OR TREATMENT OF SUCH DEVICES, OR OF PARTS THEREOF (EPO)

E49.002

. (1 indent ) Devices using Mott metal-insulator transition, e.g., field-effect transistors (EPO)

E49.003

. (1 indent ) Quantum devices, e.g., quantum interference devices, metal single electron transistor (EPO)

E49.004

. (1 indent ) Thin-film or thick-film devices (EPO)

E21.001

PROCESSES OR APPARATUS ADAPTED FOR MANUFACTURE OR TREATMENT OF SEMICONDUCTOR OR SOLID-STATE DEVICES OR OF PARTS THEREOF (EPO)

E21.002

. (1 indent ) Manufacture or treatment of semiconductor device (EPO)

E21.003

.. (2 indent ) Manufacture of two-terminal component for integrated circuit (EPO)

E21.004

... (3 indent ) Of resistor (EPO)

E21.005

.... (4 indent ) Active material comprising carbon, e.g., diamond or diamond-like carbon (EPO)

E21.006

.... (4 indent ) Active material comprising refractory, transition, or noble metal or metal compound, e.g., alloy, silicide, oxide, nitride (EPO)

E21.007

.... (4 indent ) Active material comprising organic conducting material, e.g., conducting polymer (EPO)

E21.008

... (3 indent ) Of capacitor (EPO)

E21.009

.... (4 indent ) Dielectric having perovskite structure (EPO)

E21.01

....• (5 indent ) Dielectric comprising two or more layers, e.g., buffer layers, seed layers, gradient layers (EPO)

E21.011

.... (4 indent ) Formation of electrode (EPO)

E21.012

....• (5 indent ) With increased surface area, e.g., by roughening, texturing (EPO)

E21.013

....•. (6 indent ) With rough surface, e.g., using hemispherical grains (EPO)

E21.014

....•. (6 indent ) Having cylindrical, crown, or fin-type shape (EPO)

E21.015

....•. (6 indent ) Having horizontal extensions (EPO)

E21.016

....•.. (7 indent ) Made by depositing layers, e.g., alternatingly conductive and insulating layers (EPO)

E21.017

....•.. (7 indent ) Made by patterning layers, e.g., etching conductive layers (EPO)

E21.018

....•. (6 indent ) Having vertical extensions (EPO)

E21.019

....•.. (7 indent ) Made by depositing layers, e.g., alternatingly conductive and insulating layers (EPO)

E21.02

....•.. (7 indent ) Made by patterning layers, e.g., etching conductive layers (EPO)

E21.021

....•. (6 indent ) Having multilayers, e.g., comprising barrier layer and metal layer (EPO)

E21.022

... (3 indent ) Of inductor (EPO)

E21.023

.. (2 indent ) Making mask on semicond uctor body for further photolithographic processing (EPO)

E21.024

... (3 indent ) Comprising organic layer (EPO)

E21.025

.... (4 indent ) For lift-off process (EPO)

E21.026

.... (4 indent ) Characterized by treatment of photoresist layer (EPO)

E21.027

....• (5 indent ) Photolith ographic process (EPO)

E21.028

....•. (6 indent ) Using laser (EPO)

E21.029

....•. (6 indent ) Using anti-reflective coating (EPO)

E21.03

....• (5 indent ) Electro-lithographic process (EPO)

E21.031

....• (5 indent ) X-ray lithographic process (EPO)

E21.032

....• (5 indent ) Ion lithographic process (EPO)

E21.033

... (3 indent ) Comprising inorganic layer (EPO)

E21.034

.... (4 indent ) For lift-off process (EPO)

E21.035

.... (4 indent ) Characterized by their composition, e.g., multilayer masks, materials (EPO)

E21.036

.... (4 indent ) Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (EPO)

E21.037

....• (5 indent ) Characterized by their behavior during process, e.g., soluble mask, re-deposited mask (EPO)

E21.038

....• (5 indent ) Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (EPO)

E21.039

....• (5 indent ) Process specially adapted to improve the resolution of the mask (EPO)

E21.04

.. (2 indent ) Device having at least one potential-jump barrier or surface barrier, e.g., PN junction, depletion layer, carrier concentration layer (EPO)

E21.041

... (3 indent ) Device having semiconductor body comprising carbon, e.g., diamond, diamond-like carbon (EPO)

E21.042

.... (4 indent ) Making n- or p-doped regions (EPO)

E21.043

....• (5 indent ) Using ion im plantation (EPO)

E21.044

.... (4 indent ) Changing their shape, e.g., forming recess (EPO)

E21.045

.... (4 indent ) Making electrode (EPO)

E21.046

....• (5 indent ) Ohmic electrode (EPO)

E21.047

....• (5 indent ) Schottky electrode (EPO)

E21.048

....• (5 indent ) Conductor-insulator-semiconductor electrode, e.g., MIS contacts (EPO)

E21.049

.... (4 indent ) Multistep processes for manufacture of device whose active layer, e.g., base, channel, comprises semiconducting carbon, e.g., diamond, diamond-like carbon (EPO)

E21.05

....• (5 indent ) Device controllable only by electric current supplied or the electric potential applied to electrode which does not carry current to be rectified, amplified, or switched, e.g., three-terminal devices such as source, drain, and gate terminals; emitter, base, collector terminals (EPO)

E21.051

....•. (6 indent ) Field-effect transistor (EPO)

E21.052

....• (5 indent ) Device controllable only by variation of electric current supplied or the electric potential applied to electrodes carrying current to be rectified, amplified, oscillated, or switched, e.g., two-terminal device (EPO)

E21.053

....•. (6 indent ) Diode (EPO)

E21.054

... (3 indent ) Device having semiconductor body comprising silicon carbide (SiC) (EPO)

E21.055

.... (4 indent ) Passivating silicon carbide surface (EPO)

E21.056

.... (4 indent ) Making n- or p- doped regions or layers, e.g., using diffusion (EPO)

E21.057

....• (5 indent ) Using ion implantation (EPO)

E21.058

....•. (6 indent ) Using masks (EPO)

E21.059

....•. (6 indent ) Angled implantation (EPO)

E21.06

.... (4 indent ) Changing shape of semiconductor body, e.g., forming recesses (EPO)

E21.061

.... (4 indent ) Making electrode (EPO)

E21.062

....• (5 indent ) Ohmic electrode (EPO)

E21.063

....• (5 indent ) Conductor-insulator-semiconductor electrode, e.g., MIS contact (EPO)

E21.064

....• (5 indent ) Schottky electrode (EPO)

E21.065

.... (4 indent ) Multistep processes for manufacture of device whose active layer, e.g., base, channel, comprises silicon carbide (EPO)

E21.066

....• (5 indent ) Device controllable only by electric current supplied or the electric potential applied to electrode which does not carry current to be rectified, amplified, or switched, e.g., three-terminal device (EPO)

E21.067

....• (5 indent ) Device controllable only by variation of electric current supplied or electric potential applied to one or more of the electrodes carrying current to be rectified, amplified, oscillated, or switched, e.g., two-terminal device (EPO)

E21.068

... (3 indent ) Device having semiconductor body comprising selenium (Se) or tellurium (Te) (EPO)

E21.069

.... (4 indent ) Preparation of substrate or foundation plate for Se or Te semiconductor (EPO)

E21.07

.... (4 indent ) Preliminary treatment of Se or Te, its application to substrate, or the subsequent treatment of combination (EPO)

E21.071

....• (5 indent ) Application of Se or Te to substrate or foundation plate (EPO)

E21.072

....• (5 indent ) Conversion of Se or Te to conductive state (EPO)

E21.073

....• (5 indent ) Treatment of surface of Se or Te layer after having been made conductive (EPO)

E21.074

....• (5 indent ) Provision of discrete insulating layer, i.e., specified barrier layer material (EPO)

E21.075

.... (4 indent ) Application of electrode to exposed surface of Se or Te after Se or Te has been applied to foundation plate (EPO)

E21.076

.... (4 indent ) Treatment of complete device, e.g., by electroforming to form barrier (EPO)

E21.077

....• (5 indent ) Heat treating (EPO)

E21.078

... (3 indent ) Device having semiconductor body comprising cuprous oxide (Cu 2 O) or cuprous iodide (CuI) (EPO)

E21.079

.... (4 indent ) Preparation of substrate, preliminary treatment oxidation of substrate, reduction treatment (EPO)

E21.08

....• (5 indent ) Preliminary treatment of foundation plate (EPO)

E21.081

....• (5 indent ) Reduction of copper oxide, treatment of oxide layer (EPO)

E21.082

....• (5 indent ) Oxidation and subsequent heat treatment of substrate (EPO)

E21.083

....• (5 indent ) Application of specified conductive layer (EPO)

E21.084

.... (4 indent ) Treatment of complete device, e.g., electroforming, heat treating (EPO)

E21.085

... (3 indent ) Device having semiconductor body comprising Group IV elements or Group III-V compounds with or without impurities, e.g., doping materials (EPO)

E21.086

.... (4 indent ) Intermixing or interdiffusion or disordering of Group III-V heterostructures, e.g., IILD (EPO)

E21.087

.... (4 indent ) Joining of semiconductor body for junction formation (EPO)

E21.088

....• (5 indent ) By direct bonding (EPO)

E21.089

.... (4 indent ) Multistep processes for manufacture of device using quantum interference effect, e.g., electrostatic Aharonov-Bohm effect (EPO)

E21.09

.... (4 indent ) Deposition of semiconductor material on substrate, e.g., epitaxial growth, solid phase epitaxy (EPO)

E21.091

....• (5 indent ) Using physical deposition, e.g., vacuum deposition, sputtering (EPO)

E21.092

....•. (6 indent ) Epitaxial deposition of Group IV element, e.g., Si, Ge (EPO)

E21.093

....•.. (7 indent ) Deposition on semiconductor substrate being different from deposited semiconductor material; i.e., formation of heterojunctions (EPO)

E21.094

....•.. (7 indent ) Deposition on insulating or meta llic substrate (EPO)

E21.095

....•.. (7 indent ) Epitaxial deposition of diamond (EPO)

E21.096

....•. (6 indent ) Deposition of diamond (EPO)

E21.097

....•. (6 indent ) Epitaxial deposition of Group III-V compound (EPO)

E21.098

....•.. (7 indent ) Deposition on semiconductor substrate not being an Group III-V compound (EPO)

E21.099

....•.. (7 indent ) Deposition on insulating or metallic substrate (EPO)

E21.1

....•.. (7 indent ) Doping during epitaxial deposition (EPO)

E21.101

....• (5 indent ) Using reduction or decomposition of gaseous compound yielding solid condensate, i.e., chemical deposition (EPO)

E21.102

....•. (6 indent ) Epitaxial deposition of Group IV elements, e.g., Si, Ge, C (EPO)

E21.103

....•.. (7 indent ) Deposition on a semiconductor substrate which is different from the semiconductor material being deposited, i.e., formation of heterojunctions (EPO)

E21.104

....•.. (7 indent ) Deposition on an insulating or a metallic substrate (EPO)

E21.105

....•.. (7 indent ) Epitaxial deposition of diamond (EPO)

E21.106

....•.. (7 indent ) Doping during the epitaxial deposition (EPO)

E21.107

....•. (6 indent ) Deposition of diamond (EPO)

E21.108

....•. (6 indent ) Epitaxial deposition of Group III-V compound (EPO)

E21.109

....•.. (7 indent ) Using molecular beam technique (EPO)

E21.11

....•.. (7 indent ) Doping the epitaxial deposit (EPO)

E21.111

....•... (8 indent ) Doping with transition metals to form semi-insulating layers (EPO)

E21.112

....•.. (7 indent ) Deposition on a semiconductor substrate not being Group III-V compound (EPO)

E21.113

....•.. (7 indent ) Deposition on an insulating or a metallic substrate (EPO)

E21.114

....• (5 indent ) Using liquid deposition (EPO)

E21.115

....•. (6 indent ) Epitaxial deposition of Group IV elements, e.g., Si, Ge, C (EPO)

E21.116

....•.. (7 indent ) Deposition on a semiconductor substrate which is different from the semiconductor material being deposited, i.e., formation of heterojunction (EPO)

E21.117

....•. (6 indent ) Epitaxial deposition of Group III-V compound (EPO)

E21.118

....•.. (7 indent ) Deposition on a semiconductor substrate not being an Group III-V compound (EPO)

E21.119

....• (5 indent ) Characterized by the substrate (EPO)

E21.12

....•. (6 indent ) Characterized by the post-treatment used to control the interface betw een substrate and epitaxial layer, e.g., ion implantation followed by annealing (EPO)

E21.121

....•. (6 indent ) Substrate is crystalline insulating material, e.g., sapphire (EPO)

E21.122

....•. (6 indent ) Bonding of semiconductor wafer to insulating substrate or to semic onducting substrate using an intermediate insulating layer (EPO)

E21.123

....•.. (7 indent ) Substrate is crystalline semiconductor material, e.g., lattice adaptation, heteroepitaxy (EPO)

E21.124

....•... (8 indent ) Heteroepitaxy (EPO)

E21.125

....•... (8 indent ) Defect and dislocati on suppression due to lattice mismatch, e.g., lattice adaptation (EPO)

E21.126

....•... (8 indent ) Group III-V compound on dissimilar Group III-V compound (EPO)

E21.127

....•... (8 indent ) Group III-V compound on Si or Ge (EPO)

E21.128

....•... (8 indent ) Carbon on a noncarbon semiconductor substrate (EPO)

E21.129

....•. (6 indent ) Group IVA, e.g., Si, C, Ge on Group IVB, e.g., Ti, Zr (EPO)

E21.13

....•. (6 indent ) The substrate is crystalline conducting material, e.g., metallic silicide (EPO)

E21.131

....• (5 indent ) Selective epilaxial growth, e.g., simultaneous deposition of mono- and non-mono semiconductor material (EPO)

E21.132

....•. (6 indent ) Preparation of substrate for selective epitaxy (EPO)

E21.133

....• (5 indent ) Epitaxial re-growth of non-monocrystalline semiconductor material, e.g., lateral epitaxy by seeded solidific ation, solid-state crystallization, solid-state graphoepitaxy, explosive crystallization, grain growth in polycrystalline material (EPO)

E21.134

....•. (6 indent ) Using a coherent energy beam, e.g., laser or electron beam (EPO)

E21.135

.... (4 indent ) Diffusion of impurity material, e.g., doping material, electrode material, into or out of a semiconductor body, or between semiconductor regions; interactions between two or more impurities; redistribution of impurities (EPO)

E21.136

....• (5 indent ) From the substrate during epitaxy, e.g., autodoping; preventing or using autodoping (EPO)

E21.137

....• (5 indent ) To control carrier lifetime, i.e., deep level dopant (EPO)

E21.138

....•. (6 indent ) In Group III-V compound (EPO)

E21.139

....• (5 indent ) Lithium-drift (EPO)

E21.14

....• (5 indent ) Diffusion source (EPO)

E21.141

....• (5 indent ) Using diffusion into or out of a solid from or into a gaseous phase (EPO)

E21.142

....•. (6 indent ) Diffusion into or out of Group III-V compound (EPO)

E21.143

....•. (6 indent ) From or into plasma phase (EPO)

E21.144

....• (5 indent ) Using diffusion into or out of a s olid from or into a solid phase, e.g., a doped oxide layer (EPO)

E21.145

....•. (6 indent ) Diffusion into or out of Group IV semiconductor (EPO)

E21.146

....•.. (7 indent ) Using predeposition of impurities into the semiconductor surface, e.g., from gaseous phase (EPO)

E21.147

....•... (8 indent ) By ion implantation (EPO)

E21.148

....•.. (7 indent ) From or through or into an applied layer, e.g., photoresist, nitride (EPO)

E21.149

....•... (8 indent ) Applied layer is oxide, e.g., P 2 O 5 , PSG, H 3 BO 3 , doped oxide (EPO)

E21.15

....•.... (9 indent ) Through the applied layer (EPO)

E21.151

....•... (8 indent ) Applied layer being silicon or silicide or SIPOS, e.g., polysilicon, porous silicon (EPO)

E21.152

....•. (6 indent ) Diffusion into or out of Group III-V compound (EPO)

E21.153

....• (5 indent ) Using diffusion into or out of a solid from or into a liquid phase, e.g., alloy diffusion process (EPO)

E21.154

.... (4 indent ) Alloying of impurity material, e.g., doping material, electrode material, with a semiconductor body (EPO)

E21.155

....• (5 indent ) Alloying of doping material with Group III-V compound (EPO)

E21.156

....• (5 indent ) Alloying of electrode material (EPO)

E21.157

....•. (6 indent ) With Group III-V compound (EPO)

E21.158

.... (4 indent ) Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (EPO)

E21.159

....• (5 indent ) Deposition of conductive or insulating material for electrode conducting electric current (EPO)

E21.16

....•. (6 indent ) From a gas or vapor, e.g., condensation (EPO)

E21.161

....•.. (7 indent ) Of conductive layer (EPO)

E21.162

....•... (8 indent ) On semiconductor body comprising Group IV element (EPO)

E21.163

....•.... (9 indent ) Deposition of Schottky electrode (EPO)

E21.164

....•.... (9 indent ) O layer comprising silicide (EPO)

E21.165

....•.... (9 indent ) Conductive layer comprising silicide (EPO)

E21.166

....•.... (9 indent ) Conductive layer comprising semiconducting material (EPO)

E21.167

....•....• (10 indent ) Making of side-wall contact (EPO)

E21.168

....•.... (9 indent ) Conductive layer comprising transition metal, e.g., Ti, W, Mo (EPO)

E21.169

....•.... (9 indent ) By physical means, e.g., sputtering, evaporation (EPO)

E21.17

....•.... (9 indent ) By chemical means, e.g., CVD, LPCVD, PECVD, laser CVD (EPO)

E21.171

....•....• (10 indent ) Selective deposition (EPO)

E21.172

....•... (8 indent ) On semiconductor body comprising Group III-V compound (EPO)

E21.173

....•.... (9 indent ) Deposition of Schottky electrode (EPO)

E21.174

....•. (6 indent ) From a liquid, e.g., electrolytic deposition (EPO)

E21.175

....•.. (7 indent ) Using an external electrical current, i.e., electro-deposition (EPO)

E21.176

....• (5 indent ) Manufacture or post-treatment of electrode having a capacitive structure, i.e., gate structure for field-effect device (EPO)

E21.177

....•. (6 indent ) MOS-gate structure (EPO)

E21.178

....•.. (7 indent ) Joint-gate structure (EPO)

E21.179

....•.. (7 indent ) Floating or plural gate structure (EPO)

E21.18

....•.. (7 indent ) Gate structure with charge-trapping insulator (EPO)

E21.181

....•.. (7 indent ) On semiconductor body not comprising Group IV element, e.g., Group III-V compound (EPO)

E21.182

....•.. (7 indent ) On semiconductor body comprising Group IV element excluding non-elemental Si, e.g., Ge, C, diamond, silicon compound or compound, such as SiC or SiGe (EPO)

E21.183

....•.. (7 indent ) For charge-coupled device (EPO)

E21.184

....•. (6 indent ) PN-homojunction gate structure (EPO)

E21.185

....•.. (7 indent ) For charge-coupled device (EPO)

E21.186

....•. (6 indent ) Schottky gate structure (EPO)

E21.187

....•.. (7 indent ) For charge-coupled device (EPO)

E21.188

....•. (6 indent ) Heterojunction gate structure (EPO)

E21.189

....•.. (7 indent ) For charge-coupled device (EPO)

E21.19

....• (5 indent ) Making electrode structure comprising conductor-insulator-semiconductor, e.g., MIS gate (EPO)

E21.191

....•. (6 indent ) Insulator formed on silicon semiconductor body (EPO)

E21.192

....•.. (7 indent ) Characterized by insulator (EPO)

E21.193

....•... (8 indent ) On single crystalline silicon (EPO)

E21.194

....•.... (9 indent ) Characterized by treatment after formation of definitive gate conductor (EPO)

E21.195

....•.. (7 indent ) Characterized by conductor (EPO)

E21.196

....•... (8 indent ) Final conductor next to insulator having lateral composition or doping variation, or being formed laterally by more than one deposition step (EPO)

E21.197

....•... (8 indent ) Final conductor layer next to insulator being silicon e.g., polysilicon, with or without impurities (EPO)

E21.198

....•.... (9 indent ) Conductor comprising at least another nonsilicon conductive layer (EPO)

E21.199

....•....• (10 indent ) Conductor comprising silicide layer formed by silicidation reaction of silicon with metal layer (EPO)

E21.2

....•....• (10 indent ) Conductor comprising metal or metallic silicide formed by deposition e.g., sputter deposition, i.e., without silicidation reaction (EPO)

E21.201

....•... (8 indent ) Conductor layer next to insulator is Si or Ge or C and their non-Si alloys (EPO)

E21.202

....•... (8 indent ) Conductor layer next to the insulator is single metal, e.g., Ta, W, Mo, Al (EPO)

E21.203

....•... (8 indent ) Conductor layer next to insulator is metallic silicide (Me Si) (EPO)

E21.204

....•... (8 indent ) Conductor layer next to insulator is non-MeSi composite or compound, e.g., TiN (EPO)

E21.205

....•... (8 indent ) Characterized by sectional shape, e.g., T-shape, inverted T, spacer (EPO)

E21.206

....•... (8 indent ) Lithography, isolation, or planarization-related aspects of making conductor-insulator-semiconductor structure, e.g., sub-lithography lengths; to solve problems arising at crossing with side of device isolation (EPO)

E21.207

....•. (6 indent ) Insulator formed on nonelemental silicon semiconductor body, e.g., Ge, SiGe, SiGeC (EPO)

E21.208

....• (5 indent ) Comprising layer having ferroelectric properties (EPO)

E21.209

....• (5 indent ) Making electrode structure comprising conductor-insulator-conuctor-insulator-semiconductor, e.g., gate stack for non-volatile memory (EPO)

E21.21

....• (5 indent ) Comprising charge trapping insulator (EPO)

E21.211

.... (4 indent ) Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (EPO)

E21.212

....• (5 indent ) Hydrogenation or deuterization, e.g., using atomic hydrogen or deuterium from a plasma (EPO)

E21.213

....•. (6 indent ) Of Group III-V compound (EPO)

E21.214

....• (5 indent ) To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (EPO)

E21.215

....•. (6 indent ) Chemical or electrical treatment, e.g., electrolytic etching (EPO)

E21.216

....•.. (7 indent ) Electrolytic etching (EPO)

E21.217

....•... (8 indent ) Of Group III-V compound (EPO)

E21.218

....•.. (7 indent ) Plasma etching; reactive-ion etching (EPO)

E21.219

....•.. (7 indent ) Chemical etching (EPO)

E21.22

....•... (8 indent ) Etching of Group III-V compound (EPO)

E21.221

....•.... (9 indent ) Anisotropic liquid etching (EPO)

E21.222

....•.... (9 indent ) Vapor phase etching (EPO)

E21.223

....•... (8 indent ) Anisotropic liquid etching (EPO)

E21.224

....•.. (7 indent ) Chemical cleaning (EPO)

E21.225

....•... (8 indent ) Cleaning diamond or graphite (EPO)

E21.226

....•... (8 indent ) Dry cleaning (EPO)

E21.227

....•.... (9 indent ) With gaseous hydrogen fluoride (HF) (EPO)

E21.228

....•... (8 indent ) Wet cleaning only (EPO)

E21.229

....•... (8 indent ) Combining dry and wet cleaning steps (EPO)

E21.23

....•.. (7 indent ) With simultaneous mechanical treatment, e.g., chemical-mechanical polishing (EPO)

E21.231

....•.. (7 indent ) Using mask (EPO)

E21.232

....•... (8 indent ) Characterized by their composition, e.g., multilayer masks, materials (EPO)

E21.233

....•... (8 indent ) Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (EPO)

E21.234

....•.... (9 indent ) Characterized by their behavior during process, e.g., soluble mask, redeposited mask (EPO)

E21.235

....•.... (9 indent ) Characterized by process involved to create mask, e.g., lift-off mask, sidewall, or to modify the mask, e.g., pre-treatment, post-treatment (EPO)

E21.236

....•.... (9 indent ) Process specially adapted to improve resolution of mask (EPO)

E21.237

....•. (6 indent ) Mechanical treatment, e.g., grinding, polishing, cutting (EPO)

E21.238

....•.. (7 indent ) Making grooves, e.g., cutting (EPO)

E21.239

....•.. (7 indent ) Using abrasion, e.g., sand-blasting (EPO)

E21.24

....•. (6 indent ) To form insulating layer thereon, e.g., for masking or by using photolithographic technique (EPO)

E21.241

....•.. (7 indent ) Post-treatment (EPO)

E21.242

....•... (8 indent ) Of organic layer (EPO)

E21.243

....•... (8 indent ) Planarization of insulating layer (EPO)

E21.244

....•.... (9 indent ) Involving dielectric removal step (EPO)

E21.245

....•....• (10 indent ) Removal by chemical etching, e.g., dry etching (EPO)

E21.246

....•....•. (11 indent ) Removal by selective chemical etching, e.g., selective dry etching through mask (EPO)

E21.247

....•... (8 indent ) Doping insulating layer (EPO)

E21.248

....•.... (9 indent ) By ion implantation (EPO)

E21.249

....•... (8 indent ) Etching insulating layer by chemical or physical means (EPO)

E21.25

....•.... (9 indent ) Etching inorganic layer (EPO)

E21.251

....•....• (10 indent ) By chemical means (EPO)

E21.252

....•....•. (11 indent ) By dry-etching (EPO)

E21.253

....•....•.. (12 indent ) Of layers not containing Si, e.g., PZT, Al 2 O 3 (EPO)

E21.254

....•.... (9 indent ) Etching organic layer (EPO)

E21.255

....•....• (10 indent ) By chemical means (EPO)

E21.256

....•....•. (11 indent ) By dry-etching (EPO)

E21.257

....•.... (9 indent ) Using mask (EPO)

E21.258

....•.. (7 indent ) Using masks (EPO)

E21.259

....•.. (7 indent ) Organic layers, e.g., photoresist (EPO)

E21.26

....•... (8 indent ) Layer comprising organo-silicon compound (EPO)

E21.261

....•.... (9 indent ) Layer comprising polysiloxane compound (EPO)

E21.262

....•....• (10 indent ) Layer comprising hydrogen silsesquioxane (EPO)

E21.263

....•....• (10 indent ) Layer comprising silazane compounds (EPO)

E21.264

....•... (8 indent ) Layers comprising fluoro hydrocarbon compounds, e.g., polytetrafluoroethylene (EPO)

E21.265

....•... (8 indent ) By Langmuir-Blodgett technique (EPO)

E21.266

....•.. (7 indent ) Inorganic layer (EPO)

E21.267

....•... (8 indent ) Composed of alternated layers or of mixtures of nitrides and oxides or of oxynitrides, e.g., formation of oxynitride by oxidation of nitride layer (EPO)

E21.268

....•... (8 indent ) Of silicon (EPO)

E21.269

....•.... (9 indent ) Formed by deposition from a gas or vapor (EPO)

E21.27

....•... (8 indent ) Carbon layer, e.g., diamond-like layer (EPO)

E21.271

....•... (8 indent ) Composed of oxide or glassy oxide or oxide based glass (EPO)

E21.272

....•.... (9 indent ) With perovskite structure (EPO)

E21.273

....•.... (9 indent ) Deposition of porous oxide or porous glassy oxide or oxide based porous glass (EPO)

E21.274

....•.... (9 indent ) Deposition from gas or vapor (EPO)

E21.275

....•....• (10 indent ) Deposition of boron or phosphorus doped silicon oxide, e.g., BSG, PSG, BPSG (EPO)

E21.276

....•....• (10 indent ) Deposition of halogen doped silicon oxide, e.g., fluorine doped silicon oxide (EPO)

E21.277

....•....• (10 indent ) Deposition of carbon doped silicon oxide, e.g., SiOC (EPO)

E21.278

....•....• (10 indent ) Deposition of silicon oxide (EPO)

E21.279

....•....•. (11 indent ) On silicon body (EPO)

E21.28

....•....• (10 indent ) Deposition of aluminum oxide (EPO)

E21.281

....•....•. (11 indent ) On a silicon body (EPO)

E21.282

....•.... (9 indent ) Formed by oxidation (EPO)

E21.283

....•....• (10 indent ) Of semiconductor material, e.g., by oxidation of semiconductor body itself (EPO)

E21.284

....•....•. (11 indent ) By thermal oxidation (EPO)

E21.285

....•....•.. (12 indent ) Of silicon (EPO)

E21.286

....•....•.. (12 indent ) Of Group III-V compound (EPO)

E21.287

....•....•. (11 indent ) By anodic oxidation (EPO)

E21.288

....•....•.. (12 indent ) Of silicon (EPO)

E21.289

....•....•.. (12 indent ) Of Group III-V compound (EPO)

E21.29

....•....• (10 indent ) Of metallic layer, e.g., Al deposited on body, e.g., formation of multi-layer insulating structures (EPO)

E21.291

....•....•. (11 indent ) By anodic oxidation (EPO)

E21.292

....•... (8 indent ) Inorganic layer composed of nitride (EPO)

E21.293

....•.... (9 indent ) Of silicon nitride (EPO)

E21.294

....•. (6 indent ) Deposition/post-treatment of noninsulating, e.g., conductive - or resistive - layers on insulating layers (EPO)

E21.295

....•.. (7 indent ) Deposition of layer comprising metal, e.g., metal, alloys, metal compounds (EPO)

E21.296

....•... (8 indent ) Of metal-silicide layer (EPO)

E21.297

....•.. (7 indent ) Deposition of semiconductive layer, e.g., poly - or amorphous silicon layer (EPO)

E21.298

....•.. (7 indent ) Deposition of superconductive layer (EPO)

E21.299

....•.. (7 indent ) Deposition of conductive or semi-conductive organic layer (EPO)

E21.3

....•.. (7 indent ) Post treatment (EPO)

E21.301

....•... (8 indent ) Oxidation of silicon-containing layer (EPO)

E21.302

....•... (8 indent ) Nitriding of silicon-containing layer (EPO)

E21.303

....•... (8 indent ) Planarization (EPO)

E21.304

....•.... (9 indent ) By chemical mechanical polishing (CMP) (EPO)

E21.305

....•... (8 indent ) Physical or chemical etching of layer, e.g., to produce a patterned layer from pre-deposited extensive layer (EPO)

E21.306

....•.... (9 indent ) By physical means only (EPO)

E21.307

....•....• (10 indent ) Of silicon-containing layer (EPO)

E21.308

....•.... (9 indent ) By chemical means only (EPO)

E21.309

....•....• (10 indent ) By liquid etching only (EPO)

E21.31

....•....• (10 indent ) By vapor etching only (EPO)

E21.311

....•....•. (11 indent ) Using plasma (EPO)

E21.312

....•....•.. (12 indent ) Of silicon-containing layer (EPO)

E21.313

....•....•. (11 indent ) Pre- or post-treatment, e.g., anti-corrosion process (EPO)

E21.314

....•.... (9 indent ) Using mask (EPO)

E21.315

....•... (8 indent ) Doping layer (EPO)

E21.316

....•.... (9 indent ) Doping polycrystalline or amorphous silicon layer (EPO)

E21.317

....• (5 indent ) To modify their internal properties, e.g., to produce internal imperfections (EPO)

E21.318

....•. (6 indent ) Of silicon body, e.g., for gettering (EPO)

E21.319

....•.. (7 indent ) Using cavities formed by inert gas ion implantation, e.g., hydrogen, noble gas (EPO)

E21.32

....•.. (7 indent ) Of silicon on insulator (SOI) (EPO)

E21.321

....•.. (7 indent ) Thermally inducing defects using oxygen present in silicon body for intrinsic gettering (EPO)

E21.322

....•. (6 indent ) Of Group III-V compound, e.g., to make them semi-insulating (EPO)

E21.323

....• (5 indent ) Of diamond body (EPO)

E21.324

....•. (6 indent ) Thermal treatment for modifying the properties of semiconductor body, e.g., annealing, sintering (EPO)

E21.325

....•. (6 indent ) For the formation of PN junction without ad dition of impurities (EPO)

E21.326

....•. (6 indent ) Of Group III-V compound (EPO)

E21.327

....• (5 indent ) Application of electric current or field, e.g., for electroforming (EPO)

E21.328

.... (4 indent ) Radiation treatment (EPO)

E21.329

....• (5 indent ) Using natural radiation, e.g., alpha , beta or gamma radiation (EPO)

E21.33

....• (5 indent ) To produce chemical element by transmutation (EPO)

E21.331

....• (5 indent ) With high-energy radiation (EPO)

E21.332

....•. (6 indent ) For etching, e.g., sputter etching (EPO)

E21.333

....•. (6 indent ) For heating, e.g., electron beam heating (EPO)

E21.334

....•. (6 indent ) Producing ions for implantation (EPO)

E21.335

....•.. (7 indent ) In Group IV semiconductor (EPO)

E21.336

....•... (8 indent ) Of electrically active species (EPO)

E21.337

....•.... (9 indent ) Through-implantation (EPO)

E21.338

....•... (8 indent ) Recoil-implantation (EPO)

E21.339

....•... (8 indent ) Of electrically inactive species in silicon to make buried insulating layer (EPO)

E21.34

....•.. (7 indent ) In Group III-V compound (EPO)

E21.341

....•... (8 indent ) Of electrically active species (EPO)

E21.342

....•.... (9 indent ) Through-implantation (EPO)

E21.343

....•... (8 indent ) Characterized by the implantation of both electrically active and inactive species in the same semiconductor region to be doped (EPO)

E21.344

....•.. (7 indent ) In diamond (EPO)

E21.345

....•.. (7 indent ) Characterized by the angle between the ion beam and the crystal planes or the main crystal surface (EPO)

E21.346

....•.. (7 indent ) Using mask (EPO)

E21.347

....•. (6 indent ) Using electromagnetic radiation, e.g., laser radiation (EPO)

E21.348

....•.. (7 indent ) Using X-ray laser (EPO)

E21.349

....•.. (7 indent ) Using incoherent radiation (EPO)

E21.35

.... (4 indent ) Multi-step process for manufacture of device of bipolar type, e.g., diodes, transistors, thyristors, resistors, capacitors) (EPO)

E21.351

....• (5 indent ) Device comprising one or two electrodes, e.g., diode, resistor or capacitor with PN or Schottky junctions (EPO)

E21.352

....•. (6 indent ) Diode (EPO)

E21.353

....•.. (7 indent ) Tunnel diode (EPO)

E21.354

....•.. (7 indent ) Transit time diode, e.g., IMPATT, TRAPATT diode (EPO)

E21.355

....•.. (7 indent ) Break-down diode, e.g., Zener diode, avalanche diode (EPO)

E21.356

....•... (8 indent ) Zener diode (EPO)

E21.357

....•... (8 indent ) Avalanche diode (EPO)

E21.358

....•.. (7 indent ) Rectifier diode (EPO)

E21.359

....•.. (7 indent ) Schottky diode (EPO)

E21.36

....•.. (7 indent ) Planar diode (EPO)

E21.361

....•.. (7 indent ) Multi-layer diode, e.g., PNPN or NPNP diode (EPO)

E21.362

....•.. (7 indent ) Gat ed-diode structure, e.g., SITh, FCTh, FCD (EPO)

E21.363

....•. (6 indent ) Resistor with PN junction (EPO)

E21.364

....•. (6 indent ) Capacitor with PN - or Schottky junction, e.g., varactor (EPO)

E21.365

....•. (6 indent ) Active layer is Group III-V compound (EPO)

E21.366

....•.. (7 indent ) Diode (EPO)

E21.367

....•... (8 indent ) With an heterojunction, e.g., resonant tunneling diodes (RTD) (EPO)

E21.368

....•... (8 indent ) Schottky diode (EPO)

E21.369

....• (5 indent ) Device comprising three or more electrodes (EPO)

E21.37

....•. (6 indent ) Transistor (EPO)

E21.371

....•.. (7 indent ) Heterojunction transistor (EPO)

E21.372

....•.. (7 indent ) Bipolar thin film transistor (EPO)

E21.373

....•.. (7 indent ) Lateral transistor (EPO)

E21.374

....•.. (7 indent ) Schottky transistor (EPO)

E21.375

....•.. (7 indent ) Silicon vertical transistor (EPO)

E21.376

....•... (8 indent ) Planar transistor (EPO)

E21.377

....•... (8 indent ) Mesa-planar transistor (EPO)

E21.378

....•... (8 indent ) Inverse transistor (EPO)

E21.379

....•... (8 indent ) With single crystalline emitter, collector or base including extrinsic, link or graft base formed on th e silicon substrate, e.g., by epitaxy, recrystallization, after insulating device isolation (EPO)

E21.38

....•... (8 indent ) Where main current goes through whole of silicon substrate, e.g., power bipolar transistor (EPO)

E21.381

....•.... (9 indent ) With a multi- emitter, e.g., interdigitated, multicellular, distributed (EPO)

E21.382

....•.. (7 indent ) Field-effect controlled bipolar-type transi stor, e.g., insulated gate bipolar transistor (IGBT) (EPO)

E21.383

....•... (8 indent ) Vertical insulated gate bipolar transistor (EPO)

E21.384

....•.... (9 indent ) With recessed gate (EPO)

E21.385

....•.... (9 indent ) With recess formed by etching in source/emitter contact region (EPO)

E21.386

....•.. (7 indent ) Active layer, e.g., base, is Group III-V compound (EPO)

E21.387

....•... (8 indent ) Heterojunction transistor (EPO)

E21.388

....•. (6 indent ) Thyristor (EPO)

E21.389

....•.. (7 indent ) Lateral or planar thyristor (EPO)

E21.39

....•.. (7 indent ) Structurally associated with other devices (EPO)

E21.391

....•... (8 indent ) Other device being a controlling device of the field-effect-type (EPO)

E21.392

....•.. (7 indent ) Bi-directional thyristor (EPO)

E21.393

....•.. (7 indent ) Active layer is Group III-V compound (EPO)

E21.394

.... (4 indent ) Multi-step process for the manufacture of unipolar device (EPO)

E21.395

....• (5 indent ) Transistor-like structure, e.g., hot electron transistor (HET); metal base transistor (MBT); resonant tunneling HET (RHET); resonant tunneling transistor (RTT ); bulk barrier transistor (BBT); planar doped barrier transistor (PDBT); charge injection transistor (CHINT); ballistic transistor (EPO)

E21.396

....• (5 indent ) Metal-insulator-semiconductor capacitor, e.g., trench capacitor (EPO)

E21.397

....•. (6 indent ) Comprising PN junction, e.g., hybrid capacitor (EPO)

E21.398

....• (5 indent ) Active layer is Group III-V compound (EPO)

E21.399

....•. (6 indent ) Transistor-like structure, e.g., hot electron transistor (HET), metal base transistor (MBT), resonant tunneling hot electron transistor (RHET), resonant tunneling transistor (RTT), bulk barrier transistor (BBT), planar doped barrier transistor (PDBT), charge injection transistor (CHINT) (EPO)

E21.4

....• (5 indent ) Field-effect transistor (EPO)

E21.401

....•. (6 indent ) Using static field induced region, e.g., SIT, PBT (EPO)

E21.402

....•.. (7 indent ) Permeable base transistor (PBT) (EPO)

E21.403

....•. (6 indent ) With heterojunction interface channel or gate, e.g., HFET, HIGFET, SISFET, HJFET, HEMT (EPO)

E21.404

....•. (6 indent ) With one or zero or quasi-one or quasi-zero dimensional charge carrier gas channel, e.g., quantum wire FET; single electron trans istor (SET); striped channel transistor; coulomb blockade device (EPO)

E21.405

....•. (6 indent ) Active layer is Group III-V compound, e.g., III-V velocity modulation transistor (VMT), NERFET (EPO)

E21.406

....•.. (7 indent ) Using static field induced region, e.g., SIT, PBT (EPO)

E21.407

....•.. (7 indent ) With an heterojunction interface channel or gate, e.g., HFET, HIGFET, SI SFET, HJFET, HEMT (EPO)

E21.408

....•.. (7 indent ) With one or zero or quasi-one or quasi-zero dimensional channel, e.g., in plane gate transistor (IPG), single electron transistor (SET), striped channel transistor, coulomb blockade device (EPO)

E21.409

....•. (6 indent ) With an insulated gate (EPO)

E21.41

....•.. (7 indent ) Vertical transistor (EPO)

E21.411

....•.. (7 indent ) Thin film unipolar transistor (EPO)

E21.412

....•... (8 indent ) Amorphous silicon or polysilicon transistor (EPO)

E21.413

....•.... (9 indent ) Lateral single gate single channel transistor with noninverted structure, i.e., channel layer is formed before gate (EPO)

E21.414

....•.... (9 indent ) Lateral single gate single channel transistor with inverted structure, i.e., channel layer is formed after gate (EPO)

E21.415

....•... (8 indent ) Monocrystalline silicon transistor on insulating substrate, e.g., quartz substrate (EPO)

E21.416

....•.... (9 indent ) On sapphire substrate, e.g., silicon on sapphire (SOS) transistor (EPO)

E21.417

....•.. (7 indent ) With channel containing layer, e.g., p-base, fo rmed in or on drain region, e.g., DMOS transistor (EPO)

E21.418

....•... (8 indent ) Vertical power DMOS transistor (EPO)

E21.419

....•.... (9 indent ) With recessed gate (EPO)

E21.42

....•.... (9 indent ) With recess formed by etching in source/base contact region (EPO)

E21.421

....•.. (7 indent ) With multiple gate, one gate having MOS structure and others having same or a different structure, i.e., non MOS, e.g., JFET gate (EPO)

E21.422

....•.. (7 indent ) With floating gate (EPO)

E21.423

....•.. (7 indent ) With charge trapping gate insulator, e.g., MNOS transistor (EPO)

E21.424

....•.. (7 indent ) Lateral single gate silicon transistor (EPO)

E21.425

....•... (8 indent ) With source or drain region formed by Schottky barrier or conductor-insulator-semiconductor structure (EPO)

E21.426

....•... (8 indent ) With single crystalline channel formed on the silicon substrate after insulating device isolation (EPO)

E21.427

....•... (8 indent ) With asymmetry in channel direction, e.g., high-voltage lateral transistor with channel containing layer, e.g., p-base (EPO)

E21.428

....•... (8 indent ) With a recessed gate, e.g., lateral U-MOS (EPO)

E21.429

....•.... (9 indent ) Using etching to form recess at gate location (EPO)

E21.43

....•.... (9 indent ) Recessing gate by adding semiconductor material at source (S) or drain (D) location, e.g., transist or with elevated single crystal S and D (EPO)

E21.431

....•... (8 indent ) With source and drain recessed by etching or recessed and refi lled (EPO)

E21.432

....•... (8 indent ) With source and drain contacts formation strictly before final gate formation, e.g., contact first technology (EPO)

E21.433

....•... (8 indent ) Where the source and drain or source and drain extensions are self-aligned to sides of gate (EPO)

E21.434

....•.... (9 indent ) With initial gate mask or masking layer complementary to prospective gate location, e.g., with dummy source and drain contacts (EPO)

E21.435

....•.. (7 indent ) Lateral single gate single channel silicon transistor with both lightly doped source and drain extensions and source and drain self-aligned to sides of gate, e.g., LDD MOSFET, DDD MOSFET (EPO)

E21.436

....•.. (7 indent ) Gate comprising layer with ferroelectric properties (EPO)

E21.437

....•.. (7 indent ) With lightly doped drain selectively formed at side of gate (EPO)

E21.438

....•.. (7 indent ) Using self-aligned silicidation, i.e., salicide (EPO)

E21.439

....•... (8 indent ) Providing different silicide thicknesses on gate and on source or drain (EPO)

E21.44

....•.. (7 indent ) Using self-aligned selective metal deposition simultaneously on gate and on source or drain (EPO)

E21.441

....•.. (7 indent ) Active layer is Group III-V compound (EPO)

E21.442

....•.. (7 indent ) With gate at side of channel (EPO)

E21.443

....•.. (7 indent ) Using self-aligned punch through stopper or threshold implant under gate region (EPO)

E21.444

....•.. (7 indent ) Using dummy gate wherein at least part of final gate is self-aligned to dummy gate (EPO)

E21.445

....•. (6 indent ) With PN junction or heterojunction gate (EPO)

E21.446

....•.. (7 indent ) With PN homojunction gate (EPO)

E21.447

....•... (8 indent ) Vertical transistor, e.g., tecnetrons (EPO)

E21.448

....•.. (7 indent ) With heterojunction gate (EPO)

E21.449

....•.. (7 indent ) Active layer is Group III-V compound (EPO)

E21.45

....•. (6 indent ) With Schottky gate, e.g., MESFET (EPO)

E21.451

....•.. (7 indent ) Active layer being Group III-V compound (EPO)

E21.452

....•... (8 indent ) Lateral single-gate transistors (EPO)

E21.453

....•.... (9 indent ) Process wherein final gate is made after formation of source and drain regions in active layer, e.g., dummy-gate process (EPO)

E21.454

....•.... (9 indent ) Process wherein final gate is made before formation, e.g., activation anneal, of source and drain regions in active layer (EPO)

E21.455

....•.... (9 indent ) Lateral transistor with two or more independen t gates (EPO)

E21.456

....• (5 indent ) Charge transfer device (EPO)

E21.457

....•. (6 indent ) With insulated gate (EPO)

E21.458

....•. (6 indent ) With Schottky gate (EPO)

E21.459

... (3 indent ) Device having semiconductor body other than carbon, Si, Ge, SiC, Se, Te, Cu 2 O, CuI, and Group III-V compounds with or without impurities, e.g., doping materials (EPO)

E21.46

.... (4 indent ) Multistep process (EPO)

E21.461

.... (4 indent ) Deposition of semiconductor material on substrate, e.g., epitaxial growth (EPO)

E21.462

....• (5 indent ) Using physical deposition, e.g., vacuum deposition, sputtering (EPO)

E21.463

....• (5 indent ) Using reduction or decomposition of gaseous compound yielding solid condensate, i.e., chemical deposition (EPO)

E21.464

....• (5 indent ) Using liquid deposition (EPO)

E21.465

....•. (6 indent ) From molten solution of compound or alloy, e.g., liquid phase epitaxy (EPO)

E21.466

.... (4 indent ) Diffusion of impurity material, e.g., dopant, electrode material, into or out of semiconductor body, or between semiconductor regions (EPO)

E21.467

....• (5 indent ) Using diffusion into or out of solid from or into gaseous phase (EPO)

E21.468

....• (5 indent ) Using diffusion into or out of solid from or into solid phase, e.g., doped oxide layer (EPO)

E21.469

....• (5 indent ) Using diffusion into or out of solid from or into liquid phase, e.g., alloy diffusion process (EPO)

E21.47

.... (4 indent ) Alloying of impurity material, e.g., dopant, electrode material, with semiconductor body (EPO)

E21.471

.... (4 indent ) Radiation treatment (EPO)

E21.472

....• (5 indent ) With high-energy radiation (EPO)

E21.473

....•. (6 indent ) Producing ion implantation (EPO)

E21.474

....•.. (7 indent ) Using mask (EPO)

E21.475

....•. (6 indent ) Using electromagnetic radiation, e.g., laser radiation (EPO)

E21.476

.... (4 indent ) Manufacture of electrodes on semiconductor bodies using processes or apparatus other than epitaxial growth, e.g., coating, diffusion, or alloying, or radiation treatment (EPO)

E21.477

....• (5 indent ) Deposition of conductive or insulating materials for electrode (EPO)

E21.478

....•. (6 indent ) From gas or vapor, e.g., condensation (EPO)

E21.479

....•. (6 indent ) From liquid, e.g., electrolytic deposition (EPO)

E21.48

....• (5 indent ) Involving application of pressure, e.g., thermo compression bonding (EPO)

E21.481

....• (5 indent ) Including application of mechanical vibration, e.g., ultrasonic vibration (EPO)

E21.482

.... (4 indent ) Treatment of semiconductor body using process other than electromagnetic radiation (EPO)

E21.483

....• (5 indent ) To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (EPO)

E21.484

....•. (6 indent ) Mechanical treatment, e.g., grinding, ultrasonic treatment (EPO)

E21.485

....•. (6 indent ) Chemical or electrical treatment, e.g., electrolytic etching (EPO)

E21.486

....•.. (7 indent ) Using mask (EPO)

E21.487

....•. (6 indent ) To form insulating layer thereon, e.g., for masking or by using photolithographic techniques; post treatment of these layers (EPO)

E21.488

....•.. (7 indent ) Using mask (EPO)

E21.489

....•.. (7 indent ) Post treatment of insulating layer (EPO)

E21.49

....•... (8 indent ) Etching layer (EPO)

E21.491

....•... (8 indent ) Doping layer (EPO)

E21.492

....•.. (7 indent ) Organic layer, e.g., photoresist (EPO)

E21.493

....•.. (7 indent ) Inorganic layer (EPO)

E21.494

....•... (8 indent ) Composed of oxide or glassy oxide or oxide-based glass (EPO)

E21.495

....•. (6 indent ) Deposition of noninsulating, e.g., conductive -, resistive -, layer on insulating layer (EPO)

E21.496

....•.. (7 indent ) Post treatment of layer (EPO)

E21.497

....• (5 indent ) Thermal treatment for modifying property of semiconductor body, e.g., annealing, sintering (EPO)

E21.498

....• (5 indent ) Application of electric current or fields, e.g., for electroforming (EPO)

E21.499

... (3 indent ) Assembling semiconductor devices, e.g., packaging , including mounting, encapsulating, or treatment of packaged semiconductor (EPO)

E21.5

.... (4 indent ) Mounting semiconductor bodies in container (EPO)

E21.501

.... (4 indent ) Providing fillings in container, e.g., gas fillings (EPO)

E21.502

.... (4 indent ) Encapsulation, e.g., encapsulation layer, coating (EPO)

E21.503

....• (5 indent ) Encapsulation of active face of flip chip device, e.g., under filling or under encapsulation of flip-chip, encapsulation perform on chip or mounting substrate (EPO)

E21.504

....• (5 indent ) Moulds (EPO)

E21.505

.... (4 indent ) Insulative mounting semiconductor device on support (EPO)

E21.506

.... (4 indent ) Attaching or detaching leads or other conductive members, to be used for carrying current to or from device in operation (EPO)

E21.507

....• (5 indent ) Formation of contacts to semiconductor by use of metal layers separated by insulating layers, e.g., self-aligned contacts to source/drain or emitter/base (EPO)

E21.508

....•. (6 indent ) Forming solder bumps (EPO)

E21.509

....• (5 indent ) Involving soldering or alloying process, e.g., soldering wires (EPO)

E21.51

....•. (6 indent ) Mounting on metallic conductive member (EPO)

E21.511

....•. (6 indent ) Mounting on insulating member provided with metallic leads, e.g., flip-chip mounting, conductive die mounting (EPO)

E21.512

....•.. (7 indent ) Right-up bonding (EPO)

E21.513

....•. (6 indent ) Mounting on semiconductor conductive member (EPO)

E21.514

....• (5 indent ) Involving use of conductive adhesive (EPO)

E21.515

....• (5 indent ) Involving use of mechanical auxiliary part without use of alloying or soldering process, e.g., pressure contacts (EPO)

E21.516

....• (5 indent ) Involving automation techniques using film carriers (EPO)

E21.517

....• (5 indent ) Involving use of electron or laser beam (EPO)

E21.518

....• (5 indent ) Involving application of mechanical vibration, e.g., ultrasonic vibration (EPO)

E21.519

....• (5 indent ) Involving application of pressure, e.g., thermo-compression bonding (EPO)

E21.52

.. (2 indent ) Devices having no potential-jump barrier or surface barrier (EPO)

E21.521

. (1 indent ) Testing or measuring during manufacture or treatment or reliability measurement, i.e., testing of parts followed by no processing which modifies parts as such (EPO)

E21.522

.. (2 indent ) Structural arrangement (EPO)

E21.523

... (3 indent ) Additional lead-in metallization on device, e.g., additional pads or lands, lines in scribe line, sacrificed conductors, sacrificed frames (EPO)

E21.524

... (3 indent ) Circuit for characterizing or monitoring manufacturing process, e.g., whole test die, wafer filled with test structures, onboard devices incorporated on each die, process/product control monitors or PCM, devices in scribe-line/kerf, drop-in devices (EPO)

E21.525

.. (2 indent ) Procedures, i.e., sequence of activities consisting of plurality of measurement and correction, marking or sorting steps (EPO)

E21.526

... (3 indent ) Connection or disconnection of subentities or redundant parts of device in response to measurement, e.g., wafer scale, memory devices (EPO)

E21.527

... (3 indent ) Optical enhancement of defects or not directly visible states, e.g., selective electrolytic deposition, bubbles in liquids, light emission, color change (EPO)

E21.528

... (3 indent ) Acting in response to ongoing measurement without interruption of processing, e.g., endpoint detection, in-situ thickness measurement (EPO)

E21.529

.. (2 indent ) Measuring as part of manufacturing process (EPO)

E21.53

... (3 indent ) For structural parameters, e.g., thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions (EPO)

E21.531

... (3 indent ) For electrical parameters, e.g., resistance, deep-levels, CV, diffusions by electrical means (EPO)

E21.532

. (1 indent ) Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (EPO)

E21.533

.. (2 indent ) Of thick- or thin-film circuits or parts thereof (EPO)

E21.534

... (3 indent ) Of thick-film circuits or parts thereof (EPO)

E21.535

... (3 indent ) Of thin-film circuits or parts thereof (EPO)

E21.536

.. (2 indent ) Manufacture of specific parts of devices (EPO)

E21.537

... (3 indent ) Making of localized buried regions, e.g., buried collector layer, internal connection, substrate contacts (EPO)

E21.538

.... (4 indent ) Making of internal connections, substrate contacts (EPO)

E21.539

.... (4 indent ) For Group III-V compound semiconductor integrated circuits (EPO)

E21.54

... (3 indent ) Making of isolation regions between components (EPO)

E21.541

.... (4 indent ) Between components manufactured in active substrate comprising SiC compound semiconductor (EPO)

E21.542

.... (4 indent ) Between components manufactured in active substrate comprising Group III-V compound semiconductor (EPO)

E21.543

.... (4 indent ) Between components manufactured in active substrate comprising Group II-VI compound semiconductor (EPO)

E21.544

.... (4 indent ) PN junction isolation (EPO)

E21.545

.... (4 indent ) Dielectric regions, e.g., EPIC dielectric isolation, LOCOS; trench refilling techniques, SOI technology, use of channel stoppers (EPO)

E21.546

....• (5 indent ) Using trench refilling with dielectric materials (EPO)

E21.547

....•. (6 indent ) Dielectric material being obtained by full chemical transformation of nondielectric materials, such as polycrystalline silicon, metals (EPO)

E21.548

....•. (6 indent ) Concurrent filling of plurality of trenches having different trench shape or dimension, e.g., rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches (EPO)

E21.549

....•. (6 indent ) Of trenches having shape other than rectangular or V shape, e.g., rounded corners, oblique or rounded trench walls (EPO)

E21.55

....•.. (7 indent ) Trench shape altered by local oxidation of silicon process step, e.g., trench corner rounding by LOCOS (EPO)

E21.551

....•. (6 indent ) Introducing impurities in trench side or bottom walls, e.g., for forming channel stoppers or alter isolation behavior (EPO)

E21.552

....• (5 indent ) Using local oxidation of silicon, e.g., LOCOS, SWAMI, SILO (EPO)

E21.553

....•. (6 indent ) In region recessed from surface, e.g., in recess, groove, tub or trench region (EPO)

E21.554

....•.. (7 indent ) Using auxiliary pillars in recessed region, e.g., to form LOCOS over extended areas (EPO)

E21.555

....•.. (7 indent ) Recessed region having shape other than rectangular, e.g., rounded or oblique shape (EPO)

E21.556

....•. (6 indent ) Introducing electrical inactive or active impurities in local oxidation region, e.g., to alter LOCOS oxide growth characteristics or for additional isolation purpose (EPO)

E21.557

....•.. (7 indent ) Introducing electrical active impurities in local oxidation region solely for forming channel stoppers (EPO)

E21.558

....•... (8 indent ) Introducing both types of electrical active impurities in local oxidation region solely for forming channel stoppers, e.g., for isolation of complementary doped regions (EPO)

E21.559

....•. (6 indent ) With plurality of successive local oxidation steps (EPO)

E21.56

....• (5 indent ) Dielectric isolation using EPIC technique, i.e., epitaxial passivated integrated circuit (EPO)

E21.561

....• (5 indent ) Using semiconductor or insulator technology, i.e., SOI technology (EPO)

E21.562

....•. (6 indent ) Using selective deposition of single crystal silicon, e.g., Selective Epitaxial Growth (SEG) (EPO)

E21.563

....•. (6 indent ) Using silicon implanted buried insulating layers, e.g., oxide layers, i.e., SIMOX technique (EPO)

E21.564

....•. (6 indent ) SOI together with lateral isolation, e.g., using local oxidation of silicon, or dielectric or polycrystalline material refilled trench or air gap isolation regions, e.g., completely isolated semiconductor islands (EPO)

E21.565

....•. (6 indent ) Using full isolation by porous oxide silicon, i.e., FIPOS technique (EPO)

E21.566

....•. (6 indent ) Using lateral overgrowth technique, i.e., ELO techniques (EPO)

E21.567

....•. (6 indent ) Using bonding technique (EPO)

E21.568

....•.. (7 indent ) With separation/delamination along ion implanted layer, e.g., "Smart-cut", "Unibond" (EPO)

E21.569

....•.. (7 indent ) Using silicon etch back technique, e.g., BESOI, ELTRAN (EPO)

E21.57

....•.. (7 indent ) With separation/delamination along porous layer (EPO)

E21.571

....• (5 indent ) Using selective deposition of single crystal silicon, i.e., SEG technique (EPO)

E21.572

.... (4 indent ) Polycrystalline semiconductor regions (EPO)

E21.573

.... (4 indent ) Air gaps (EPO)

E21.574

.... (4 indent ) Isolation by field effect (EPO)

E21.575

... (3 indent ) Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (EPO)

E21.576

.... (4 indent ) Characterized by formation and post treatment of dielectrics, e.g., planarizing (EPO)

E21.577

....• (5 indent ) By forming via holes (EPO)

E21.578

....•. (6 indent ) Tapered via holes (EPO)

E21.579

....•. (6 indent ) For "dual damascene" type structures (EPO)

E21.58

....• (5 indent ) Planarizing dielectric (EPO)

E21.581

....• (5 indent ) Dielectric comprising air gaps (EPO)

E21.582

....• (5 indent ) Characterized by formation and post treatment of conductors, e.g., patterning (EPO)

E21.583

....• (5 indent ) Planarization; smoothing (EPO)

E21.584

....• (5 indent ) Barrier, adhesion or liner layer (EPO)

E21.585

....• (5 indent ) Filling of holes, grooves, vias or trenches with conductive material (EPO)

E21.586

....•. (6 indent ) By selective deposition of conductive material in vias, e.g., selective chemical vapor deposition on semiconductor material, plating (EPO)

E21.587

....•. (6 indent ) By deposition over sacrificial masking layer, e.g., lift-off (EPO)

E21.588

....•. (6 indent ) Reflowing or applying pressure to fill contact hole, e.g., to remove voids (EPO)

E21.589

....• (5 indent ) By forming conductive members before deposition of protective insulating material, e.g., pillars, studs (EPO)

E21.59

....• (5 indent ) Local interconnects; local pads (EPO)

E21.591

....• (5 indent ) Modifying pattern or conductivity of conductive members, e.g., formation of alloys, reduction of contact resistances (EPO)

E21.592

....•. (6 indent ) By altering solid-state characteristics of conductive members, e.g., fuses, in situ oxidation, laser melting (EPO)

E21.593

....•. (6 indent ) By forming silicide of refractory metal (EPO)

E21.594

....•. (6 indent ) By using super-conducting material (EPO)

E21.595

....•. (6 indent ) Modifying pattern (EPO)

E21.596

....•.. (7 indent ) Using laser, e.g., laser cutting, laser direct writing, laser repair (EPO)

E21.597

.... (4 indent ) Formed through semiconductor substrate (EPO)

E21.598

.. (2 indent ) Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (EPO)

E21.599

... (3 indent ) With subsequent division of substrate into plural individual devices (EPO)

E21.6

.... (4 indent ) Involving separation of active layers from substrate (EPO)

E21.601

....• (5 indent ) Leaving reusable substrate, e.g., epitaxial lift-off process (EPO)

E21.602

.... (4 indent ) To produce devices each consisting of plurality of components, e.g., integrated circuits (EPO)

E21.603

....• (5 indent ) Substrate is semiconductor, using combination of semiconductor substrates, e.g., diamond, SiC, Si, Group III-V compound, and/or Group II-VI compound semiconductor substrates (EPO)

E21.604

....• (5 indent ) Substrate is semiconductor, using diamond technology (EPO)

E21.605

....• (5 indent ) Substrate is semiconductor, using SiC technology (EPO)

E21.606

....• (5 indent ) Substrate being semiconductor, using silicon technology (EPO)

E21.607

....•. (6 indent ) Substrate being semiconductor, using silicon technology (EPO)

E21.608

....•. (6 indent ) Bipolar technology (EPO)

E21.609

....•.. (7 indent ) Comprising combination of vertical and lateral transistors (EPO)

E21.61

....•.. (7 indent ) Comprising merged transistor logic or integrated injection logic (EPO)

E21.611

....•.. (7 indent ) Complementary devices, e.g., complementary transistors (EPO)

E21.612

....•... (8 indent ) Complementary vertical transistors (EPO)

E21.613

....•.. (7 indent ) Memory structures (EPO)

E21.614

....•. (6 indent ) Three-dimensional integrated circuits stacked in different levels (EPO)

E21.615

....•. (6 indent ) Field-effect technology (EPO)

E21.616

....•.. (7 indent ) MIS technology (EPO)

E21.617

....•... (8 indent ) Combination of charge coupled devices, i.e., CCD or BBD (EPO)

E21.618

....•... (8 indent ) With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (EPO)

E21.619

....•... (8 indent ) With particular manufacturing method of source or drain, e.g., specific S or D implants or silicided S or D structures or raised S or D structures (EPO)

E21.62

....•.... (9 indent ) Manufacturing common source or drain regions between plurality of conductor-insulator-semiconductor structures (EPO)

E21.621

....•... (8 indent ) With particular manufacturing method of gate conductor, e.g., particular materials, shapes (EPO)

E21.622

....•.... (9 indent ) Silicided or salicided gate conductors (EPO)

E21.623

....•.... (9 indent ) Gate conductors with different gate conductor materials or different gate conductor implants, e.g., dual gate structures (EPO)

E21.624

....•.... (9 indent ) Gate conductors with different shapes, lengths or dimensions (EPO)

E21.625

....•... (8 indent ) With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (EPO)

E21.626

....•... (8 indent ) With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (EPO)

E21.627

....•... (8 indent ) Interconnection or wiring or contact manufacturing related aspects (EPO)

E21.628

....•... (8 indent ) Isolation region manufacturing related aspects, e.g., to avoid interaction of isolation region with adjacent structure (EPO)

E21.629

....•... (8 indent ) With particular manufacturing method of vertical transistor structures, i.e., with channel vertical to substrate surface (EPO)

E21.63

....•... (8 indent ) With particular manufacturing method of wells or tubs, e.g., twin tubs, high energy well implants, buried implanted layers for lateral isolation (BILLI) (EPO)

E21.631

....•... (8 indent ) Combination of enhancement and depletion transistors (EPO)

E21.632

....•... (8 indent ) Complementary field-effect transistors, e.g., CMOS (EPO)

E21.633

....•.... (9 indent ) With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (EPO)

E21.634

....•.... (9 indent ) With particular manufacturing method of source or drain, e.g., specific S or D implants or silicided S or D structures or raised S or D structures (EPO)

E21.635

....•.... (9 indent ) With particular manufacturing method of gate conductor, e.g., particular materials, shapes (EPO)

E21.636

....•....• (10 indent ) Silicided or salicided gate conductors (EPO)

E21.637

....•....• (10 indent ) Gate conductors with different gate conductor materials or different gate conductor implants, e.g., dual gate structures (EPO)

E21.638

....•....• (10 indent ) Gate conductors with different shapes, lengths or dimensions (EPO)

E21.639

....•.... (9 indent ) With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (EPO)

E21.64

....•.... (9 indent ) With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (EPO)

E21.641

....•.... (9 indent ) Interconnection or wiring or contact manufacturing related aspects (EPO)

E21.642

....•.... (9 indent ) Isolation region manufacturing related aspects, e.g., to avoid interaction of isolation region with adjacent structure (EPO)

E21.643

....•.... (9 indent ) With particular manufacturing method of vertical transistor structures, i.e., with channel vertical to substrate surface (EPO)

E21.644

....•... (8 indent ) With particular manufacturing method of wells or tubs, e.g., twin tubs, high energy well implants, buried implanted layers for lateral isolation (BILLI) (EPO)

E21.645

....•... (8 indent ) Memory structures (EPO)

E21.646

....•... (8 indent ) Dynamic random access memory structures (DRAM) (EPO)

E21.647

....•.... (9 indent ) Characterized by type of capacitor (EPO)

E21.648

....•....• (10 indent ) Capacitor stacked over transfer transis tor (EPO)

E21.649

....•....•. (11 indent ) Making connection between transistor and capacitor, e.g., plug (EPO)

E21.65

....•....•. (11 indent ) Capacitor extending under transfer transistor area (EPO)

E21.651

....•....•. (11 indent ) Capacitor in U- or V-shaped trench in substrate (EPO)

E21.652

....•....•.. (12 indent ) In combination with vertical transistor (EPO)

E21.653

....•....•.. (12 indent ) Making connection between transistor and capacitor, e.g., buried strap (EPO)

E21.654

....•....• (10 indent ) Characterized by type of transistor; manufacturing of transistor (EPO)

E21.655

....•....•. (11 indent ) Transistor in U- or V-shaped trench in substrate (EPO)

E21.656

....•....• (10 indent ) Characterized by data lines (EPO)

E21.657

....•....•. (11 indent ) Making bit line (EPO)

E21.658

....•....•. (11 indent ) Making bit line contact (EPO)

E21.659

....•....•. (11 indent ) Making word line (EPO)

E21.66

....•....• (10 indent ) Simultaneous fabrication of periphery and memory cells (EPO)

E21.661

....•.... (9 indent ) Static random access memory structures (SRAM) (EPO)

E21.662

....•.... (9 indent ) Read-only memory structures (ROM), i.e., nonvolatile memory structures (EPO)

E21.663

....•....• (10 indent ) Ferroelectric nonvolatile memory structures (EPO)

E21.664

....•....•. (11 indent ) With ferroelectric capacitor (EPO)

E21.665

....•....• (10 indent ) Magnetic nonvolatile memory structures, e.g., MRAM (EPO)

E21.666

....•....• (10 indent ) PROM (EPO)

E21.667

....•....• (10 indent ) ROM only (EPO)

E21.668

....•....•. (11 indent ) With source and drain on same level, e.g., lateral channel (EPO)

E21.669

....•....•.. (12 indent ) Source or drain contact programmed (EPO)

E21.67

....•....•.. (12 indent ) Gate contact programmed (EPO)

E21.671

....•....•.. (12 indent ) Doping programmed, e.g., mask ROM (EPO)

E21.672

....•....•... (13 indent ) Entire channel doping programmed (EPO)

E21.673

....•....•... (13 indent ) Source or drain doping programmed (EPO)

E21.674

....•....•.. (12 indent ) Gate programmed, e.g., different gate material or no gate (EPO)

E21.675

....•....•.. (12 indent ) Gate dielectric programmed, e.g., different thickness (EPO)

E21.676

....•....•. (11 indent ) With source and drain on different levels, e.g., vertical channel (EPO)

E21.677

....•....•. (11 indent ) With FETs on different levels, e.g., 3D ROM (EPO)

E21.678

....•....•. (11 indent ) Simultaneous fabrication of periphery and memory cells (EPO)

E21.679

....•....• (10 indent ) Charge trapping insulator nonvolatile memory structures (EPO)

E21.68

....•....• (10 indent ) Electrically programmable (EPROM), i.e., floating gate memory structures (EPO)

E21.681

....•....•. (11 indent ) With conductive layer as control gate (EPO)

E21.682

....•....•.. (12 indent ) With source and drain on same level and without cell select transistor (EPO)

E21.683

....•....•... (13 indent ) Simultaneous fabrication of periphery and memory cells (EPO)

E21.684

....•....•.... (14 indent ) Including one type of peripheral FET (EPO)

E21.685

....•....•....• (15 indent ) Control gate layer used for peripheral FET (EPO)

E21.686

....•....•....• (15 indent ) Intergate dielectric layer used for peripheral FET (EPO)

E21.687

....•....•....• (15 indent ) Floating gate layer used for peripheral FET (EPO)

E21.688

....•....•....• (15 indent ) Floating gate dielectric layer used for peripheral FET (EPO)

E21.689

....•....•.... (14 indent ) Including different types of peripheral FETs (EPO)

E21.69

....•....•.. (12 indent ) With source and drain on same level and with cell select transistor (EPO)

E21.691

....•....•... (13 indent ) Simultaneous fabrication of periphery and memory cells (EPO)

E21.692

....•....•.. (12 indent ) With source and drain on different levels, e.g., sloping channel (EPO)

E21.693

....•....•... (13 indent ) For vertical channel (EPO)

E21.694

....•....•. (11 indent ) With doped region as control gate (EPO)

E21.695

....•. (6 indent ) Combination of bipolar and field-effect technologies (EPO)

E21.696

....•.. (7 indent ) Bipolar and MOS technologies (EPO)

E21.697

....• (5 indent ) Substrate is Group III-V semiconductor (EPO)

E21.698

....• (5 indent ) Substrate is Group II-VI semiconductor (EPO)

E21.699

....• (5 indent ) Substrate is semiconductor other than diamond, SiC, Si, Group III-V compound, or Group II-VI compound (EPO)

E21.7

.... (4 indent ) Substrate is nonsemiconductor body, e.g., insulating body (EPO)

E21.701

....• (5 indent ) Substrate is sapphire, e.g., silicon on sapphire structure (SOS) (EPO)

E21.702

....• (5 indent ) To produce devices, each consisting of single circuit element (EPO)

E21.703

....• (5 indent ) Substrate is semiconductor body (EPO)

E21.704

....•. (6 indent ) Substrate is nonsemiconductor body, e.g., insulating body (EPO)

E21.705

.. (2 indent ) Assembly of devices consisting of solid-state components formed in or on a common substrate; assembly of integrated circuit devices (EPO)

	CROSS-REFERENCE ART COLLECTIONS

900

MOSFET TYPE GATE SIDEWALL INSULATING SPACER

901

MOSFET SUBSTRATE BIAS

902

FET WITH METAL SOURCE REGION

903

FET CONFIGURATION ADAPTED FOR USE AS STATIC MEMORY CELL

904

. (1 indent ) WITH PASSIVE COMPONENTS, (e.g., POLYSILICON RESISTORS)

905

PLURAL DRAM CELLS SHARE COMMON CONTACT OR COMMON TRENCH

906

DRAM WITH CAPACITOR ELECTRODES USED FOR ACCESSING (E.G., BIT LINE IS CAPACITOR PLATE)

907

FOLDED BIT LINE DRAM CONFIGURATION

908

DRAM CONFIGURATION WITH TRANSISTORS AND CAPACITORS OF PAIRS OF CELLS ALONG A STRAIGHT LINE BETWEEN ADJACENT BIT LINES

909

MACROCELL ARRAYS (E.G., GATE ARRAYS WITH VARIABLE SIZE OR CONFIGURATION OF CELLS)

910

DIODE ARRAYS (E.G., DIODE READ-ONLY MEMORY ARRAY)

911

LIGHT SENSITIVE ARRAY ADAPTED TO BE SCANNED BY ELECTRON BEAM (E.G.,VIDICON DEVICE)

912

CHARGE TRANSFER DEVICE USING BOTH ELECTRON AND HOLE SIGNAL CARRIERS

913

WITH MEANS TO ABSORB OR LOCALIZE UNWANTED IMPURITIES OR DEFECTS FROM SEMICONDUCTORS (E.G., HEAVY METAL GETTERING)

914

POLYSILICON CONTAINING OXYGEN, NITROGEN, OR CARBON (E.G., SIPOS)

915

WITH TITANIUM NITRIDE PORTION OR REGION

916

NARROW BAND GAP SEMICONDUCTOR MATERIAL (<<1EV)

917

PLURAL DOPANTS OF SAME CONDUCTIVITY TYPE IN SAME REGION

918

LIGHT EMITTING REGENERATIVE SWITCHING DEVICE (E.G., LIGHT EMITTING SCR) ARRAYS, CIRCUITRY, ETC.

919

ELEMENTS OF SIMILAR CONSTRUCTION CONNECTED IN SERIES OR PARALLEL TO AVERAGE OUT MANUFACTURING VARIATIONS IN CHARACTERISTICS

920

CONDUCTOR LAYERS ON DIFFERENT LEVELS CONNECTED IN PARALLEL (E.G., TO REDUCE RESISTANCE)

921

RADIATION HARDENED SEMICONDUCTOR DEVICE

922

WITH MEANS TO PREVENT INSPECTION OF OR TAMPERING WITH AN INTEGRATED CIRCUIT (E.G., "SMART CARD", ANTI-TAMPER)

923

WITH MEANS TO OPTIMIZE ELECTRICAL CONDUCTOR CURRENT CARRYING CAPACITY (E.G., PARTICULAR CONDUCTOR ASPECT RATIO)

924

WITH PASSIVE DEVICE (E.G., CAPACITOR), OR BATTERY, AS INTEGRAL PART OF HOUSING OR HOUSING ELEMENT (E.G., CAP)

925

BRIDGE RECTIFIER MODULE

926

ELONGATED LEAD EXTENDING AXIALLY THROUGH ANOTHER ELONGATED LEAD

927

DIFFERENT DOPING LEVELS IN DIFFERENT PARTS OF PN JUNCTION TO PRODUCE SHAPED DEPLETION LAYER

928

WITH SHORTED PN OR SCHOTTKY JUNCTION OTHER THAN EMITTER JUNCTION

929

PN JUNCTION ISOLATED INTEGRATED CIRCUIT WITH ISOLATION WALLS HAVING MINIMUM DOPANT CONCENTRATION AT INTERMEDIATE DEPTH IN EPITAXIAL LAYER (E.G., DIFFUSED FROM BOTH SURFACES OF EPITAXIAL LAYER)

930

THERMOELECTRIC (E.G., PELTIER EFFECT) COOLING

	FOREIGN ART COLLECTIONS

FOR000

CLASS-RELATED FOREIGN DOCUMENTS