CLASS 711, ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: MEMORY |
1 | ADDRESSING COMBINED WITH SPECIFIC MEMORY CONFIGURATION OR SYSTEM: |
This subclass is indented under the class definition. Subject matter comprising means or steps for determining
one or more values (i.e., address data) that specify one
or more locations in a storage medium wherein the means or steps
are claimed in combination with a particular configuration or system
for storing data.
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2 | . Addressing extended or expanded memory: |
This subclass is indented under subclass 1. Subject matter wherein addresses are determined for memory not normally accessible by a base
operating system, computer, or digital data processing system components.
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3 | . Addressing cache memories: |
This subclass is indented under subclass 1. Subject matter wherein addresses are generated for memory nearest a processor in
a hierarchical memory arrangement (i.e., a
cache memory arrangement).
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4 | . Dynamic-type storage device (e.g., disk, tape, drum): |
This subclass is indented under subclass 1. Subject matter wherein address schemes are particular to
a data storage device requiring
relative motion between a data holding
medium and a recording mechanism such as disk, tape, or
drum memory.
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5 | . For multiple memory modules (e.g., banks, interleaved memory): |
This subclass is indented under subclass 1. Subject matter wherein logical addresses are determined
and mapped (e.g., interleaving) across
different physical memory arranged
in blocks, banks, partitions, etc.
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6 | . Virtual machine memory addressing: |
This subclass is indented under subclass 1. Subject matter wherein addresses are determined in a memory
system accommodating addressing requirements for software emulation
of a target computer or digital data processing system on a base
computer or digital data processing system.
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100 | STORAGE ACCESSING AND CONTROL: |
This subclass is indented under the class definition. Subject matter comprising means (e.g., a processor, a controller, etc.) or
steps for governing memory in a computer or digital
data processing system or the passage (e.g., reading, writing) of data thereto.
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101 | . Specific memory composition: |
This subclass is indented under subclass 100. Subject matter wherein control of the memory or
the accessing thereof is adapted to the type of memory being
accessed.
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102 | .. Solid-state read only memory (ROM): |
This subclass is indented under subclass 101. Subject matter including means or steps for accessing solid-state
randomly accessible nonvolatile memory (e.g., ROM).
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103 | ... Programmable read only memory (PROM, EEPROM, etc.): |
This subclass is indented under subclass 102. Subject matter including means or steps for accessing and controlling programmable solid-state nonvolatile memory (e.g., PROM, EPROM, EEPROM, flash, etc.). | |
104 | .. Solid-state random access memory (RAM): |
This subclass is indented under subclass 101. Subject matter including apparatus or method for accessing
volatile randomly accessible memory.
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105 | ... Dynamic random access memory: |
This subclass is indented under subclass 104. Subject matter including means or steps for accessing volatile memory requiring periodic refreshing (e.g., DRAM, Dynamic RAM, etc.). | |
106 | .... Refresh scheduling: |
This subclass is indented under subclass 105. Subject matter including specifics of coordinating refreshing
operations with other system operations.
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107 | .. Ferrite core: |
This subclass is indented under subclass 101. Subject matter comprising arrays of magnetizable rings as
the individual storage elements.
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108 | .. Content addressable memory (CAM): |
This subclass is indented under subclass 101. Subject matter including memory of
the type where elements are addressed according to the stored contents (e.g., associative memory, etc.).
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109 | .. Shift register memory: |
This subclass is indented under subclass 101. Subject matter including memory of
the type where elements are arranged to serially pass the stored
contents from one location to an adjacent location, or
for use in data format conversion
within a digital data processing system.
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110 | ... Circulating memory: |
This subclass is indented under subclass 109. Subject matter wherein the contents of a register may be passed in a recirculating fashion among a group of adjacent registers (e.g., ring buffers, barrel shifters, etc.). | |
111 | .. Accessing dynamic storage device: |
This subclass is indented under subclass 101. Subject matter including accessing memory of the
type where a storage medium is moved relative to a transducer (e.g., magnetic
or paper tape, punched cards, etc.).
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112 | ... Direct access storage device (DASD): |
This subclass is indented under subclass 111. Subject matter wherein devices employing a medium capable
of being accessed directly and by so doing skipping past portions
of the medium.
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113 | .... Caching: |
This subclass is indented under subclass 112. Subject matter wherein the DASD is used as a dedicated hierarchically
intermediate store or with a dedicated hierarchically intermediate store.
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114 | .... Arrayed (e.g., RAIDs): |
This subclass is indented under subclass 112. Subject matter where a plurality of direct access devices
are arranged in an array and files or portions thereof are stored
on more than one of the direct access storage devices.
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115 | .. Detachable memory: |
This subclass is indented under subclass 101. Subject matter wherein the memory is
of the solid-state type and can be readily physically connected
and disconnected manually, without the aid of any tools, for
temporary or transient purposes (e.g., replaceable memory cartridges, smart cards, etc.).
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116 | .. Bubble memory: |
This subclass is indented under subclass 101. Subject matter wherein the memory is of the solid-state type comprising one or more series of persistent microscopically small magnetized bubbles on a thin film substrate. | |
117 | . Hierarchical memories: |
This subclass is indented under subclass 100. Subject matter wherein the memory being accessed or controlled is in an arrangement consisting of more than one ordered level of memory. | |
118 | .. Caching: |
This subclass is indented under subclass 117. Subject matter wherein portions of the data stored
in slower main memory are transferred to
faster memory between processor(s) and the main memory.
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119 | ... Multiple caches: |
This subclass is indented under subclass 118. Subject matter employing plural cache memories arranged between at least one processor and at least one main memory. | |
120 | .... Parallel caches: |
This subclass is indented under subclass 119. Subject matter further comprising means or steps for employing plural cache memories arranged at the same ordinal level between at least one processor and at least one main memory. | |
121 | .... Private caches: |
This subclass is indented under subclass 119. Subject matter further comprising means or steps for employing plural cache memories where at least one of the caches is exclusively associated with a respective one of a plurality of processors. | |
122 | .... Hierarchical caches: |
This subclass is indented under subclass 119. Subject matter further comprising means or steps for caching at a plurality of different hierarchical levels (e.g., main cache coupled to an on-chip cache). | |
123 | .... User data cache and instruction data cache: |
This subclass is indented under subclass 119. Subject matter further comprising means or steps for employing
separate or partitioned cache(s) for separately
storing portions of instruction data and user data, respectively.
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124 | .... Cross-interrogating: |
This subclass is indented under subclass 119. Subject matter wherein an individual cache system must announce to other cache systems or check with other cache systems which may possibly contain a copy of a given cached location prior to or upon modification or appropriation of data at a given cached location. | |
125 | ... Instruction data cache: |
This subclass is indented under subclass 118. Subject matter further comprising means or steps using a
single cache dedicated to caching instruction
data.
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126 | ... User data cache: |
This subclass is indented under subclass 118. Subject further comprising means or steps for using a single cache dedicated to caching user data. | |
127 | ... Interleaved: |
This subclass is indented under subclass 118. Subject matter wherein consecutive cache memory locations
are located in different memory components.
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128 | ... Associative: |
This subclass is indented under subclass 118. Subject matter further comprising organizing a cache system
where any block in main memory can
be mapped to any block in the cache (fully associative) or
where the cache is divided into sets of blocks and individual blocks
of main memory are mapped to any
of the blocks of a particular corresponding set (that is, for
example, set associative).
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129 | ... Partitioned cache: |
This subclass is indented under subclass 118. Subject matter further comprising means or steps for dividing the cache into independent sections or domains. | |
130 | ... Shared cache: |
This subclass is indented under subclass 118. Subject matter further comprising means or steps for providing caching functions to a plurality of processors from single cache. | |
131 | ... Multiport cache: |
This subclass is indented under subclass 118. Subject matter further comprising caches composed of multiport memory thereby allowing simultaneous reads
from the cache by plural processors.
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132 | ... Stack cache: |
This subclass is indented under subclass 118. Subject matter further comprising means or steps for caching stack data. | |
133 | ... Entry replacement strategy: |
This subclass is indented under subclass 118. Subject matter including provisions for determining when
the contents of a cache location may be replaced with other data.
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134 | .... Combined replacement modes: |
This subclass is indented under subclass 133. Subject matter using a combination that includes more than one entry replacement determination mode. | |
135 | .... Cache flushing: |
This subclass is indented under subclass 133. Subject matter including provisions to clear or reset the cache or associated flags. | |
136 | .... Least recently used: |
This subclass is indented under subclass 133. Subject matter where the determination is made based upon the time since the last access to the contents of a given location. | |
137 | ... Look-ahead: |
This subclass is indented under subclass 118. Subject matter where selected data from
main memory are retrieved into the
cache prior to any request from the processor for
the selected data.
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138 | ... Cache bypassing: |
This subclass is indented under subclass 118. Subject matter wherein selected memory accesses are not placed into or retrieved from the cache. | |
139 | .... No-cache flags: |
This subclass is indented under subclass 138. Subject matter including provisions for marking selected locations of main memory so that the contents are not cached. | |
140 | ... Cache pipelining: |
This subclass is indented under subclass 118. Subject matter wherein one access sequence to the cache memory is started before a prior access
sequence is completed.
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141 | ... Coherency: |
This subclass is indented under subclass 118. Subject matter further comprising means or steps not specifically
covered above for assuring that the data stored
in the cache memory and those of
the main memory are either identical
or controlled so that stale and current data are
not confused with each other.
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142 | .... Write-through: |
This subclass is indented under subclass 141. Subject matter where, as contents of the cache are changed, the changes are also posted to main memory substantially simultaneously. | |
143 | .... Write-back: |
This subclass is indented under subclass 141. Subject matter where, as contents of the cache are changed, the changes are not posted to main memory immediately, but rather changes to a block are posted upon the occurrence of a predetermined event. | |
144 | .... Cache status data bit: |
This subclass is indented under subclass 141. Subject matter wherein coherency for each unit or block
of data includes associated identifier bit(s) to
indicate the validity status of an associated cached location.
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145 | .... Access control bit: |
This subclass is indented under subclass 141. Subject matter wherein each unit or block of memory or cache includes associated identifier bit(s) to
indicate ownership of or restricted access to the unit or block.
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146 | .... Snooping: |
This subclass is indented under subclass 141. Subject matter further comprising cache memory monitoring
an associated address bus to determine
if access to a cached location occurs by another cache memory or other user (e.g., DMA, peripherals, etc.).
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147 | . Shared memory area: |
This subclass is indented under subclass 100. Subject matter wherein at least a portion of the memory being accessed or controlled is
solid-state memory that
iscommon to a plurality of users (e.g., a
CPU and a DMA controller, multiple CPUs, etc.) or
a plurality of tasks (e.g., in a
multitasking system) or both.
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148 | .. Plural shared memories: |
This subclass is indented under subclass 147. Subject matter wherein plural independent memories are shared. | |
149 | .. Multiport memory: |
This subclass is indented under subclass 147. Subject matter including means or steps for controlling
shared memory capable of supporting
a plurality of simultaneous read accesses.
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150 | .. Simultaneous access regulation: |
This subclass is indented under subclass 147. Subject matter including provisions for controlling simultaneous memory access requests.
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151 | .. Prioritized access regulation: |
This subclass is indented under subclass 147. Subject matter including provisions for assigning priority
for use in handling simultaneous memory access
requests.
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152 | .. Memory access blocking: |
This subclass is indented under subclass 147. Subject matter including provisions for selectively restricting
access to memory areas.
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153 | .. Shared memory partitioning: |
This subclass is indented under subclass 147. Subject matter further comprising means for dividing or
segmenting a given logical shared memory area
into independent sections or domains.
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154 | . Control technique: |
This subclass is indented under subclass 100. Subject matter including particular means or steps for controlling memory accesses not specifically provided
for above.
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155 | .. Read-modify-write (RMW): |
This subclass is indented under subclass 154. Subject matter including provisions for performing an access operation where the contents of a given memory location are read and then overwritten in a single access operation. | |
156 | .. Status storage: |
This subclass is indented under subclass 154. Subject matter including provisions for storing data associated with memory accessing
and control.
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157 | .. Interleaving: |
This subclass is indented under subclass 154. Subject matter wherein consecutive memory addresses
are in nonadjacent physical locations.
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158 | .. Prioritizing: |
This subclass is indented under subclass 154. Subject matter including banks or modules which are arranged so that a given physical memory element has access priority over another. | |
159 | .. Entry replacement strategy: |
This subclass is indented under subclass 154. Subject matter including provisions for determining when
the data stored in a particular memory location may be replaced.
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160 | ... Least recently used (LRU): |
This subclass is indented under subclass 159. Subject matter wherein the determination is made based upon the time since the last access to the contents of a given location. | |
161 | .. Archiving: |
This subclass is indented under subclass 154. Subject matter wherein the control technique prevents the
corruption, loss, alteration, or disclosure
of data by storing.
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162 | ... Backup: |
This subclass is indented under subclass 161. Subject matter wherein a verbatim redundant copy of the data is made.
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163 | .. Access limiting: |
This subclass is indented under subclass 154. Subject matter wherein memory entry
is restricted.
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164 | ... With password or key: |
This subclass is indented under subclass 163. Subject matter wherein authorization code information (e.g., password, key
other than encryption key, etc.) is required
for memory access.
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165 | .. Internal relocation: |
This subclass is indented under subclass 154. Subject matter including provisions for moving or copying data from one location in a given memory to another location in the given memory or another memory at
the same hierarchical level.
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166 | .. Resetting: |
This subclass is indented under subclass 154. Subject matter including provisions for clearing or initializing
the contents of a given memory location.
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167 | . Access timing: |
This subclass is indented under subclass 100. Subject matter including provisions for controlling or coordinating
the sequence of operations that make up a memory access.
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168 | .. Concurrent accessing: |
This subclass is indented under subclass 167. Subject matter further including means or steps wherein
multiple memory accesses are initiated substantially
simultaneously.
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169 | .. Memory access pipelining: |
This subclass is indented under subclass 167. Subject matter further including means or steps wherein
a first access to memory is initiated before
a second access is completed.
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170 | . Memory configuring: |
This subclass is indented under subclass 100. Subject matter in which the allocation of memory space
is specified or the layout is automatically determined.
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171 | .. Based on data size: |
This subclass is indented under subclass 170. Subject matter comprising means or steps for allocating memory space based on the amount of storage space required. | |
172 | .. Based on component size: |
This subclass is indented under subclass 170. Subject matter comprising means or steps for allocating memory based on the size of each physical solid-state memory. | |
173 | .. Memory partitioning: |
This subclass is indented under subclass 170. Subject matter further comprising means for dividing or segmenting a given logical memory into independent sections or domains. | |
200 | ADDRESS FORMATION: |
This subclass is indented under the class definition. Subject matter comprising means or steps for determining
or modifying a value which specifies a location in at least one memory.
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201 | . Slip control, misaligning, boundary alignment: |
This subclass is indented under subclass 200. Subject matter wherein the value determination takes into
account a memory size constraint.
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202 | . Address mapping (e.g., conversion, translation): |
This subclass is indented under subclass 200. Subject matter including translating (i.e., converting) processormemoryaddress data to physical memoryaddress data through a mechanism which
defines a correspondence between the addresses.
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203 | .. Virtual addressing: |
This subclass is indented under subclass 202. Subject matter wherein the mapping allows an application
to view available memory resources
as a uniform primary memory.
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204 | ... Predicting, look-ahead: |
This subclass is indented under subclass 203. Subject matter wherein means or steps are utilized for optimizing
address determination by, for example, anticipating
a next address or prefetching addresses.
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205 | .... Directories and tables (e.g., DLAT, TLB): |
This subclass is indented under subclass 204. Subject matter wherein a memory space
is employed for registering indexes and the like to real or physical
address spaces in a predicting or look-ahead arrangement.
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206 | ... Translation tables (e.g., segment and page table or map): |
This subclass is indented under subclass 203. Subject matter wherein directories (e.g., maps) are
employed for converting address data in
a first form (e.g., virtual, logical) to address data in a second form (e.g., physical, absolute).
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207 | .... Directory tables (e.g., DLAT, TLB): |
This subclass is indented under subclass 206. Subject matter wherein a memory space
is employed for registering indexes and the like to real or physical
address spaces.
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208 | .... Segment or page table descriptor: |
This subclass is indented under subclass 206. Subject matter wherein an entry, word, or other data is maintained and is utilized in the translation. | |
209 | ... Including plural logical address spaces, pages, segments, blocks: |
This subclass is indented under subclass 203. Subject matter wherein portions of memory are organized
or managed in accordance with a predetermined mapping scheme.
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210 | .. Resolving conflict, coherency, or synonym problem: |
This subclass is indented under subclass 202. Subject matter including compensating for situations when
addresses map to the same location (e.g., synonym
problems or alias addresses).
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211 | . Address multiplexing or address bus manipulation: |
This subclass is indented under subclass 200. Subject matter including address bus modifying, multiplexing
addresses, or adapting to various bus widths.
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212 | . Varying address bit-length or size: |
This subclass is indented under subclass 200. Subject matter wherein bits are added or subtracted from existing address data to generate other address data. | |
213 | . Generating prefetch, look-ahead, jump, or predictive address: |
This subclass is indented under subclass 200. Subject matter wherein look-ahead, predictive, or
jump address data are formed.
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214 | . Operand address generation: |
This subclass is indented under subclass 200. Subject matter wherein data relevant
to an instruction and used by an instruction are used to form the
address.
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215 | . In response to microinstruction: |
This subclass is indented under subclass 200. Subject matter wherein microcode is stored in memory and particular addressing mechanisms at
the microinstruction level are employed.
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216 | . Hashing: |
This subclass is indented under subclass 200. Subject matter wherein an address value (i.e., key
other than an encryption key) is manipulated to form an
index value.
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217 | . Generating a particular pattern/sequence of addresses: |
This subclass is indented under subclass 200. Subject matter wherein values specifying memory locations
are determined according to a predetermined algorithm.
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218 | .. Sequential addresses generation: |
This subclass is indented under subclass 217. Subject matter wherein the pattern created is seriatim.
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219 | . Incrementing, decrementing, or shiftingcircuitry: |
This subclass is indented under subclass 200. Subject matter utilizing particular hardware that adds by
1, subtracts by 1, and multiplies or divides by 2n (where n is an
integer).
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220 | . Combining two or more values to create address: |
This subclass is indented under subclass 200. Subject matter wherein results from the interaction of two or more other data provide the address (e.g., generalized indirect addressing, indexing, prefixing, base + sag/tag + set, bit insertion). | |
221 | . Using table: |
This subclass is indented under subclass 200. Subject matter having a memory space
of general utility for registering indexes and like data related
to address generation (e.g., fixed
offsets, conditions, or status).
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E12.001 | ACCESSING, ADDRESSING, OR ALLOCATING WITHIN MEMORY SYSTEMS OR ARCHITECTURES (EPO): |
This main group provides for methods and apparatus for addressing or allocating computer memory space including space management and address translation. It also provides for methods and means for protecting against unauthorized use of memory and protection against loss of memory contents. This subclass is substantially the same in scope as ECLA classification G06F12/00. | |
E12.002 | . Addressing or allocation; relocation (EPO): |
This subclass is indented under subclass E12.001. This subclass is substantially the same in scope as ECLA classification G06F12/02. | |
E12.003 | .. With multidimensional access, e.g., row/column, matrix, etc. (EPO): |
This subclass is indented under subclass E12.002. This subclass is substantially the same in scope as ECLA classification G06F12/02B. | |
E12.004 | .. With look-ahead addressing means (EPO): |
This subclass is indented under subclass E12.002. This subclass is substantially the same in scope as ECLA classification G06F12/02C. | |
E12.005 | .. User addresses space allocation, e.g., contiguous or noncontiguous base addressing, etc. (EPO): |
This subclass is indented under subclass E12.002. This subclass is substantially the same in scope as ECLA classification G06F12/02D. | |
E12.006 | ... Free address space management (EPO): |
This subclass is indented under subclass E12.005. This subclass is substantially the same in scope as ECLA classification G06F12/02D2. | |
E12.007 | .... In block-addressed memory (EPO): |
This subclass is indented under subclass E12.006. This subclass is substantially the same in scope as ECLA classification G06F12/02D2E. | |
E12.008 | ..... In block-erasable memory, e.g., flash memory etc. (EPO): |
This subclass is indented under subclass E12.007. This subclass is substantially the same in scope as ECLA classification G06F12/02D2E2. | |
E12.009 | .... Garbage collection, i.e., reclamation of unreferenced memory (EPO): |
This subclass is indented under subclass E12.006. This subclass is substantially the same in scope as ECLA classification G06F12/02D2G. | |
E12.01 | ..... Using reference counting (EPO): |
This subclass is indented under subclass E12.009. This subclass is substantially the same in scope as ECLA classification G06F12/02D2G2. | |
E12.011 | ..... Incremental or concurrent garbage collection, e.g., in real-time systems, etc. (EPO): |
This subclass is indented under subclass E12.009. This subclass is substantially the same in scope as ECLA classification G06F12/02D2G4. | |
E12.012 | ...... Generational garbage collection (EPO): |
This subclass is indented under subclass E12.011. This subclass is substantially the same in scope as ECLA classification G06F12/02D2G4G. | |
E12.013 | ... Multiple users address space allocation, e.g., using different base addresses, etc. (EPO): |
This subclass is indented under subclass E12.005. This subclass is substantially the same in scope as ECLA classification G06F12/02D4. | |
E12.014 | ... Using tables or multilevel address translation means (EPO): |
This subclass is indented under subclass E12.005. This subclass is substantially the same in scope as ECLA classification G06F12/02D6. | |
E12.015 | .. Addressing variable-length words or parts of words (EPO): |
This subclass is indented under subclass E12.002. This subclass is substantially the same in scope as ECLA classification G06F12/04. | |
E12.016 | .. In hierarchically structured memory systems, e.g., virtual memory systems, etc. (EPO): |
This subclass is indented under subclass E12.002. This subclass is substantially the same in scope as ECLA classification G06F12/08. | |
E12.017 | ... Addressing of memory level in which access to desired data or data block requires associative addressing means, e.g. cache, etc. (EPO): |
This subclass is indented under subclass E12.016. This subclass is substantially the same in scope as ECLA classification G06F12/08B. | |
E12.018 | .... Using pseudo-associative means, e.g., set-associative, hashing, etc. (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B10. | |
E12.019 | .... For peripheral storage systems, e.g., disc cache, etc. (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B12. | |
E12.02 | .... With dedicated cache, e.g., instruction or stack, etc. (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B14. | |
E12.021 | .... Using selective caching, e.g., bypass, partial write, etc. (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B18. | |
E12.022 | .... Using clearing, invalidating, or resetting means (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B20. | |
E12.023 | .... Multi-user, multiprocessor, multiprocessing cache systems (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B4. | |
E12.024 | ..... With multilevel cache hierarchies (EPO): |
This subclass is indented under subclass E12.023. This subclass is substantially the same in scope as ECLA classification G06F12/08B4L. | |
E12.025 | ..... With network or matrix configuration (EPO): |
This subclass is indented under subclass E12.023. This subclass is substantially the same in scope as ECLA classification G06F12/08B4N. | |
E12.026 | ..... Cache consistency protocols (EPO): |
This subclass is indented under subclass E12.023. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P. | |
E12.027 | ...... Using directory methods (EPO): |
This subclass is indented under subclass E12.026. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P2. | |
E12.028 | ....... Copy directories (EPO): |
This subclass is indented under subclass E12.027. This
subclass is substantially the same in scope as ECLA classification
G06F12/08B4P2C.
SEE OR SEARCH THIS CLASS, SUBCLASS:
| |||
E12.029 | ....... Associative directories (EPO): |
This subclass is indented under subclass E12.027. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P2A. | |
E12.03 | ....... Distributed directories, e.g., linked lists of caches, etc. (EPO): |
This subclass is indented under subclass E12.027. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P2D. | |
E12.031 | ....... Limited pointers directories; state-only directories without pointers (EPO): |
This subclass is indented under subclass E12.027. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P2E. | |
E12.032 | ....... With concurrent directory accessing, i.e., handling multiple concurrent coherency transactions (EPO): |
This subclass is indented under subclass E12.027. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P2R. | |
E12.033 | ...... Using a bus scheme, e.g., with bus monitoring or watching means, etc. (EPO): |
This subclass is indented under subclass E12.026. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P4. | |
E12.034 | ....... In combination with broadcast means, e.g., for invalidation or updating, etc. (EPO): |
This subclass is indented under subclass E12.033. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P4B. | |
E12.035 | ....... For main memory peripheral accesses, e.g., I/O or DMA, etc. (EPO): |
This subclass is indented under subclass E12.033. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P4P. | |
E12.036 | ...... With software control, e.g., noncacheable data, etc. (EPO): |
This subclass is indented under subclass E12.026. This subclass is substantially the same in scope as ECLA classification G06F12/08B4P6. | |
E12.037 | ..... With cache invalidating means (EPO): |
This subclass is indented under subclass E12.023. This subclass is substantially the same in scope as ECLA classification G06F12/08B4J. | |
E12.038 | ..... With shared cache (EPO): |
This subclass is indented under subclass E12.023. This subclass is substantially the same in scope as ECLA classification G06F12/08B4S. | |
E12.039 | ..... For multiprocessing or multitasking (EPO): |
This subclass is indented under subclass E12.023. This subclass is substantially the same in scope as ECLA classification G06F12/08B4T. | |
E12.04 | .... With main memory updating (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B2. | |
E12.041 | .... Organization and technology of caches (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B22. | |
E12.042 | ..... Of parts of caches, e.g., directory or tag array, etc. (EPO): |
This subclass is indented under subclass E12.041. This subclass is substantially the same in scope as ECLA classification G06F12/08B22D. | |
E12.043 | ..... With plurality of cache hierarchy levels (EPO): |
This subclass is indented under subclass E12.041. This subclass is substantially the same in scope as ECLA classification G06F12/08B22L. | |
E12.044 | .... Multiple simultaneous or quasi-simultaneous cache accessing (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B6. | |
E12.045 | ..... Cache with multiple tag or data arrays being simultaneously accessible (EPO): |
This subclass is indented under subclass E12.044. This subclass is substantially the same in scope as ECLA classification G06F12/08B6M. | |
E12.046 | ...... Partitioned cache, e.g., separate instruction and operand caches, etc. (EPO): |
This subclass is indented under subclass E12.045. This subclass is substantially the same in scope as ECLA classification G06F12/08B6M2. | |
E12.047 | ...... Cache with interleaved addressing (EPO): |
This subclass is indented under subclass E12.045. This subclass is substantially the same in scope as ECLA classification G06F12/08B6M4. | |
E12.048 | ..... Cache with multi-port tag or data arrays (EPO): |
This subclass is indented under subclass E12.044. This subclass is substantially the same in scope as ECLA classification G06F12/08B6N. | |
E12.049 | ..... Overlapped cache accessing, e.g., pipeline, etc. (EPO): |
This subclass is indented under subclass E12.044. This subclass is substantially the same in scope as ECLA classification G06F12/08B6P. | |
E12.05 | ...... By multiple requestors (EPO): |
This subclass is indented under subclass E12.049. This subclass is substantially the same in scope as ECLA classification G06F12/08B6P2. | |
E12.051 | ...... With reload from main memory (EPO): |
This subclass is indented under subclass E12.049. This subclass is substantially the same in scope as ECLA classification G06F12/08B6P4. | |
E12.052 | .... Cache access modes (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B16. | |
E12.053 | ..... Burst mode (EPO): |
This subclass is indented under subclass E12.052. This subclass is substantially the same in scope as ECLA classification G06F12/08B16B. | |
E12.054 | ..... Page mode (EPO): |
This subclass is indented under subclass E12.052. This subclass is substantially the same in scope as ECLA classification G06F12/08B16D. | |
E12.055 | ..... Parallel mode, e.g., in parallel with main memory or CPU, etc. (EPO): |
This subclass is indented under subclass E12.052. This subclass is substantially the same in scope as ECLA classification G06F12/08B16F. | |
E12.056 | ..... Variable-length word access (EPO): |
This subclass is indented under subclass E12.052. This subclass is substantially the same in scope as ECLA classification G06F12/08B16V. | |
E12.057 | .... With pre-fetch (EPO): |
This subclass is indented under subclass E12.017. This subclass is substantially the same in scope as ECLA classification G06F12/08B8. | |
E12.058 | ... Address translation (EPO): |
This subclass is indented under subclass E12.016. This subclass is substantially the same in scope as ECLA classification G06F12/10. | |
E12.059 | .... Using page tables, e.g., page table structures, etc. (EPO): |
This subclass is indented under subclass E12.058. This subclass is substantially the same in scope as ECLA classification G06F12/10D. | |
E12.06 | ..... Involving hashing techniques, e.g., inverted page tables, etc. (EPO): |
This subclass is indented under subclass E12.059. This subclass is substantially the same in scope as ECLA classification G06F12/10D2. | |
E12.061 | .... Using associative or pseudo-associative address translation means, e.g., translation look-aside buffer (TLB), address translation buffer (ATB), address cache, etc. (EPO): |
This subclass is indented under subclass E12.058. This subclass is substantially the same in scope as ECLA classification G06F12/10L. | |
E12.062 | ..... Associated with data cache (EPO): |
This subclass is indented under subclass E12.061. This subclass is substantially the same in scope as ECLA classification G06F12/10L4. | |
E12.063 | ...... Data cache being concurrently physically addressed (EPO): |
This subclass is indented under subclass E12.062. This subclass is substantially the same in scope as ECLA classification G06F12/10L4P. | |
E12.064 | ...... Data cache being concurrently virtually addressed (EPO): |
This subclass is indented under subclass E12.062. This subclass is substantially the same in scope as ECLA classification G06F12/10L4V. | |
E12.065 | ..... For multiple virtual address spaces, e.g., segmentation, etc. (EPO): |
This subclass is indented under subclass E12.061. This subclass is substantially the same in scope as ECLA classification G06F12/10L2. | |
E12.066 | .... Decentralized address translation, e.g., in distributed shared memory systems, etc. (EPO): |
This subclass is indented under subclass E12.058. This subclass is substantially the same in scope as ECLA classification G06F12/10M. | |
E12.067 | .... For peripheral accesses to main memory, e.g., DMA, etc. (EPO): |
This subclass is indented under subclass E12.058. This subclass is substantially the same in scope as ECLA classification G06F12/10P. | |
E12.068 | .... For multiple virtual address spaces, e.g., segmentation, etc. (EPO): |
This subclass is indented under subclass E12.058. This subclass is substantially the same in scope as ECLA classification G06F12/10S. | |
E12.069 | ... Replacement control (EPO): |
This subclass is indented under subclass E12.016. This subclass is substantially the same in scope as ECLA classification G06F12/12. | |
E12.07 | .... Using replacement algorithm (EPO): |
This subclass is indented under subclass E12.069. This subclass is substantially the same in scope as ECLA classification G06F12/12B. | |
E12.071 | ..... Of the least frequently used type, e.g., with individual count value, etc. (EPO): |
This subclass is indented under subclass E12.07. This subclass is substantially the same in scope as ECLA classification G06F12/12B2. | |
E12.072 | ..... With age list, e.g., queue, MRU-LRU list, etc. (EPO): |
This subclass is indented under subclass E12.07. This subclass is substantially the same in scope as ECLA classification G06F12/12B4. | |
E12.073 | ...... Being minimized, e.g., nonMRU, etc. (EPO): |
This subclass is indented under subclass E12.072. This subclass is substantially the same in scope as ECLA classification G06F12/12B4B. | |
E12.074 | ...... Being generated by decoding array or storage (EPO): |
This subclass is indented under subclass E12.072. This subclass is substantially the same in scope as ECLA classification G06F12/12B4C. | |
E12.075 | ..... With special data handling, e.g., priority of data or instructions, pinning, errors, etc. (EPO): |
This subclass is indented under subclass E12.07. This subclass is substantially the same in scope as ECLA classification G06F12/12B6. | |
E12.076 | ...... Using additional replacement algorithm (EPO): |
This subclass is indented under subclass E12.075. This subclass is substantially the same in scope as ECLA classification G06F12/12B6B. | |
E12.077 | ..... Adapted to multidimensional cache systems, e.g., set-associative, multi-cache, multi-set, or multilevel, etc. (EPO): |
This subclass is indented under subclass E12.07. This subclass is substantially the same in scope as ECLA classification G06F12/12B8. | |
E12.078 | .. Addressing physical block of locations, e.g., base addressing, module addressing, memory dedication, etc. (EPO): |
This subclass is indented under subclass E12.002. This
subclass is substantially the same in scope as ECLA classification
G06F12/06.
SEE OR SEARCH THIS CLASS, SUBCLASS:
| |||||
E12.079 | ... Interleaved addressing (EPO): |
This subclass is indented under subclass E12.078. This subclass is substantially the same in scope as ECLA classification G06F12/06A. | |
E12.08 | ... Address space extension (EPO): |
This subclass is indented under subclass E12.078. This subclass is substantially the same in scope as ECLA classification G06F12/06C. | |
E12.081 | .... For memory modules (EPO): |
This subclass is indented under subclass E12.08. This subclass is substantially the same in scope as ECLA classification G06F12/06C2. | |
E12.082 | .... For I/O modules, e.g., memory mapped I/O, etc. (EPO): |
This subclass is indented under subclass E12.08. This subclass is substantially the same in scope as ECLA classification G06F12/06C4. | |
E12.083 | ... Combination of memories, e.g., ROM and RAM, etc., to permit replacement or supplementing of words in one module by words in another module (EPO): |
This subclass is indented under subclass E12.078. This subclass is substantially the same in scope as ECLA classification G06F12/06D. | |
E12.084 | ... Configuration or reconfiguration (EPO): |
This subclass is indented under subclass E12.078. This subclass is substantially the same in scope as ECLA classification G06F12/06K. | |
E12.085 | .... With centralized address assignment (EPO): |
This subclass is indented under subclass E12.084. This subclass is substantially the same in scope as ECLA classification G06F12/06K2. | |
E12.086 | ..... And decentralized selection (EPO): |
This subclass is indented under subclass E12.085. This subclass is substantially the same in scope as ECLA classification G06F12/06K2D. | |
E12.087 | .... With decentralized address assignment (EPO): |
This subclass is indented under subclass E12.084. This subclass is substantially the same in scope as ECLA classification G06F12/06K4. | |
E12.088 | ..... Address being position dependent (EPO): |
This subclass is indented under subclass E12.087. This subclass is substantially the same in scope as ECLA classification G06F12/06K4P. | |
E12.089 | .... With feedback, e.g., presence or absence of unit detected by addressing, overflow detection, etc. (EPO): |
This subclass is indented under subclass E12.084. This subclass is substantially the same in scope as ECLA classification G06F12/06K6. | |
E12.09 | .... Multi-configuration, e.g., local and global addressing, etc. (EPO): |
This subclass is indented under subclass E12.084. This subclass is substantially the same in scope as ECLA classification G06F12/06K8. | |
E12.091 | . Protection against unauthorized use of memory (EPO): |
This subclass is indented under subclass E12.001. This
subclass is substantially the same in scope as ECLA classification
G06F12/14.
| |||
E12.092 | .. By using cryptography (EPO): |
This subclass is indented under subclass E12.091. This subclass is substantially the same in scope as ECLA classification G06F12/14B. | |
E12.093 | .. By checking subject access rights (EPO): |
This subclass is indented under subclass E12.091. This subclass is substantially the same in scope as ECLA classification G06F12/14D. | |
E12.094 | ... Key-lock mechanism (EPO): |
This subclass is indented under subclass E12.093. This subclass is substantially the same in scope as ECLA classification G06F12/14D1. | |
E12.095 | .... In virtual system, e.g., with translation means, etc. (EPO): |
This subclass is indented under subclass E12.094. This subclass is substantially the same in scope as ECLA classification G06F12/14D1A. | |
E12.096 | ... Using access table, e.g., matrix or list, etc. (EPO): |
This subclass is indented under subclass E12.093. This subclass is substantially the same in scope as ECLA classification G06F12/14D2. | |
E12.097 | ... In hierarchical protection system, e.g., privilege levels, memory rings, etc. (EPO): |
This subclass is indented under subclass E12.093. This subclass is substantially the same in scope as ECLA classification G06F12/14D3. | |
E12.098 | .. By checking object accessibility, e.g., type of access defined by the memory independently of subject rights, etc. (EPO): |
This subclass is indented under subclass E12.091. This subclass is substantially the same in scope as ECLA classification G06F12/14C. | |
E12.099 | ... Protection being physical, e.g., cell, word, block, etc. (EPO): |
This subclass is indented under subclass E12.098. This subclass is substantially the same in scope as ECLA classification G06F12/14C1. | |
E12.1 | .... For module or part of module (EPO): |
This subclass is indented under subclass E12.099. This subclass is substantially the same in scope as ECLA classification G06F12/14C1A. | |
E12.101 | .... For range (EPO): |
This subclass is indented under subclass E12.099. This subclass is substantially the same in scope as ECLA classification G06F12/14C1B. | |
E12.102 | ... Protection being virtual, e.g., for virtual blocks or segments before translation mechanism, etc. (EPO): |
This subclass is indented under subclass E12.098. This subclass is substantially the same in scope as ECLA classification G06F12/14C2. | |
E12.103 | . Protection against loss of memory contents (EPO): |
This subclass is indented under subclass E12.001. This subclass is substantially the same in scope as ECLA classification G06F12/16. | |
FOR000 | CLASS-RELATED FOREIGN DOCUMENTS |
This subclass has no definition. | |