US 9,813,679 B2
Solid-state imaging apparatus with on-chip lens and micro-lens
Kensaku Maeda, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed by SONY CORPORATION, Tokyo (JP)
Filed on Jul. 24, 2015, as Appl. No. 14/808,101.
Application 14/808,101 is a continuation of application No. 13/635,262, granted, now 9,110,210, previously published as PCT/JP2012/050837, filed on Jan. 17, 2012.
Claims priority of application No. 2011-014111 (JP), filed on Jan. 26, 2011.
Prior Publication US 2015/0334358 A1, Nov. 19, 2015
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/146 (2006.01); H04N 9/04 (2006.01); H04N 5/378 (2011.01); H04N 5/376 (2011.01); H04N 5/374 (2011.01); G02B 3/00 (2006.01)
CPC H04N 9/045 (2013.01) [G02B 3/005 (2013.01); G02B 3/0056 (2013.01); G02B 3/0068 (2013.01); H01L 27/14627 (2013.01); H01L 27/14685 (2013.01); H04N 5/374 (2013.01); H04N 5/378 (2013.01); H04N 5/3765 (2013.01)] 8 Claims
OG exemplary drawing
 
1. An electric apparatus, comprising:
signal processing circuitry; and
an imaging device, wherein the imaging device comprises:
a plurality of photoelectric conversion units two-dimensionally arranged;
a plurality of on-chip lenses two-dimensionally arranged in correspondence with respective ones of the plurality of photoelectric conversion units;
a micro-lens in a light receiving side of the plurality of on-chip lenses,
wherein light is incident on the plurality of on-chip lenses through the micro lens; and
a transparent material layer pinched between the plurality of on-chip lenses and the micro-lens,
wherein the signal processing circuitry is configured to process a signal output from the imaging device.