US 9,813,577 B2
Image forming apparatus, activation control method, and non-transitory computer-readable recording medium encoded with activation control program
Takehisa Yamaguchi, Ikoma (JP); Atsushi Ohshima, Amagasaki (JP); Toshihiko Otake, Ikeda (JP); Hiroaki Kubo, Muko (JP); Masaya Hashimoto, Itami (JP); Toshimichi Iwai, Nara-ken (JP); Tomoaki Nakajima, Kobe (JP); and Takeshi Morikawa, Takarazuka (JP)
Assigned to KONICA MINOLTA, INC., Chiyoda-Ku, Tokyo (JP)
Filed by Konica Minolta, Inc., Chiyoda-ku, Tokyo (JP)
Filed on Aug. 12, 2015, as Appl. No. 14/824,585.
Claims priority of application No. 2014-167451 (JP), filed on Aug. 20, 2014.
Prior Publication US 2016/0057304 A1, Feb. 25, 2016
Int. Cl. H04N 1/00 (2006.01)
CPC H04N 1/00904 (2013.01) [H04N 1/00891 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An image forming apparatus comprising:
a main processor to execute a program;
a first memory to store an executable program loaded by the main processor to execute a program, the first memory being a volatile memory;
a sub processor to activate the main processor; and
a second memory accessible by the main processor and the sub processor, the second memory being a nonvolatile memory,
the second memory storing, for each of a plurality of sets including one or more of a plurality of programs executable by the main processor, a snapshot that includes an executable program obtained by the main processor loading one or more programs included in the set into the first memory,
one of the main processor and the sub processor executing an association step of associating any one of a plurality of activation factors with each of a plurality of snapshots respectively corresponding to the plurality of sets,
the main processor executing a mode switching step of switching an operation mode from a drive mode in which power is supplied to a stop mode in which power is not supplied,
the sub processor executing
a power supply control step of switching power supplied to the main processor and the first memory,
an activation factor detecting step of detecting any one of a plurality of activation factors while power is not supplied to the main processor, and
an activation step of activating the main processor in response to any one of the plurality of activation factors being detected in the activation factor detecting step,
the power supply control step including
a cutoff step of cutting off power supplied to the main processor and the first memory in response to an operation mode being switched to the stop mode in the mode switching step, and
a power recovery step of supplying power to the main processor and the first memory before the main processor is activated in the activation step,
the main processor further executing a recovery step of, in response to being activated by the sub processor, reading out a snapshot associated with the detected activation factor in the association step from the second memory and storing the read snapshot into the first memory,
the activation step further includes a notification step of notifying the main processor of address information indicating a location where the snapshot associated with the detected activation factor in the association step is stored in the second memory, and
the recovery step includes a step of reading out a snapshot stored at the location specified by the address information given from the sub processor in the second memory and storing the read snapshot into the first memory.