US 9,813,348 B2
System for transmitting concurrent data flows on a network
Yves Durand, Saint Ismier (FR); and Alexandre Blampey, Sassenage (FR)
Assigned to KALRAY, Orsay (FR)
Appl. No. 14/367,050
Filed by KALRAY, Orsay (FR)
PCT Filed Dec. 19, 2012, PCT No. PCT/FR2012/000536
§ 371(c)(1), (2) Date Jun. 19, 2014,
PCT Pub. No. WO2013/093241, PCT Pub. Date Jun. 27, 2013.
Claims priority of application No. 11 61872 (FR), filed on Dec. 19, 2011.
Prior Publication US 2014/0301207 A1, Oct. 9, 2014
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 12/835 (2013.01); H04L 12/54 (2013.01); H04L 12/863 (2013.01); H04L 12/861 (2013.01); H04L 12/70 (2013.01)
CPC H04L 47/30 (2013.01) [H04L 12/5601 (2013.01); H04L 47/6255 (2013.01); H04L 49/9036 (2013.01); H04L 47/628 (2013.01); H04L 2012/5679 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A system for transmitting concurrent data flows on a network, the data flows being conveyed over the network in atomic transmission units of multiple data words, the system comprising:
a memory containing data of the data flows;
a plurality of queues assigned respectively to the data flows, the plurality of queues being connected to the memory to receive the data words;
a flow regulator configured to: (i) poll the queues in sequence at respective frequencies based on respective rate limits assigned to the queues, and (ii) transmit on the network any full transmission unit available in the queues polled by the flow regulator;
a sequencer configured to poll the queues in a round-robin manner and transmit a data request signal when a filling level of one of the queues polled by the sequencer is below a common threshold for all the queues; and
a direct memory access circuit configured to receive the data request signal and respond to the data request signal by transferring data words from the memory to the corresponding queue to fill space up to the common threshold, even if the available space is insufficient for a transmission unit.