US 9,813,163 B2
Integrated coherent receiver having a geometric arrangement for improved device efficiency
Fang Wu, Ottawa (CA); Yongbo Tang, Ottawa (CA); Yury Logvin, Ottawa (CA); Christopher D. Watson, Ottawa (CA); and Kirill Y. Pimenov, Ottawa (CA)
Assigned to Artic Photonics Inc., Ontario (CA)
Filed by ArtIC Photonics Inc., Ottawa (CA)
Filed on Mar. 23, 2016, as Appl. No. 15/78,330.
Claims priority of provisional application 62/136,830, filed on Mar. 23, 2015.
Claims priority of provisional application 62/136,976, filed on Mar. 23, 2015.
Prior Publication US 2016/0285561 A1, Sep. 29, 2016
Int. Cl. H04B 10/61 (2013.01); G02B 6/30 (2006.01); G02B 6/42 (2006.01); H04B 10/25 (2013.01); G02B 6/28 (2006.01)
CPC H04B 10/61 (2013.01) [G02B 6/305 (2013.01); G02B 6/4206 (2013.01); G02B 6/428 (2013.01); G02B 6/4295 (2013.01); H04B 10/25 (2013.01); G02B 6/2813 (2013.01); G02B 6/4213 (2013.01); G02B 6/4286 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A monolithically integrated optical coherent receiver chip having opposing chip input and output facets, the chip comprising:
first, second, and third optical inputs disposed at the chip input facet, wherein the first optical input corresponds to a local oscillator, the second optical input corresponds to an X-polarized signal, and the third optical input corresponds to a Y-polarized signal;
first and second 90° optical hybrids positioned on the chip and respectively designated for the X-polarized and Y-polarized signal, wherein the first and second optical hybrids each has two input waveguides and four output waveguides;
first and second pairs of four waveguide photodetectors respectively optically connected to the first and second optical hybrids by the corresponding four output waveguides, wherein optical axes of the waveguide photodetectors are oriented parallel to or within an angle up to 15 degrees to the chip input facet; and
first and second pairs of four transmission lines connecting electrical signals from the respective first and second pairs of waveguide photodetectors to corresponding electrical outputs of the chip aligned along the chip output facet,
wherein the corresponding four output waveguides of the first and second optical hybrids and the corresponding first and second pairs of four transmission lines form first and second pairs of four delay paths from outputs of the corresponding first and second optical hybrids to the corresponding electrical outputs of the chip,
wherein a net total delay imbalance between the delay paths is minimized,
wherein the first, second, and third optical inputs incorporate on-chip spot size converters with a mode size at the chip input facet matching that of a single mode fiber,
wherein a distance between the second and third optical inputs matches that of an external polarization beam splitter, and
wherein the first optical input is positioned away from the second and third optical inputs.