US 9,813,072 B2
Methods and apparatus to increase an integrity of mismatch corrections of an interleaved analog to digital converter
Sthanunathan Ramakrishnan, Bangalore (IN); Sashidharan Venkatraman, Hyderabad (IN); and Jaiganesh Balakrishnan, Bangalore (IN)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on May 3, 2016, as Appl. No. 15/145,375.
Claims priority of application No. 2557/CHE/2015 (IN), filed on May 22, 2015.
Prior Publication US 2016/0344400 A1, Nov. 24, 2016
Int. Cl. H03M 1/06 (2006.01); H03M 1/12 (2006.01); H03M 1/10 (2006.01)
CPC H03M 1/0626 (2013.01) [H03M 1/1009 (2013.01); H03M 1/1215 (2013.01)] 23 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an instantaneous mismatch estimator that uses an output of an interleaved analog to digital converter configured to identify a mismatch estimate between two or more component analog to digital converters of the interleaved analog to digital converter, wherein the mismatch estimate is provided to a filter; and
an integrity monitor configured to analyze the mismatch estimate to determine whether the mismatch estimate is inaccurate and, in response to determining that the mismatch estimate provided to the filter as inaccurate, providing an instruction to the filter to remove the mismatch estimate.