US 9,813,065 B2
Simultaneous LVDS I/O signaling method and apparatus
Lee D. Whetsel, Parker, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Sep. 30, 2016, as Appl. No. 15/282,345.
Application 15/282,345 is a division of application No. 13/890,856, filed on May 9, 2013, granted, now 9,484,921.
Application 13/890,856 is a division of application No. 13/196,355, filed on Aug. 2, 2011, granted, now 8,461,872.
Application 13/196,355 is a division of application No. 12/892,261, filed on Sep. 28, 2010, granted, now 8,013,634.
Application 12/892,261 is a division of application No. 12/560,673, filed on Sep. 16, 2009, granted, now 7,825,695.
Application 12/560,673 is a division of application No. 12/251,600, filed on Oct. 15, 2008, granted, now 7,612,584.
Application 12/251,600 is a division of application No. 11/555,349, filed on Nov. 1, 2006, granted, now 7,453,283.
Claims priority of provisional application 60/733,571, filed on Nov. 4, 2005.
Prior Publication US 2017/0117896 A1, Apr. 27, 2017
Int. Cl. H03K 19/0175 (2006.01); H04L 25/02 (2006.01)
CPC H03K 19/01759 (2013.01) [H04L 25/0272 (2013.01)] 4 Claims
OG exemplary drawing
 
1. A Low Voltage Differential Signaling (LVDS) input circuit comprising:
(a) a data input lead;
(b) a first LVDS signal path;
(c) a second LVDS signal path;
(d) an inverter having an input connected to the data input lead and an inverting output;
(e) an LVDS receiver having a non-inverting input connected to the first LVDS signal path, an inverting input connected to the second LVDS signal path, and an output;
(f) window comparator circuitry including:
(i) a first comparator having a non-inverting input connected to the first LVDS signal path, an inverting input connected to the second LVDS signal path, and an output;
(ii) a second comparator having a non-inverting input connected to the second LVDS signal path, an inverting input connected to the first LVDS signal path, and an output;
(iii) an OR gate having one input connected to the output of the first comparator, another input connected to the output of the second comparator, and a window comparator output; and
(g) a multiplexer having one input connected to the inverting output of the inverter, another input connected to the output of the LVDS receiver, a control input connected to the output of the window comparator, and an output.