US 9,813,026 B2
Amplifier arrangement
Andreas Fitzi, Staefa (CH)
Assigned to AMS AG, Unterpremstaetten (AT)
Appl. No. 15/100,278
Filed by ams AG, Unterpremstaetten (AT)
PCT Filed Sep. 25, 2014, PCT No. PCT/EP2014/070505
§ 371(c)(1), (2) Date May 27, 2016,
PCT Pub. No. WO2015/078611, PCT Pub. Date Jun. 4, 2015.
Claims priority of application No. 13194933 (EP), filed on Nov. 28, 2013.
Prior Publication US 2017/0005622 A1, Jan. 5, 2017
Int. Cl. H03F 3/45 (2006.01); H03F 1/26 (2006.01); H03F 3/21 (2006.01)
CPC H03F 1/26 (2013.01) [H03F 3/21 (2013.01); H03F 3/45183 (2013.01); H03F 3/45237 (2013.01); H03F 3/45273 (2013.01); H03F 2203/45352 (2013.01); H03F 2203/45366 (2013.01)] 12 Claims
OG exemplary drawing
 
1. An amplifier arrangement, comprising:
a first differential stage comprising at least two transistors having a first threshold voltage,
at least a second differential stage comprising at least two transistors having a second threshold voltage different from the first threshold voltage,
at least one of the transistors of the first and second differential stage, respectively, has a control input commonly coupled to an input of the amplifier arrangement,
at least one transistor of the first differential stage and one transistor of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement, and
the input of the amplifier arrangement comprising a differential input with two terminals, a first of which being coupled to the control input of at least one transistor of the first differential stage and to the control input of at least one transistor of the second differential stage, and a second of the differential input terminals being coupled to the control input of at least another transistor of the first differential stage and to the control input of at least another transistor of the second differential stage.