US 9,813,024 B2
Depleted silicon-on-insulator capacitive MOSFET for analog microcircuits
Vinod Kumar, Pratapgarh (IN)
Assigned to STMICROELECTRONICS INTERNATIONAL N.V., Amsterdam (NL)
Filed by STMicroelectronics International N.V., Amsterdam (NL)
Filed on Dec. 31, 2015, as Appl. No. 14/985,759.
Application 14/985,759 is a division of application No. 14/219,786, filed on Mar. 19, 2014.
Prior Publication US 2016/0112011 A1, Apr. 21, 2016
Int. Cl. H03F 1/02 (2006.01); H01L 29/78 (2006.01); H01L 29/94 (2006.01); H01L 29/66 (2006.01); H01L 21/84 (2006.01); G05F 3/16 (2006.01); H03K 17/687 (2006.01); H03L 7/093 (2006.01); H03F 3/193 (2006.01); H01L 29/786 (2006.01)
CPC H03F 1/0205 (2013.01) [G05F 3/16 (2013.01); H01L 21/84 (2013.01); H01L 29/66181 (2013.01); H01L 29/7831 (2013.01); H01L 29/78603 (2013.01); H01L 29/78648 (2013.01); H01L 29/94 (2013.01); H03F 3/193 (2013.01); H03K 17/687 (2013.01); H03L 7/093 (2013.01); H03F 2200/451 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A microcircuit, comprising:
a voltage supply;
an operational amplifier electrically coupled to the voltage supply, the operational amplifier having inverting and non-inverting input terminals and an output terminal; and
a dual gate capacitive field effect transistor including:
a primary gate coupled to the output terminal of the operational amplifier;
a secondary gate coupled to a ground reference voltage;
a source region coupled to the voltage supply; and
a drain region coupled to the voltage supply, the transistor including a doped substrate and a buried oxide layer on the doped substrate, and a decoupling capacitor having a first electrode including the source and drain regions and a second electrode including the secondary gate.