US 9,812,950 B2
PFC control circuit, digital PFC circuit and the method thereof
Wenbin Lu, Hangzhou (CN); Sicong Lin, Hangzhou (CN); Qiming Zhao, Hangzhou (CN); Lijie Jiang, Hangzhou (CN); and Guangchao Zhang, San Jose, CA (US)
Assigned to Chengdu Monolithic Power Systems Co., Ltd., Chengdu (CN)
Filed by Chengdu Monolithic Power Systems Co., Ltd., Chengdu (CN)
Filed on Jun. 11, 2015, as Appl. No. 14/737,459.
Claims priority of application No. 2014 1 0257725 (CN), filed on Jun. 11, 2014.
Prior Publication US 2015/0364988 A1, Dec. 17, 2015
Int. Cl. H02M 1/42 (2007.01); H02M 1/00 (2006.01)
CPC H02M 1/4208 (2013.01) [H02M 1/4225 (2013.01); H02M 2001/0012 (2013.01); Y02B 70/126 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A PFC control circuit used in a power converting system, the power converting system including an input capacitor, the power converting system configured to receive an input line voltage and generate an output voltage by controlling a power switch, the PFC control circuit comprising:
an analogue to digital unit, configured to receive a feed forward signal indicative of the input line voltage, to generate a digital voltage signal;
a cycle calculating unit, configured to receive the digital voltage signal, to calculate a cycle of the input line voltage to generate a cycle signal;
a compensation current generating unit, configured to receive the cycle signal to generate a compensation current, wherein the compensation current is complementary to a current flowing through the input capacitor;
a reference current adjust unit, configured to receive the compensation current, to execute an operation on the compensation current and an original reference current signal, to generate an adjusted reference current signal; and
a PFC controller, configured to receive the adjusted reference current signal and a current sense signal indicative of a current flowing through the power switch, to generate a logical control signal to control the power switch;
wherein the cycle calculating unit comprises:
a peak detecting module, configured to receive the digital voltage signal to detect a peak value of the digital voltage signal, and to generate a peak signal;
a threshold setting module, configured to receive the peak signal to generate a first threshold and a second threshold with close voltage levels with each other, wherein both the first threshold and the second threshold are lower than the peak signal;
a threshold detecting module, configured to receive the first threshold and the second threshold, and configured to receive the digital voltage signal, to generate a trig signal when the digital voltage signal at its right half cycle is between the first threshold and the second threshold; and
a time counter module, configured to receive the trig signal to generate the cycle signal, wherein a time interval of successive two beings between the first threshold and the second threshold of the digital voltage signal at its right half cycle is the cycle of the input line voltage.