US 9,812,639 B2
Non-volatile memory device
Koji Matsuo, Ama (JP); Yoshiaki Asao, Yokkaichi (JP); and Kunifumi Suzuki, Yokohama (JP)
Assigned to TOSHIBA MEMORY CORPORATION, Minato-ku (JP)
Filed by Toshiba Memory Corporation, Minato-ku (JP)
Filed on Dec. 3, 2014, as Appl. No. 14/559,195.
Claims priority of provisional application 62/048,405, filed on Sep. 10, 2014.
Prior Publication US 2016/0072061 A1, Mar. 10, 2016
Int. Cl. H01L 45/00 (2006.01); H01L 27/24 (2006.01)
CPC H01L 45/1233 (2013.01) [H01L 27/2409 (2013.01); H01L 27/2481 (2013.01); H01L 45/06 (2013.01); H01L 45/144 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A non-volatile memory device comprising:
a first interconnection;
a second interconnection closest to the first interconnection in a first direction;
a first rectifying portion disposed between the first interconnection and the second interconnection, the first rectifying portion including a first metal oxide layer and a second metal oxide layer stacked in the first direction;
a second rectifying portion provided between the first rectifying portion and the second interconnection, the second rectifying portion including another first metal oxide layer and another second metal oxide layer stacked in the first direction; and
a first resistance change portion disposed between the first rectifying portion and the second rectifying portion; and
a second resistance change portion disposed between the second interconnection and the second rectifying portion,
the first metal oxide layer and the another second metal oxide layer being in contact with the first resistance change portion.