| US 9,812,621 B2 | ||
| Semiconductor device and fabrication method for same | ||
| Masamichi Ishihara, Kitakyushu (JP); Kenshu Oyama, Ogori (JP); Shoji Murakami, Nakatado-gun (JP); and Hitonobu Onosaka, Nakatado-gun (JP) | ||
| Assigned to SHIKOKU INSTRUMENTATION CO., LTD., Kagawa (JP) | ||
| Appl. No. 14/236,584 |
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| Filed by Masamichi Ishihara, Kitakyushu (JP); Kenshu Oyama, Ogori (JP); Shoji Murakami, Nakatado-gun (JP); and Hitonobu Onosaka, Nakatado-gun (JP) | ||
| PCT Filed Jul. 31, 2012, PCT No. PCT/JP2012/069390 § 371(c)(1), (2), (4) Date Apr. 23, 2014, PCT Pub. No. WO2013/018783, PCT Pub. Date Feb. 7, 2013. |
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| Claims priority of application No. 2011-168734 (JP), filed on Aug. 1, 2011; application No. 2011-245821 (JP), filed on Nov. 9, 2011; and application No. 2012-129643 (JP), filed on Jun. 7, 2012. | ||
| Prior Publication US 2014/0327024 A1, Nov. 6, 2014 | ||
| Int. Cl. H01L 33/60 (2010.01); H01L 25/075 (2006.01); H01L 23/00 (2006.01); H05K 1/05 (2006.01); H01L 33/62 (2010.01) | ||
| CPC H01L 33/60 (2013.01) [H01L 24/97 (2013.01); H01L 25/0753 (2013.01); H05K 1/056 (2013.01); H01L 33/62 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48228 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/97 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/07802 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/15747 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/181 (2013.01); H05K 2201/0209 (2013.01); H05K 2201/10106 (2013.01); H05K 2201/2054 (2013.01)] | 14 Claims |
| 1. A semiconductor device comprising:
a first substrate to which a semiconductor chip is directly or indirectly mounted,
a white insulating layer formed on a reflecting region of the first substrate and functioning as a reflecting material, and
a wiring pattern connected to electrodes is formed on the white insulating layer,
wherein a surface of the reflecting region is substantially flat and made of a metal, and the white insulating layer is formed
on the surface of the reflecting region wherein the semiconductor chip is an LED chip disposed in the reflecting region,
wherein the wiring pattern is formed on the surface of the white insulating layer,
wherein the white insulating layer includes white inorganic pigments and SiO2 particles having a mean particle diameter of several nm to several hundred nm,
wherein a rate of SiO2 particles and the white inorganic pigment contained in the white insulating layer is 80% by weight or greater,
wherein a rate of the white inorganic pigments contained in the white insulating layer is 40% by weight or greater,
wherein a rate of the SiO2 particles contained in the white insulating layer is 25% by weight or greater, and
wherein a bottom surface or a side surface of the LED chip is adjacent to the white insulating layer.
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