| US 9,812,585 B2 | ||
| Semiconductor device | ||
| Shunpei Yamazaki, Setagaya (JP) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP) | ||
| Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (JP) | ||
| Filed on Oct. 2, 2014, as Appl. No. 14/505,002. | ||
| Claims priority of application No. 2013-208764 (JP), filed on Oct. 4, 2013. | ||
| Prior Publication US 2015/0097181 A1, Apr. 9, 2015 | ||
| Int. Cl. H01L 29/786 (2006.01); H01L 29/04 (2006.01) | ||
| CPC H01L 29/78696 (2013.01) [H01L 29/045 (2013.01); H01L 29/7869 (2013.01); H01L 29/78648 (2013.01)] | 15 Claims |
| 1. A semiconductor device comprising:
an oxide semiconductor layer; and
a pair of electrodes in contact with the oxide semiconductor layer, the pair of electrodes including at least one of copper,
aluminum, gold, and silver,
wherein the oxide semiconductor layer has a stacked-layer structure comprising:
a first oxide semiconductor layer comprising a channel;
a second oxide semiconductor layer; and
a third oxide semiconductor layer between the first oxide semiconductor layer and the second oxide semiconductor layer,
wherein energy at a bottom of a conduction band of the second oxide semiconductor layer is smaller than energy at a bottom
of a conduction band of the third oxide semiconductor layer and larger than energy at a bottom of a conduction band of the
first oxide semiconductor layer, and
wherein the second oxide semiconductor layer includes a crystal part having c-axis alignment.
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