US 9,812,583 B2
Semiconductor device
Takahiro Sato, Tochigi (JP); Yasutaka Nakazawa, Tochigi (JP); Takayuki Cho, Tochigi (JP); Shunsuke Koshioka, Tochigi (JP); Hajime Tokunaga, Yokohama (JP); and Masami Jintyou, Shimotsuga (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (JP)
Filed on Jun. 20, 2016, as Appl. No. 15/187,106.
Application 15/187,106 is a continuation of application No. 14/878,399, filed on Oct. 8, 2015, granted, now 9,449,819.
Application 14/878,399 is a continuation of application No. 14/733,489, filed on Jun. 8, 2015, granted, now 9,219,165, issued on Dec. 22, 2015.
Application 14/733,489 is a continuation of application No. 14/073,993, filed on Nov. 7, 2013, granted, now 9,087,726, issued on Jul. 21, 2015.
Claims priority of application No. 2012-251794 (JP), filed on Nov. 16, 2012.
Prior Publication US 2016/0293641 A1, Oct. 6, 2016
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/786 (2006.01); H01L 29/10 (2006.01); H01L 21/02 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 27/12 (2006.01); H01L 27/32 (2006.01); H01L 29/04 (2006.01); H01L 29/06 (2006.01); H01L 29/24 (2006.01); H01L 29/423 (2006.01); H01L 21/306 (2006.01); H01L 29/66 (2006.01); H01L 21/465 (2006.01)
CPC H01L 29/7869 (2013.01) [G02F 1/1368 (2013.01); G02F 1/136277 (2013.01); H01L 21/02365 (2013.01); H01L 21/02403 (2013.01); H01L 21/02422 (2013.01); H01L 21/02551 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01); H01L 21/02631 (2013.01); H01L 21/30604 (2013.01); H01L 21/465 (2013.01); H01L 27/1225 (2013.01); H01L 27/1259 (2013.01); H01L 27/3248 (2013.01); H01L 29/045 (2013.01); H01L 29/0657 (2013.01); H01L 29/1033 (2013.01); H01L 29/24 (2013.01); H01L 29/42356 (2013.01); H01L 29/66742 (2013.01); H01L 29/66969 (2013.01); H01L 29/786 (2013.01); H01L 29/78693 (2013.01); H01L 29/78696 (2013.01)] 33 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a transistor, wherein the transistor comprises:
an oxide film;
an oxide semiconductor film over the oxide film, the oxide semiconductor film comprising a channel formation region;
a gate electrode; and
a gate insulating film between the oxide semiconductor film and the gate electrode,
wherein the oxide semiconductor film has an angle formed between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film, the angle being greater than or equal to 10° and less than 90°,
wherein each of the oxide film and the oxide semiconductor film comprises In and M (M is one selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Nd), and the oxide film has a lower atomic ratio of In to M than the oxide semiconductor film, and
wherein the oxide semiconductor film comprises a crystal part.