US 9,812,577 B2
Semiconductor structure and fabricating method thereof
Che-Cheng Chang, New Taipei (TW); Tung-Wen Cheng, Hsinchu (TW); Chang-Yin Chen, Taipei (TW); and Mu-Tsang Lin, Changhua County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Sep. 5, 2014, as Appl. No. 14/478,915.
Prior Publication US 2016/0071980 A1, Mar. 10, 2016
Int. Cl. H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/3105 (2006.01); H01L 21/3213 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/08 (2006.01); H01L 29/165 (2006.01); H01L 21/311 (2006.01)
CPC H01L 29/7851 (2013.01) [H01L 21/0223 (2013.01); H01L 21/30604 (2013.01); H01L 21/31055 (2013.01); H01L 21/31144 (2013.01); H01L 21/32133 (2013.01); H01L 21/32139 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/42368 (2013.01); H01L 29/495 (2013.01); H01L 29/4958 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/6656 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/7848 (2013.01); H01L 21/02255 (2013.01); H01L 21/31116 (2013.01); H01L 21/31122 (2013.01); H01L 21/32136 (2013.01); H01L 29/51 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of fabricating a semiconductor structure, comprising:
forming a gate dielectric layer and a dummy gate stack on a substrate;
etching the dummy gate stack to form a dummy gate structure;
etching the gate dielectric layer to form a recess under the dummy gate structure;
forming a protection layer surrounding the dummy gate structure and filling the recess;
forming a cavity adjacent to the dummy gate structure by etching the substrate and a portion of the protection layer such that the protection layer has an inner-beveled part;
forming an epitaxy in the cavity next to the protection layer;
removing the protection layer on the dummy gate structure to form two spacers from the protection layer, each of the spacers having a skirting part beneath the dummy gate structure and the inner-beveled part contacting the epitaxy;
removing the dummy gate structure on the gate dielectric layer;
removing the gate dielectric layer; and
forming a metal gate structure between the spacers.