US 9,812,576 B2
Semiconductor device and manufacturing method thereof
Wei-Yang Lee, Taipei (TW); Feng-Cheng Yang, Hsinchu County (TW); and Ting-Yeh Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Dec. 29, 2016, as Appl. No. 15/393,812.
Application 15/393,812 is a continuation of application No. 15/060,270, filed on Mar. 3, 2016, granted, now 9,570,556.
Prior Publication US 2017/0256639 A1, Sep. 7, 2017
Int. Cl. H01L 21/336 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01)
CPC H01L 29/785 (2013.01) [H01L 21/762 (2013.01); H01L 29/0649 (2013.01); H01L 29/66795 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a source/drain structure for a fin field effect transistor (FinFET), the method comprising:
forming a first fin structure and a second fin structure over a substrate so as to protrude from an isolation insulating layer disposed over the substrate;
forming a gate structure over parts of the first and second fin structures;
recessing upper portions of the first and second fin structures, which are not covered by the gate structure;
forming a first epitaxial layer over the recessed first and second fin structures; and
forming a second epitaxial layer over the first epitaxial layer, thereby forming the source/drain structure,
wherein the source/drain structure includes a first void enclosed by the first epitaxial layer and the second epitaxial layer.