US 9,812,563 B2
Transistor with field electrodes and improved avalanche breakdown behavior
Ralf Siemieniec, Villach (AT); Markus Zundel, Egmating (DE); Karl-Heinz Bach, Groebenzell (DE); Franz Hirler, Isen (DE); Christian Kampen, Munich (DE); and Werner Schustereder, Villach (AT)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Jun. 14, 2016, as Appl. No. 15/182,244.
Claims priority of application No. 10 2015 109 545 (DE), filed on Jun. 15, 2015.
Prior Publication US 2016/0365441 A1, Dec. 15, 2016
Int. Cl. H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01)
CPC H01L 29/7813 (2013.01) [H01L 21/265 (2013.01); H01L 21/2652 (2013.01); H01L 29/063 (2013.01); H01L 29/0696 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/408 (2013.01); H01L 29/66734 (2013.01); H01L 21/324 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A transistor device comprising at least one transistor cell, wherein the at least one transistor cell comprises:
in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second doping type, and a drain region of the first doping type, wherein the body region is arranged between the source region and the drift region, and wherein the drift region is arranged between the body region and the drain region;
a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric; and
a field electrode dielectrically insulated from the drift region by a field electrode dielectric;
wherein the drift region comprises an avalanche region which has a higher doping concentration than sections of the drift region adjacent the avalanche region and is spaced apart from the field electrode dielectric in a direction perpendicular to a current flow direction of the transistor device,
wherein the field electrode is arranged in a trench having a bottom in a bottom plane of the semiconductor body,
wherein the avalanche region includes at least one section that is closer to the bottom plane than to a surface of the semiconductor body defined by the source region,
wherein the avalanche region is spaced apart from a pn junction between the body region and the drift region in the current flow direction of the transistor device.