| US 9,812,555 B2 | ||
| Bottom-gate thin-body transistors for stacked wafer integrated circuits | ||
| Raminda Madurawe, Sunnyvale, CA (US); Hamid Soleimani, Cupertino, CA (US); and Irfan Rahim, Milpitas, CA (US) | ||
| Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US) | ||
| Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US) | ||
| Filed on May 28, 2015, as Appl. No. 14/723,719. | ||
| Prior Publication US 2016/0353038 A1, Dec. 1, 2016 | ||
| Int. Cl. H01L 21/00 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 29/786 (2006.01); H01L 29/06 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 23/48 (2006.01); H01L 27/146 (2006.01) | ||
| CPC H01L 29/66742 (2013.01) [H01L 21/84 (2013.01); H01L 23/481 (2013.01); H01L 27/12 (2013.01); H01L 27/1463 (2013.01); H01L 27/1469 (2013.01); H01L 27/14612 (2013.01); H01L 27/14616 (2013.01); H01L 27/14634 (2013.01); H01L 27/14689 (2013.01); H01L 29/0649 (2013.01); H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 29/78696 (2013.01); H01L 27/1464 (2013.01); H01L 2029/42388 (2013.01)] | 16 Claims |
| 1. A transistor in an integrated circuit, comprising:
a substrate having a first surface and a second surface;
a gate conductor formed over the first surface of the substrate;
a dielectric layer formed over the second surface of the substrate; and
a gate terminal contact that is formed over the dielectric layer, wherein the gate terminal contact passes through the dielectric
layer and the substrate to directly contact the gate conductor.
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