US 9,812,521 B2
Embedded passive chip device and method of making the same
Min-Ho Hsiao, Miaoli County (TW); Pang-Yen Lee, Miaoli County (TW); and Yen-Hao Tseng, Miaoli County (TW)
Assigned to WAFER MEMS CO., LTD., Jhunan Township, Miaoli County (TW)
Filed by Wafer Mems Co., LTD., Miaoli County (TW)
Filed on May 12, 2016, as Appl. No. 15/152,877.
Claims priority of application No. 104120532 A (TW), filed on Jun. 25, 2015.
Prior Publication US 2016/0380041 A1, Dec. 29, 2016
Int. Cl. H01L 21/326 (2006.01); H01L 49/02 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01F 41/04 (2006.01); H01L 23/64 (2006.01)
CPC H01L 28/10 (2013.01) [H01F 41/04 (2013.01); H01L 21/76873 (2013.01); H01L 21/78 (2013.01); H01L 23/645 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A method of making an embedded passive chip device comprising:
forming a patterned wafer which has a peripheral end portion and at least one passive-component unit that includes a connecting portion, a breaking line, and a plurality of spaced apart chip bodies, the connecting portion being connected to the peripheral end portion, the breaking line having a plurality of connecting tabs that are spaced apart from one another, each of the connecting tabs being disposed between and interconnecting the connecting portion and a respective one of the chip bodies, each of the chip bodies having a circuit-forming surface that is formed with a recess;
forming a functional layered structure on each of the chip bodies, the functional layered structure including a conductive layer that has at least a portion which covers at least partially the circuit-forming surface, and a magnetic layer that is disposed within the recess and that is inductively coupled to the conductive layer for generating inductance; and
breaking the patterned wafer along the breaking line by applying an external force thereto so as to form a plurality of embedded passive chip devices.