US 9,812,450 B2
Semiconductor devices and methods of manufacturing the same
Jong-Min Baek, Seoul (KR); Sang-Hoon Ahn, Goyang-si (KR); Woo-Kyung You, Incheon (KR); Byung-Hee Kim, Seoul (KR); Young-Ju Park, Hwaseong-si (KR); Nae-in Lee, Seoul (KR); and Kyung-Min Chung, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-do (KR)
Filed on Jan. 26, 2016, as Appl. No. 15/6,265.
Claims priority of application No. 10-2015-0052108 (KR), filed on Apr. 14, 2015.
Prior Publication US 2016/0307842 A1, Oct. 20, 2016
Int. Cl. H01L 23/522 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01)
CPC H01L 27/0886 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823475 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a plurality of wiring structures that are spaced apart from each other, each of the wiring structures including:
a metal pattern; and
a barrier pattern on a sidewall of the metal pattern, a bottom surface of the metal pattern, and an edge portion of a top surface of the metal pattern and not on a central portion of the top surface of the metal pattern; and
an insulating interlayer structure that contains the wiring structures therein and that includes an air gap between the wiring structures; and
a diffusion barrier layer on a top surface and at least a sidewall of each of the wiring structures,
wherein the diffusion barrier layer covers a sidewall of each of the wiring structures that are adjacent to the air gap, wherein a top surface of the air gap is higher than a top surface of the wiring structures.