US 9,812,448 B2
Semiconductor devices and methods for fabricating the same
Oh-Seong Kwon, Hwaseong-si (KR); Jin-Kyu Jang, Hwaseong-si (KR); Wan-Don Kim, Yongin-si (KR); Hoon-Joo Na, Hwaseong-si (KR); and Sang-Jin Hyun, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Oh-Seong Kwon, Hwaseong-si (KR); Jin-Kyu Jang, Hwaseong-si (KR); Wan-Don Kim, Yongin-si (KR); Hoon-Joo Na, Hwaseong-si (KR); and Sang-Jin Hyun, Suwon-si (KR)
Filed on Dec. 9, 2015, as Appl. No. 14/963,271.
Claims priority of application No. 10-2014-0182131 (KR), filed on Dec. 17, 2014; and application No. 10-2015-0148870 (KR), filed on Oct. 26, 2015.
Prior Publication US 2016/0181412 A1, Jun. 23, 2016
Int. Cl. H01L 27/088 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 27/02 (2006.01); H01L 27/11 (2006.01); H01L 29/51 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01); H01L 21/8234 (2006.01)
CPC H01L 27/088 (2013.01) [H01L 21/28088 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 27/1104 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01); H01L 21/82345 (2013.01); H01L 29/165 (2013.01); H01L 29/517 (2013.01); H01L 29/7848 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a gate insulation layer that is on a substrate;
a first barrier layer that is on the gate insulation layer;
an amorphous oxide layer that is on the first barrier layer, the amorphous oxide layer comprising an oxidized portion of a material included in the first barrier layer;
a second barrier layer that is on the amorphous oxide layer, wherein the amorphous oxide layer is interposed between the first barrier layer and the second barrier layer;
a gate electrode that is on the second barrier layer; and
a source and a drain in the substrate and disposed at opposite sides of the gate electrode.