US 9,812,445 B2
Bipolar junction transistor device having base epitaxy region on etched opening in DARC layer
Patrick B. Shea, Washington, DC (US); Michael Rennie, Mechanicsville, VA (US); and Sandro J. Di Giacomo, Ellicott City, MD (US)
Assigned to NORTHROP GRUMMAN SYSTEMS CORPORATION, Falls Church, VA (US)
Filed by Patrick B. Shea, Washington, DC (US); Michael Rennie, Mechanicsville, VA (US); and Sandro J. Di Giacomo, Ellicott City, MD (US)
Filed on Aug. 18, 2015, as Appl. No. 14/829,487.
Application 14/829,487 is a division of application No. 14/098,199, filed on Dec. 5, 2013, granted, now 9,142,546.
Prior Publication US 2015/0357448 A1, Dec. 10, 2015
Int. Cl. H01L 27/07 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 29/737 (2006.01); H01L 29/66 (2006.01); H01L 27/06 (2006.01); H01L 21/8249 (2006.01)
CPC H01L 27/0711 (2013.01) [H01L 27/0623 (2013.01); H01L 29/0817 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/66242 (2013.01); H01L 29/737 (2013.01); H01L 29/7371 (2013.01); H01L 29/7378 (2013.01); H01L 21/8249 (2013.01)] 3 Claims
OG exemplary drawing
 
1. A heterojunction bipolar transistor (HBT) transistor device comprising:
a collector dielectric layer overlying a silicon substrate in a collector active region;
a first dielectric anti-reflective (DARC) layer overlying the collector dielectric layer;
a base epitaxy region extending through a base opening through the collector dielectric layer and the first DARC layer and extending over first and second portions of the first DARC layer on opposing sides of the base opening, the base epitaxy region having a single crystal portion overlying the silicon substrate and polysilicon regions on the opposing sides of the base opening;
an emitter dielectric layer overlying the base epitaxy region;
a second DARC layer overlying the emitter dielectric layer;
a highly doped emitter material region extended though an emitter opening in contact with the single crystal portion and extending over first and second portions of the second DARC layer on opposing sides of the emitter opening;
a base contact opening extending through the highly doped emitter material region, the second DARC layer and the emitter dielectric to one or more doped regions of the base epitaxy region;
an emitter contact opening extending through the highly doped emitter material region, the second DARC layer, the emitter dielectric, the base epitaxy region, the first DARC layer, and the collector dielectric layer to a doped collector contact region in the silicon substrate; and
wherein the first DARC layer and the second DARC layer are formed from silicon-rich oxynitride layers that both function as hard masks and ant-reflective layers during photolithography and have a low dielectric constant.