US 9,812,434 B2
Hollow metal pillar packaging scheme
Chang-Pin Huang, Yangmei Township (TW); Hsien-Ming Tu, Zhubei (TW); Hsien-Wei Chen, Hsinchu (TW); Tung-Liang Shao, Hsinchu (TW); Ching-Jung Yang, Pingzhen (TW); and Yu-Chia Lai, Zhunan Township (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 5, 2017, as Appl. No. 15/614,096.
Application 15/095,765 is a division of application No. 14/030,157, filed on Sep. 18, 2013, granted, now 9,343,417, issued on May 17, 2016.
Application 15/614,096 is a continuation of application No. 15/095,765, filed on Apr. 11, 2016, granted, now 9,679,883.
Prior Publication US 2017/0271316 A1, Sep. 21, 2017
Int. Cl. H01L 23/28 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 23/29 (2006.01)
CPC H01L 25/50 (2013.01) [H01L 21/56 (2013.01); H01L 21/566 (2013.01); H01L 23/3192 (2013.01); H01L 23/562 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 23/293 (2013.01); H01L 2224/03914 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/1134 (2013.01); H01L 2224/1147 (2013.01); H01L 2224/1181 (2013.01); H01L 2224/1182 (2013.01); H01L 2224/1191 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/13005 (2013.01); H01L 2224/13011 (2013.01); H01L 2224/13012 (2013.01); H01L 2224/13016 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81411 (2013.01); H01L 2224/81815 (2013.01); H01L 2225/06513 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01008 (2013.01); H01L 2924/01018 (2013.01); H01L 2924/181 (2013.01); H01L 2924/351 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a conductive layer over a first substrate;
forming a mask layer over the conductive layer;
patterning the mask layer to form an opening in the mask layer, the opening exposing a portion of the conductive layer, the opening having an annular shape in a plan view;
depositing a first conductive material in the opening;
depositing a second conductive material in the opening and over the first conductive material, the second conductive material being different from the first conductive material;
removing the mask layer;
depositing a molding compound over the first conductive material and the second conductive material; and
removing a portion of the molding compound to expose a sidewall of the first conductive material, and a sidewall and a top surface of the second conductive material.