US 9,812,422 B2
Embedded die-down package-on-package device
Toong Erh Ooi, Butterworth (MY); Bok Eng Cheah, Bayan Lepas (MY); and Nitesh Nimkar, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 22, 2016, as Appl. No. 15/273,549.
Application 15/273,549 is a division of application No. 13/852,876, filed on Mar. 28, 2013, granted, now 9,455,218, issued on Sep. 27, 2016.
Prior Publication US 2017/0012020 A1, Jan. 12, 2017
Int. Cl. H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01); H01L 23/538 (2006.01); H01L 23/50 (2006.01); H01L 21/48 (2006.01); H05K 3/46 (2006.01); H05K 1/18 (2006.01)
CPC H01L 24/82 (2013.01) [H01L 21/486 (2013.01); H01L 21/4846 (2013.01); H01L 21/4857 (2013.01); H01L 23/498 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/50 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 23/5389 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 24/19 (2013.01); H01L 24/24 (2013.01); H01L 24/73 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/821 (2013.01); H01L 2224/82005 (2013.01); H01L 2224/82039 (2013.01); H01L 2224/82345 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1058 (2013.01); H01L 2225/1076 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1517 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/181 (2013.01); H01L 2924/1815 (2013.01); H01L 2924/18162 (2013.01); H05K 1/185 (2013.01); H05K 3/4682 (2013.01); H05K 2201/10674 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A method comprising:
disposing a die on a sacrificial substrate with a device side of the die opposite the sacrificial substrate;
disposing a spacer layer on the sacrificial substrate, the spacer layer comprising an opening to accommodate the die on the sacrificial substrate;
forming a build-up carrier adjacent a device side of the die, wherein the build-up carrier comprises:
a plurality of alternating layers of conductive material and dielectric material, and
dielectric material embedding a portion of a thickness dimension of the die and defining a gradation between the device side of the die and a backside of the die, the gradation comprising a plurality of carrier contact points configured for mounting the build-up carrier to the substrate; and
after forming the build-up carrier, separating the die and the build-up carrier from the sacrificial substrate and the spacer layer.