US 9,812,417 B2
Semiconductor device and semiconductor device manufacturing method
Hirokazu Saito, Miyazaki (JP)
Assigned to LAPIS SEMICONDUCTOR CO., LTD., Yokohama (JP)
Filed by LAPIS SEMICONDUCTOR CO., LTD., Kanagawa (JP)
Filed on Sep. 22, 2016, as Appl. No. 15/273,151.
Claims priority of application No. 2015-190200 (JP), filed on Sep. 28, 2015.
Prior Publication US 2017/0092610 A1, Mar. 30, 2017
Int. Cl. H01L 23/544 (2006.01); H01L 23/00 (2006.01)
CPC H01L 24/14 (2013.01) [H01L 24/11 (2013.01); H01L 2224/11002 (2013.01); H01L 2224/11009 (2013.01); H01L 2224/1184 (2013.01); H01L 2224/1401 (2013.01); H01L 2224/1412 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate including, in a central portion of a main face of the substrate, n first element formation regions having a rectangular flat plane shape and are arrayed along a first direction, and n+m second element formation regions having the same shape as the first element formation regions and are arrayed along the first direction and adjacent to the first element formation regions in a second direction intersecting the first direction;
a plurality of projecting electrodes formed at each of the first element formation regions and at each of the second element formation regions; and
a plurality of dummy projecting electrodes formed, at a peripheral portion of the main face, overlapping a triangle defined by a first edge of the first element formation region that forms a boundary between the first element formation region and the peripheral portion, and a second edge of the second element formation region, the second edge being adjacent to a corner of the first edge and that forms a boundary between the second element formation region and the peripheral portion.