US 9,812,390 B2
Semiconductor devices including conductive features with capping layers and methods of forming the same
Hui-Chun Yang, Hsin-Chu (TW); Mei-Ling Chen, Kaohsiung (TW); Keng-Chu Lin, Ping-Tung (TW); and Joung-Wei Liou, Zhudong (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on May 17, 2016, as Appl. No. 15/157,033.
Application 15/157,033 is a division of application No. 13/452,446, filed on Apr. 20, 2012, granted, now 9,349,689.
Prior Publication US 2016/0260667 A1, Sep. 8, 2016
Int. Cl. H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/28562 (2013.01); H01L 21/7681 (2013.01); H01L 21/7684 (2013.01); H01L 21/7685 (2013.01); H01L 21/76802 (2013.01); H01L 21/76807 (2013.01); H01L 21/76826 (2013.01); H01L 21/76829 (2013.01); H01L 21/76832 (2013.01); H01L 21/76843 (2013.01); H01L 21/76849 (2013.01); H01L 23/5329 (2013.01); H01L 23/53238 (2013.01); H01L 23/53295 (2013.01); H01L 2924/0002 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an insulating material layer disposed over a workpiece, the insulating material layer comprising a silicon-containing material comprising about 13% or greater of carbon (C);
a low dielectric constant (k) dielectric material layer interposed between the workpiece and the insulating material layer;
a conductive feature disposed within the insulating material layer and in the low k dielectric material layer, the conductive feature having a uniform width through the insulating material layer; and
a capping layer disposed on a top surface of the conductive feature, the capping layer comprising a material selected from the group consisting essentially of Co, Rh, Ir, Fe, Ni, and combinations thereof, the capping layer extending below a top surface of the insulating material layer,
wherein the capping layer has a top surface coplanar with a top surface of the insulating material layer, and wherein the top surface of the low k dielectric material layer is free from contamination by the material of the capping layer.