US 9,812,389 B2
Isolation device
Dominique Ho, Singapore (SG); Chris Tao, Singapore (SG); and Boon Keat Tan, Singapore (SG)
Assigned to AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD., Singapore (SG)
Filed by Avago Technologies General IP (Singapore) Pte. Ltd., Singapore (SG)
Filed on Aug. 4, 2016, as Appl. No. 15/228,727.
Application 15/228,727 is a continuation in part of application No. 14/872,692, filed on Oct. 1, 2015, granted, now 9,576,891.
Application 14/872,692 is a continuation in part of application No. 14/873,211, filed on Oct. 2, 2015.
Prior Publication US 2017/0098604 A1, Apr. 6, 2017
Int. Cl. H01L 29/00 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/02 (2006.01)
CPC H01L 23/5223 (2013.01) [H01L 23/528 (2013.01); H01L 23/5225 (2013.01); H01L 27/0288 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/49107 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An isolation system, comprising:
a first circuit electrically isolated from a second circuit;
an integrated circuit chip, comprising:
a first capacitive plate electrically connected with the first circuit;
a second capacitive plate electrically connected with the second circuit and positioned with respect to the first capacitive plate to enable a capacitive coupling therebetween;
an enhanced isolation layer positioned between the first capacitive plate and the second capacitive plate that facilitates an electrical isolation between the first capacitive plate and the second capacitive plate;
a first bonding wire that is in electrical communication with the second capacitive plate; and
a second bonding wire that is in electrical communication with the first capacitive plate, wherein the first bonding wire is bonded at a different depth within the integrated circuit chip than the second bonding wire.