US 9,812,383 B2
Power converter package using driver IC
Eung San Cho, Torrance, CA (US); and Dan Clavette, Greene, RI (US)
Assigned to Infineon Technologies Americas Corp., El Segundo, CA (US)
Filed by Infineon Technologies Americas Corp., El Segundo, CA (US)
Filed on Oct. 22, 2015, as Appl. No. 14/920,424.
Application 14/920,424 is a continuation of application No. 13/759,831, filed on Feb. 5, 2013, granted, now 9,171,784.
Claims priority of provisional application 61/616,949, filed on Mar. 28, 2012.
Prior Publication US 2016/0043022 A1, Feb. 11, 2016
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/495 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 23/34 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01); H02M 3/158 (2006.01)
CPC H01L 23/49562 (2013.01) [H01L 23/495 (2013.01); H01L 23/49503 (2013.01); H01L 23/49524 (2013.01); H01L 23/49575 (2013.01); H01L 23/49589 (2013.01); H01L 24/34 (2013.01); H01L 24/36 (2013.01); H01L 24/40 (2013.01); H01L 24/49 (2013.01); H01L 25/072 (2013.01); H02M 3/158 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49111 (2013.01); H01L 2224/73221 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13064 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1426 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/30107 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A dual power converter package comprising:
a leadframe comprising:
a first control FET paddle configured for electrical connection to a drain of a first control FET;
a second control FET paddle configured for electrical connection to a drain of a second control FET; and
a sync FET paddle that is continuous, and configured for electrical connection to a source of a first sync FET and a source of a second sync FET, between said source of said first sync FET and said source of said second sync FET;
said first control FET and said first sync FET forming a half-bridge circuit;
said first and second control FETs and said first and second sync FETs being configured to receive signals from a driver integrated circuit (IC).