US 9,812,373 B2 | ||
Semiconductor package with top side cooling heat sink thermal pathway | ||
Christian Fachmann, Fürnitz (AT); Ralf Otremba, Kaufbeuren (DE); Klaus Schiess, Allensbach (DE); and Franz Stueckler, St. Stefan (AT) | ||
Assigned to Infineon Technologies AG, Neubiberg (DE) | ||
Filed by Infineon Technologies AG, Neubiberg (DE) | ||
Filed on Dec. 7, 2015, as Appl. No. 14/960,804. | ||
Claims priority of application No. 10 2014 118 080 (DE), filed on Dec. 8, 2014. | ||
Prior Publication US 2016/0163616 A1, Jun. 9, 2016 | ||
Int. Cl. H01L 23/367 (2006.01); H01L 23/373 (2006.01); F28F 21/08 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01) |
CPC H01L 23/3672 (2013.01) [F28F 21/081 (2013.01); H01L 23/367 (2013.01); H01L 23/3735 (2013.01); H01L 23/3736 (2013.01); H01L 23/3737 (2013.01); H01L 24/00 (2013.01); H01L 23/49551 (2013.01)] | 15 Claims |
1. An electronic module, comprising:
a semiconductor package comprising a semiconductor chip and an electrically insulating encapsulation body encapsulating the
semiconductor chip, the encapsulation body completely covering a second main face and four side faces of the semiconductor
chip, wherein a first main face of the semiconductor chip that is opposite the second main face is exposed from the encapsulation
body;
a heat spreader attached to the semiconductor package, the heat spreader completely covering the first main face of the semiconductor
chip; and
an electrically insulating layer disposed on the heat spreader remote from the semiconductor package, wherein the electrically
insulating layer is completely separated from the semiconductor chip.
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