US 9,812,359 B2
Thru-silicon-via structures
Fen Chen, Williston, VT (US); Mukta G. Farooq, Hopewell Junction, NY (US); Carole D. Graas, Jericho, VT (US); and Xiao Hu Liu, Briarcliff Manor, NY (US)
Assigned to GLOBALFOUNDRIES INC., Grand Cayman (KY)
Filed on Jun. 8, 2015, as Appl. No. 14/733,445.
Prior Publication US 2016/0358821 A1, Dec. 8, 2016
Int. Cl. H01L 21/768 (2006.01); H01L 23/48 (2006.01)
CPC H01L 21/76898 (2013.01) [H01L 23/481 (2013.01); H01L 21/7682 (2013.01); H01L 21/76831 (2013.01)] 4 Claims
OG exemplary drawing
1. A structure comprising:
a thru-silicon-via in a wafer;
an insulator material lining the thru-silicon-via;
a floating diffusion barrier liner lining the insulator material;
a stress absorption layer on the floating diffusion barrier liner;
a diffusion barrier liner lining the stress absorption insulator layer;
a copper plate on the diffusion barrier liner; and
a capping material on a planarized surface of wafer and covering the insulator material, floating diffusion barrier liner, stress absorption insulator layer, diffusion barrier liner, and copper plate,
wherein the floating diffusion barrier liner is Ta or TaN,
wherein the insulator material completely lines a sidewall of the thru-silicon-via,
wherein the floating diffusion barrier liner is in direct contact and completely lines the insulator material within the thru-silicon-via,
wherein the stress absorption layer is an insulator material,
wherein the stress absorption layer directly contacts the floating diffusion barrier liner, and
wherein the diffusion barrier liner is directly contacting the stress absorption insulator layer.