US 9,812,358 B1
FinFET structures and methods of forming the same
Yen-Chun Huang, New Taipei (TW); Ting-Ting Chen, New Taipei (TW); Yu-Chung Su, Hsin-Chu (TW); Ling-Fu Nieh, Taipei (TW); Pin-Chuan Su, Hsin-Chu (TW); Teng-Chun Tsai, Hsin-Chu (TW); Tai-Chun Huang, New Taipei (TW); and Joy Cheng, Taoyuan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Sep. 14, 2016, as Appl. No. 15/264,718.
Int. Cl. H01L 21/4763 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 21/76897 (2013.01) [H01L 21/02118 (2013.01); H01L 21/02282 (2013.01); H01L 21/02337 (2013.01); H01L 21/28123 (2013.01); H01L 21/31053 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 23/5226 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a recess exposing a plurality of semiconductor fins on a wafer;
forming a dummy contact material in the recess, the dummy contact material containing carbon;
curing the dummy contact material with one or more baking steps, the one or more baking steps hardening the dummy contact material;
replacing a first portion of the dummy contact material with an inter-layer dielectric (ILD); and
replacing a second portion of the dummy contact material with a plurality of contacts, the plurality of contacts electrically coupled to source/drain regions of the plurality of semiconductor fins.