US 9,812,355 B2
Method of manufacturing semiconductor device
Kimihiko Nakatani, Toyama (JP); and Hiroshi Ashihara, Toyama (JP)
Assigned to HITACHI KOKUSAI ELECTRIC INC., Tokyo (JP)
Filed by HITACHI KOKUSAI ELECTRIC INC., Tokyo (JP)
Filed on Sep. 29, 2016, as Appl. No. 15/280,239.
Claims priority of application No. 2015-191267 (JP), filed on Sep. 29, 2015.
Prior Publication US 2017/0092535 A1, Mar. 30, 2017
Int. Cl. H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 21/3213 (2006.01)
CPC H01L 21/76849 (2013.01) [H01L 21/32135 (2013.01); H01L 21/7685 (2013.01); H01L 21/76843 (2013.01); H01L 21/76856 (2013.01); H01L 23/53238 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
providing a substrate having an insulating film and a plurality of conductive films on a surface thereof, wherein each of the plurality of conductive films has a different incubation time;
reducing the plurality of the conductive films by supplying a first reducing gas to the substrate, wherein process conditions of the first reducing gas are controlled so that a difference in incubation time among the plurality of conductive films is 0.01% or more and 50% or less; and
selectively forming a metal film on the plurality of the reduced conductive films by supplying a second reducing gas and a metal-containing gas to the substrate.