US 9,812,354 B2
Process of forming an electronic device including a material defining a void
Gordon M. Grivna, Mesa, AZ (US); Michael Thomason, Blackfoot, ID (US); and Stevan Gaurdello Hunter, Pocatello, ID (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed by Semiconductor Components Industries, LLC, Phoenix, AZ (US)
Filed on May 15, 2015, as Appl. No. 14/713,603.
Prior Publication US 2016/0336184 A1, Nov. 17, 2016
Int. Cl. H01L 21/308 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 27/08 (2006.01); H01L 29/94 (2006.01)
CPC H01L 21/76831 (2013.01) [H01L 21/3083 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 21/76877 (2013.01); H01L 27/0805 (2013.01); H01L 29/945 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A process of forming an electronic device comprising:
forming a masking layer over a substrate, wherein the masking layer defines a first opening including a first portion having a first width and a second portion having a second width, wherein the first width is wider than the second width;
patterning the substrate to define a first trench having a first portion and a second portion corresponding to the first portion and the second portion of the first opening of the masking layer, wherein, as compared to using a different mask having a uniform width corresponding to the second width, during patterning, the first portion of the first trench allows an etchant gas to reach a location at or near a bottom of the first trench more readily, and etch product gas to be removed from the location at or near a bottom of the first trench more readily, or both; and
depositing a material within the first trench.