US 9,812,222 B2
Method and apparatus for in-system management and repair of semi-conductor memory failure
Jung Pill Kim, San Diego, CA (US); Dexter Tamio Chun, San Diego, CA (US); Jungwon Suh, San Diego, CA (US); Deepti Vijayalakshmi Sriramagiri, San Diego, CA (US); Yanru Li, San Diego, CA (US); Mosaddiq Saifuddin, San Diego, CA (US); and Xiangyu Dong, San Jose, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Apr. 20, 2015, as Appl. No. 14/691,570.
Prior Publication US 2016/0307645 A1, Oct. 20, 2016
Int. Cl. G06F 11/00 (2006.01); G11C 29/44 (2006.01); G11C 29/00 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01); G11C 29/42 (2006.01); G11C 11/401 (2006.01)
CPC G11C 29/4401 (2013.01) [G06F 11/073 (2013.01); G06F 11/079 (2013.01); G06F 11/0751 (2013.01); G06F 11/0793 (2013.01); G06F 11/1048 (2013.01); G11C 29/42 (2013.01); G11C 29/76 (2013.01); G11C 11/401 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A method for repair of a memory comprising:
detecting an error, as a detected error, wherein the detected error is associated with accessing the memory, and wherein the detected error is located at a fail address in the memory; and
upon detecting the error, selecting a repair process, based on a selection criterion, wherein the repair process is selected from the group consisting of an in-line repair process and an off-line repair process; and
upon selecting the in-line repair process, performing the in-line repair process, wherein performing the in-line repair process includes:
applying a short-term error correction, wherein the short-term error correction comprises a short-term remapping of the fail address in the memory to a remapped memory area of the memory, and
upon a successful completion of the short-term error correction, applying an in-system repair, comprising determining if there is sufficient available repair time, and if there is sufficient available repair time, performing a one-time programmed remapping of the fail address from the remapped memory area to a redundancy area of the memory.