US 9,812,217 B2
Driver circuit, signal processing unit having the driver circuit, method for manufacturing the signal processing unit, and display device
Shunpei Yamazaki, Tokyo (JP); Hideto Ohnuma, Kanagawa (JP); and Kei Takahashi, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., LTD., Kanagawa-ken (JP)
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi-shi, Kanagawa-ken (JP)
Filed on Apr. 6, 2016, as Appl. No. 15/91,762.
Application 15/091,762 is a continuation of application No. 13/804,945, filed on Mar. 14, 2013, granted, now 9,324,449.
Claims priority of application No. 2012-074335 (JP), filed on Mar. 28, 2012.
Prior Publication US 2016/0225463 A1, Aug. 4, 2016
Int. Cl. H01L 27/108 (2006.01); G11C 19/28 (2006.01); G09G 3/20 (2006.01); G09G 5/00 (2006.01); H01L 21/77 (2017.01); H01L 27/12 (2006.01)
CPC G11C 19/28 (2013.01) [G09G 3/20 (2013.01); G09G 5/00 (2013.01); H01L 21/77 (2013.01); H01L 27/1203 (2013.01); H01L 27/1225 (2013.01); H01L 27/1259 (2013.01); H01L 27/1266 (2013.01); G09G 2310/0248 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0289 (2013.01); G09G 2330/021 (2013.01); G09G 2380/02 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first layer comprising a transistor including an oxide semiconductor layer;
a second layer over the first layer, the second layer comprising:
a first p-chnnel transistor including a first silicon semiconductor layer; and
a second p-channel transistor including a second silicon semiconductor layer;
a shift register circuit comprising the first p-channel transistor;
a switching circuit comprising the second p-channel transistor; and
a latch circuit comprising the transistor including the oxide semiconductor layer.