US 9,812,198 B1
Fast sense amplifier with bit-line pre-charging
Chung-Cheng Chou, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsin-Chu (TW)
Filed on Jan. 26, 2017, as Appl. No. 15/416,191.
Application 15/416,191 is a continuation of application No. 15/150,478, filed on May 10, 2016, granted, now 9,576,653.
Int. Cl. G11C 11/00 (2006.01); G11C 13/00 (2006.01)
CPC G11C 13/004 (2013.01) [G11C 13/0061 (2013.01); G11C 13/0069 (2013.01); G11C 2013/0042 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A resistive memory cell bit-line, comprising:
a cell branch including an adjustable memory resistor having a variable value, wherein the cell branch generates a cell branch current based on a selected value of the adjustable memory resistor; and
a first pre-charge transistor configured to pre-charge the cell-branch to a first pre-charge voltage.