US 9,812,197 B2
Clamp circuit
Luke Whitaker, Fort Collins, CO (US)
Assigned to Hewlett Packard Enterprise Development LP, Houston, TX (US)
Appl. No. 15/316,060
Filed by HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP, Houston, TX (US)
PCT Filed Oct. 20, 2014, PCT No. PCT/US2014/061375
§ 371(c)(1), (2) Date Dec. 2, 2016,
PCT Pub. No. WO2016/064375, PCT Pub. Date Apr. 28, 2016.
Prior Publication US 2017/0110187 A1, Apr. 20, 2017
Int. Cl. G11C 11/00 (2006.01); G11C 13/00 (2006.01)
CPC G11C 13/004 (2013.01) 12 Claims
OG exemplary drawing
 
1. A device comprising:
a first transistor having a source-drain path electrically coupled between a first node and a second node;
an operational amplifier having an output electrically coupled to a gate of the first transistor, the operational amplifier to control the first transistor to maintain a predetermined voltage on the first node;
a first current source to add a current at the first node;
a second current source to subtract the current at the second node;
a plurality of switches to switch the device between a first state and a second state; and
a second transistor to mirror the current from the second current source to subtract the current at the second node in the first state and to be diode connected and electrically disconnected from the second current source to provide a load at the second node in the second state.