US 9,812,178 B2
Semiconductor device
Jun Koyama, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (JP)
Filed on Mar. 15, 2016, as Appl. No. 15/70,145.
Application 15/070,145 is a continuation of application No. 14/670,525, filed on Mar. 27, 2015, granted, now 9,293,174.
Application 14/670,525 is a continuation of application No. 13/783,573, filed on Mar. 4, 2013, granted, now 8,995,218, issued on Mar. 31, 2015.
Claims priority of application No. 2012-050085 (JP), filed on Mar. 7, 2012.
Prior Publication US 2016/0196854 A1, Jul. 7, 2016
Int. Cl. G11C 5/14 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); G11C 7/00 (2006.01); G06F 1/20 (2006.01); G06F 1/32 (2006.01)
CPC G11C 5/14 (2013.01) [G11C 7/00 (2013.01); H01L 27/1203 (2013.01); H01L 29/786 (2013.01); G06F 1/206 (2013.01); G06F 1/3203 (2013.01); G11C 5/148 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an arithmetic circuit;
a memory circuit configured to hold data obtained by the arithmetic circuit;
a power supply control switch configured to control whether a power supply voltage is supplied to the arithmetic circuit or not; and
a temperature detection circuit configured to detect a temperature of the memory circuit and to estimate an amount of an extra power consumed at a time of writing the data to the memory circuit and a time of reading the data from the memory circuit from the temperature,
wherein the power supply control switch is configured to be turned off so as not to supply the power supply voltage to the arithmetic circuit during a period, when a power consumption of the arithmetic circuit during the period is larger than the extra power consumed at a time of writing the data to the memory circuit and a time of reading the data from the memory circuit.