US 9,812,064 B2
Organic light-emitting display panel and method for compensating voltage drop thereof
Ping Sheng Kuo, Guangdong (CN)
Assigned to Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong (CN)
Appl. No. 14/778,104
Filed by Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong (CN)
PCT Filed Jan. 29, 2015, PCT No. PCT/CN2015/071842
§ 371(c)(1), (2) Date Nov. 21, 2016,
PCT Pub. No. WO2016/115752, PCT Pub. Date Jul. 28, 2016.
Claims priority of application No. 2015 1 0025858 (CN), filed on Jan. 19, 2015.
Prior Publication US 2017/0162124 A1, Jun. 8, 2017
Int. Cl. G09G 3/30 (2006.01); G09G 3/3283 (2016.01); H01L 27/32 (2006.01)
CPC G09G 3/3283 (2013.01) [H01L 27/32 (2013.01); G09G 2320/0233 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An organic light-emitting display panel, comprising:
a plurality of pixel units;
a power supply unit, which provides a supply voltage to each of the pixel units via a power wiring;
a scan driving unit, which outputs a scanning signal to each of the pixel units via a scan line;
a data driving unit, which outputs a data voltage to each of the pixel units via a data line; and
a voltage drop compensation unit, which is connected to the data driving unit and used for calculating a voltage at a junction between each of the pixel units and the power wiring based on the data voltage output by the data driving unit to each of the pixel units, compensating the data voltage output by the data driving unit to each of the pixel units based on a voltage difference between the voltage as calculated and the supply voltage, and supplying a compensated data voltage to each of the pixel units; wherein the voltage drop compensation unit, through iterative algorithm, calculates the voltage at the junction between each of the pixel units and the power wiring, the iterative algorithm comprising:
step S100: calculating, based on a data voltage Vdata,i output by the data driving unit to each of the plurality of pixel units, a drive current Ids,i flowing through each of the pixel units via the following formula, under the assumption that a voltage OVdd,i at a junction between the power wiring and each of the pixel units located along the power wiring is equal to a supply voltage OVdd:
Ids,i=K·(OVdd,i−Vdata,i−|Vth|2)
OVdd,1=OVdd,2= . . . =OVdd,i=OVdd,
wherein i=1, 2, . . . , n, Vth represents a threshold voltage of a drive transistor in the pixel unit; K is an electrical parameter of the drive transistor in the pixel unit; and n indicates the number of the pixel units located along the power wiring;
step S200: substituting the drive current Ids,i flowing through each of the pixel units into the following formula, to calculate the voltage at the junction between a corresponding pixel unit and the power wiring:
OVdd,i=OVdd,i-1−(Σi=n,i=i-1iIds,iR,
wherein i=1, 2, . . . , n, R represents a parasitic resistance of a section of the power wiring between two adjacent pixel units;
step S300: judging whether a result obtained in step S200 satisfies prescribed requirements, and entering step S400, if yes, or entering step S500, if no;
step S400: calculating the drive current flowing through each of the pixel units via the following formula, according to the data voltage output by the data driving unit to a corresponding pixel unit, and the voltage at the junction between the corresponding pixel unit and the power wiring, as obtained in step S200:
Ids,i=K·(OVdd,i−Vdata,i−|Vth|2),
wherein i=1, 2 . . . n, and
returning to step S200; and
step S500: calculating a voltage difference between the supply voltage and the voltage at the junction between each of the pixel units and the power wiring as obtained in step S200.