| US 9,811,873 B2 | ||
| Scaler circuit for generating various resolution images from single image and devices including the same | ||
| Sung Rae Lee, Seoul (KR); and Seung Hun Jeong, Seoul (KR) | ||
| Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR) | ||
| Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR) | ||
| Filed on Jan. 27, 2016, as Appl. No. 15/7,674. | ||
| Claims priority of application No. 10-2015-0021800 (KR), filed on Feb. 12, 2015. | ||
| Prior Publication US 2016/0239941 A1, Aug. 18, 2016 | ||
| Int. Cl. G06K 9/32 (2006.01); G06T 1/20 (2006.01) | ||
| CPC G06T 1/20 (2013.01) | 20 Claims |
| 1. A scaler circuit comprising:
a first scaler configured to perform a first horizontal scaling operation after a first vertical scaling operation;
a second scaler configured to perform a second horizontal scaling operation after a second vertical scaling operation; and
a line memory which is shared by the first scaler and the second scaler,
wherein each of the first scaler and the second scaler generates each of a first image and a second image, respectively, having
different resolutions from a single image using the line memory.
|