US 9,811,691 B2
Program execution device
Hideki Matsushima, Osaka (JP); Teruto Hirota, Osaka (JP); Yukie Shoda, Osaka (JP); and Shunji Harada, Osaka (JP)
Assigned to PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA, Torrance, CA (US)
Filed by Panasonic Intellectual Property Corporation of America, Torrance, CA (US)
Filed on Nov. 10, 2016, as Appl. No. 15/348,035.
Application 13/441,261 is a division of application No. 12/367,076, filed on Feb. 6, 2009, granted, now 8,181,040, issued on May 15, 2012.
Application 15/348,035 is a continuation of application No. 14/941,987, filed on Nov. 16, 2015, granted, now 9,524,404.
Application 14/941,987 is a continuation of application No. 14/483,450, filed on Sep. 11, 2014, granted, now 9,218,485, issued on Dec. 22, 2015.
Application 14/483,450 is a continuation of application No. 13/952,244, filed on Jul. 26, 2013, granted, now 8,874,938, issued on Oct. 28, 2014.
Application 13/952,244 is a continuation of application No. 13/441,261, filed on Apr. 6, 2012, granted, now 8,522,053, issued on Aug. 27, 2013.
Application 12/367,076 is a continuation of application No. 10/569,414, granted, now 7,533,276, issued on May 12, 2009, previously published as PCT/JP2004/012666, filed on Aug. 26, 2004.
Claims priority of application No. 2003-301554 (JP), filed on Aug. 26, 2003.
Prior Publication US 2017/0061165 A1, Mar. 2, 2017
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 9/00 (2006.01); H04K 1/00 (2006.01); G06F 21/00 (2013.01); G06F 21/87 (2013.01); G06F 21/14 (2013.01); H04L 29/06 (2006.01); G06F 21/53 (2013.01); G06F 21/57 (2013.01); G06F 12/14 (2006.01); H04L 9/32 (2006.01); G06F 21/74 (2013.01)
CPC G06F 21/87 (2013.01) [G06F 12/1408 (2013.01); G06F 21/14 (2013.01); G06F 21/53 (2013.01); G06F 21/57 (2013.01); G06F 21/74 (2013.01); H04L 9/3234 (2013.01); H04L 9/3247 (2013.01); H04L 63/105 (2013.01); G06F 2212/1052 (2013.01); G06F 2221/2153 (2013.01)] 6 Claims
OG exemplary drawing
 
1. An information processing device comprising:
a first component including at least a first program for tamper detection;
a second component including at least a second program for executing a task; and
a non-transitory memory for loading at least the second component,
wherein the first program of the first component judges whether or not at least part of the second program of the second component is tampered with, by using a tamper detection value in a secure environment,
the tamper detection value is a first hash value, and
the secure environment cannot be accessed outside of the secure environment.