US 9,811,482 B2
Asynchronous interface in a system on chip and a method of operating the same
Hee-Seong Lee, Siheung-si (KR); Woo-Jin Kim, Yongin-si (KR); and Nak Hee Seong, Gwacheon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-do (KR)
Filed on Nov. 7, 2016, as Appl. No. 15/344,931.
Application 15/344,931 is a continuation of application No. 14/486,434, filed on Sep. 15, 2014, granted, now 9,489,009.
Claims priority of application No. 10-2014-0019742 (KR), filed on Feb. 20, 2014.
Prior Publication US 2017/0052910 A1, Feb. 23, 2017
This patent is subject to a terminal disclaimer.
Int. Cl. H04J 3/06 (2006.01); G06F 13/16 (2006.01); G06F 1/12 (2006.01); G06F 1/32 (2006.01); G06F 13/36 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/1689 (2013.01) [G06F 1/12 (2013.01); G06F 1/324 (2013.01); G06F 13/36 (2013.01); G06F 13/4068 (2013.01); G06F 13/42 (2013.01); Y02B 60/1217 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A mobile system, comprising:
a first interface configured to transmit a payload in synchronization with a first clock signal through a first channel at a first transfer rate; and
a second interface comprising:
a payload storage connected to the first channel and configured to receive the payload from the first channel; and
a payload receiver connected to the payload storage and configured to receive the payload from the payload storage in synchronization with a second clock at a second transfer rate through a second channel,
wherein a length of the second channel is shorter than a length of the first channel, and the first clock signal is asynchronous with the second clock signal,
wherein an enable signal is transmitted from the first interface to the second interface when the payload is transmitted from the first interface to the second interface through the first channel,
wherein the first interface includes a local write pointer generator configured to increase a local write pointer based on the enable signal and the second interface includes a remote write pointer generator configured to increase a remote write pointer based on the payload or the enable signal received from the first interface.